* [Qemu-devel] [PATCH 1/9] serial: Convert serial_mm_init to MemoryRegion.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-11 23:18 ` Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 2/9] serial: Use enum device_endian in serial_mm_init parameter Richard Henderson
` (8 subsequent siblings)
9 siblings, 1 reply; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/serial.c | 145 +++++++++++++----------------------------------------------
1 files changed, 31 insertions(+), 114 deletions(-)
diff --git a/hw/serial.c b/hw/serial.c
index 466de21..1fb9e9c 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -28,6 +28,7 @@
#include "pc.h"
#include "qemu-timer.h"
#include "sysemu.h"
+#include "exec-memory.h"
//#define DEBUG_SERIAL
@@ -153,11 +154,11 @@ struct SerialState {
int poll_msl;
struct QEMUTimer *modem_status_poll;
+ MemoryRegion io;
};
typedef struct ISASerialState {
ISADevice dev;
- MemoryRegion io;
uint32_t index;
uint32_t iobase;
uint32_t isairq;
@@ -786,8 +787,8 @@ static int serial_isa_initfn(ISADevice *dev)
serial_init_core(s);
qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3);
- memory_region_init_io(&isa->io, &serial_io_ops, s, "serial", 8);
- isa_register_ioport(dev, &isa->io, isa->iobase);
+ memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8);
+ isa_register_ioport(dev, &s->io, isa->iobase);
return 0;
}
@@ -821,115 +822,37 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
}
/* Memory mapped interface */
-static uint32_t serial_mm_readb(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
-
- return serial_ioport_read(s, addr >> s->it_shift) & 0xFF;
-}
-
-static void serial_mm_writeb(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFF);
-}
-
-static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
- val = bswap16(val);
- return val;
-}
-
-static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
- return val;
-}
-
-static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- value = bswap16(value);
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
-}
-
-static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
-}
-
-static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift);
- val = bswap32(val);
- return val;
-}
-
-static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift);
- return val;
-}
-
-static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+static uint64_t serial_mm_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
SerialState *s = opaque;
-
- value = bswap32(value);
- serial_ioport_write(s, addr >> s->it_shift, value);
+ return serial_ioport_read(s, addr >> s->it_shift);
}
-static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+static void serial_mm_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
SerialState *s = opaque;
-
+ value &= ~0u >> (32 - (size * 8));
serial_ioport_write(s, addr >> s->it_shift, value);
}
-static CPUReadMemoryFunc * const serial_mm_read_be[] = {
- &serial_mm_readb,
- &serial_mm_readw_be,
- &serial_mm_readl_be,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_be[] = {
- &serial_mm_writeb,
- &serial_mm_writew_be,
- &serial_mm_writel_be,
-};
-
-static CPUReadMemoryFunc * const serial_mm_read_le[] = {
- &serial_mm_readb,
- &serial_mm_readw_le,
- &serial_mm_readl_le,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_le[] = {
- &serial_mm_writeb,
- &serial_mm_writew_le,
- &serial_mm_writel_le,
+static const MemoryRegionOps serial_mm_ops[3] = {
+ [DEVICE_NATIVE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ },
+ [DEVICE_LITTLE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ },
+ [DEVICE_BIG_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_BIG_ENDIAN,
+ },
};
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
@@ -938,7 +861,7 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
int be)
{
SerialState *s;
- int s_io_memory;
+ enum device_endian end;
s = qemu_mallocz(sizeof(SerialState));
@@ -950,17 +873,11 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
serial_init_core(s);
vmstate_register(NULL, base, &vmstate_serial, s);
+ end = (be ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN);
+ memory_region_init_io(&s->io, &serial_mm_ops[end], s,
+ "serial", 8 << it_shift);
if (ioregister) {
- if (be) {
- s_io_memory = cpu_register_io_memory(serial_mm_read_be,
- serial_mm_write_be, s,
- DEVICE_NATIVE_ENDIAN);
- } else {
- s_io_memory = cpu_register_io_memory(serial_mm_read_le,
- serial_mm_write_le, s,
- DEVICE_NATIVE_ENDIAN);
- }
- cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
+ memory_region_add_subregion(get_system_memory(), base, &s->io);
}
serial_update_msl(s);
return s;
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [Qemu-devel] [PATCH 1/9] serial: Convert serial_mm_init to MemoryRegion.
2011-08-11 23:07 ` [Qemu-devel] [PATCH 1/9] serial: " Richard Henderson
@ 2011-08-11 23:18 ` Richard Henderson
0 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:18 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
>From 04288b36c9fae976e976c455e9f26ff2d7d9ada7 Mon Sep 17 00:00:00 2001
From: Richard Henderson <rth@twiddle.net>
Date: Thu, 11 Aug 2011 11:39:50 -0700
Subject: [PATCH 1/9] serial: Convert serial_mm_init to MemoryRegion.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/serial.c | 145 +++++++++++++----------------------------------------------
1 files changed, 31 insertions(+), 114 deletions(-)
Dang it.
v1.1: Fix cut-and-paste error in DEVICE_LITTLE_ENDIAN copy of
serial_mm_ops.
diff --git a/hw/serial.c b/hw/serial.c
index 466de21..f023357 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -28,6 +28,7 @@
#include "pc.h"
#include "qemu-timer.h"
#include "sysemu.h"
+#include "exec-memory.h"
//#define DEBUG_SERIAL
@@ -153,11 +154,11 @@ struct SerialState {
int poll_msl;
struct QEMUTimer *modem_status_poll;
+ MemoryRegion io;
};
typedef struct ISASerialState {
ISADevice dev;
- MemoryRegion io;
uint32_t index;
uint32_t iobase;
uint32_t isairq;
@@ -786,8 +787,8 @@ static int serial_isa_initfn(ISADevice *dev)
serial_init_core(s);
qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3);
- memory_region_init_io(&isa->io, &serial_io_ops, s, "serial", 8);
- isa_register_ioport(dev, &isa->io, isa->iobase);
+ memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8);
+ isa_register_ioport(dev, &s->io, isa->iobase);
return 0;
}
@@ -821,115 +822,37 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
}
/* Memory mapped interface */
-static uint32_t serial_mm_readb(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
-
- return serial_ioport_read(s, addr >> s->it_shift) & 0xFF;
-}
-
-static void serial_mm_writeb(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFF);
-}
-
-static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
- val = bswap16(val);
- return val;
-}
-
-static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
- return val;
-}
-
-static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- value = bswap16(value);
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
-}
-
-static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
-}
-
-static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift);
- val = bswap32(val);
- return val;
-}
-
-static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift);
- return val;
-}
-
-static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+static uint64_t serial_mm_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
SerialState *s = opaque;
-
- value = bswap32(value);
- serial_ioport_write(s, addr >> s->it_shift, value);
+ return serial_ioport_read(s, addr >> s->it_shift);
}
-static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+static void serial_mm_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
SerialState *s = opaque;
-
+ value &= ~0u >> (32 - (size * 8));
serial_ioport_write(s, addr >> s->it_shift, value);
}
-static CPUReadMemoryFunc * const serial_mm_read_be[] = {
- &serial_mm_readb,
- &serial_mm_readw_be,
- &serial_mm_readl_be,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_be[] = {
- &serial_mm_writeb,
- &serial_mm_writew_be,
- &serial_mm_writel_be,
-};
-
-static CPUReadMemoryFunc * const serial_mm_read_le[] = {
- &serial_mm_readb,
- &serial_mm_readw_le,
- &serial_mm_readl_le,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_le[] = {
- &serial_mm_writeb,
- &serial_mm_writew_le,
- &serial_mm_writel_le,
+static const MemoryRegionOps serial_mm_ops[3] = {
+ [DEVICE_NATIVE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ },
+ [DEVICE_LITTLE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ },
+ [DEVICE_BIG_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_BIG_ENDIAN,
+ },
};
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
@@ -938,7 +861,7 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
int be)
{
SerialState *s;
- int s_io_memory;
+ enum device_endian end;
s = qemu_mallocz(sizeof(SerialState));
@@ -950,17 +873,11 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
serial_init_core(s);
vmstate_register(NULL, base, &vmstate_serial, s);
+ end = (be ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN);
+ memory_region_init_io(&s->io, &serial_mm_ops[end], s,
+ "serial", 8 << it_shift);
if (ioregister) {
- if (be) {
- s_io_memory = cpu_register_io_memory(serial_mm_read_be,
- serial_mm_write_be, s,
- DEVICE_NATIVE_ENDIAN);
- } else {
- s_io_memory = cpu_register_io_memory(serial_mm_read_le,
- serial_mm_write_le, s,
- DEVICE_NATIVE_ENDIAN);
- }
- cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
+ memory_region_add_subregion(get_system_memory(), base, &s->io);
}
serial_update_msl(s);
return s;
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH 2/9] serial: Use enum device_endian in serial_mm_init parameter.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 1/9] serial: " Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 3/9] serial: Remove ioregister parameter from serial_mm_init Richard Henderson
` (7 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
The use of DEVICE_NATIVE_ENDIAN cleans up lots of ifdefs in
many of the callers.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/mips_jazz.c | 14 ++++----------
hw/mips_malta.c | 7 ++-----
hw/musicpal.c | 14 ++------------
hw/omap_uart.c | 17 ++---------------
hw/pc.h | 2 +-
hw/petalogix_ml605_mmu.c | 2 +-
hw/ppc405_uc.c | 8 ++++----
hw/ppc440.c | 4 ++--
hw/ppce500_mpc8544ds.c | 4 ++--
hw/pxa2xx.c | 33 +++++++++++++--------------------
hw/serial.c | 4 +---
hw/sm501.c | 8 +-------
hw/sun4u.c | 2 +-
hw/virtex_ml507.c | 3 ++-
14 files changed, 38 insertions(+), 84 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 1abab70..8287ca4 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -252,18 +252,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 1);
-#else
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 0);
-#endif
+ serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0],
+ 1, DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 1);
-#else
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 0);
-#endif
+ serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1],
+ 1, DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index dd84992..2851f8c 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -446,11 +446,8 @@ static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init);
-#ifdef TARGET_WORDS_BIGENDIAN
- s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1, 1);
-#else
- s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1, 0);
-#endif
+ s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
+ 1, DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index 627e0c1..d33e880 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1488,22 +1488,12 @@ static void musicpal_init(MemoryRegion *address_space_mem,
pic[MP_TIMER4_IRQ], NULL);
if (serial_hds[0]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, 1);
-#else
serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, 0);
-#endif
+ serial_hds[0], 1, DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, 1);
-#else
serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, 0);
-#endif
+ serial_hds[1], 1, DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index 9cee81d..64b2085 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -60,15 +60,9 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->base = base;
s->fclk = fclk;
s->irq = irq;
-#ifdef TARGET_WORDS_BIGENDIAN
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_open(label, "null", NULL), 1,
- 1);
-#else
- s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
- chr ?: qemu_chr_open(label, "null", NULL), 1,
- 0);
-#endif
+ DEVICE_NATIVE_ENDIAN);
return s;
}
@@ -182,15 +176,8 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
{
/* TODO: Should reuse or destroy current s->serial */
-#ifdef TARGET_WORDS_BIGENDIAN
- s->serial = serial_mm_init(s->base, 2, s->irq,
- omap_clk_getrate(s->fclk) / 16,
- chr ?: qemu_chr_open("null", "null", NULL), 1,
- 1);
-#else
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_open("null", "null", NULL), 1,
- 0);
-#endif
+ DEVICE_NATIVE_ENDIAN);
}
diff --git a/hw/pc.h b/hw/pc.h
index 28ed210..b7323fc 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -18,7 +18,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
CharDriverState *chr, int ioregister,
- int be);
+ enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 2108193..2ae5c43 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -189,7 +189,7 @@ petalogix_ml605_init(MemoryRegion *address_space_mem,
}
serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
- serial_hds[0], 1, 0);
+ serial_hds[0], 1, DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 100 Mhz. */
xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index efdf37d..fb36c07 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2150,11 +2150,11 @@ CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, 1);
+ serial_hds[1], 1, DEVICE_BIG_ENDIAN);
}
/* IIC controller */
ppc405_i2c_init(0xef600500, pic[2]);
@@ -2505,11 +2505,11 @@ CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, 1);
+ serial_hds[1], 1, DEVICE_BIG_ENDIAN);
}
/* OCM */
ppc405_ocm_init(env);
diff --git a/hw/ppc440.c b/hw/ppc440.c
index f34d68d..b5391d4 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -93,11 +93,11 @@ CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, 1);
+ serial_hds[1], 1, DEVICE_BIG_ENDIAN);
}
return env;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 43e0bd9..ae72612 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -278,13 +278,13 @@ static void mpc8544ds_init(MemoryRegion *address_space_mem,
if (serial_hds[0]) {
serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
/* General Utility device */
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index cf93110..a30e714 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2113,19 +2113,16 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
- for (i = 0; pxa270_serial[i].io_base; i ++)
- if (serial_hds[i])
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(pxa270_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
- 14857000 / 16, serial_hds[i], 1, 1);
-#else
+ for (i = 0; pxa270_serial[i].io_base; i++) {
+ if (serial_hds[i]) {
serial_mm_init(pxa270_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
- 14857000 / 16, serial_hds[i], 1, 0);
-#endif
- else
+ qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
+ 14857000 / 16, serial_hds[i], 1,
+ DEVICE_NATIVE_ENDIAN);
+ } else {
break;
+ }
+ }
if (serial_hds[i])
s->fir = pxa2xx_fir_init(0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
@@ -2248,20 +2245,16 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
- for (i = 0; pxa255_serial[i].io_base; i ++)
+ for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(pxa255_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
- 14745600 / 16, serial_hds[i], 1, 1);
-#else
serial_mm_init(pxa255_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
- 14745600 / 16, serial_hds[i], 1, 0);
-#endif
+ qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
+ 14745600 / 16, serial_hds[i], 1,
+ DEVICE_NATIVE_ENDIAN);
} else {
break;
}
+ }
if (serial_hds[i])
s->fir = pxa2xx_fir_init(0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
diff --git a/hw/serial.c b/hw/serial.c
index 1fb9e9c..2954a48 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -858,10 +858,9 @@ static const MemoryRegionOps serial_mm_ops[3] = {
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
CharDriverState *chr, int ioregister,
- int be)
+ enum device_endian end)
{
SerialState *s;
- enum device_endian end;
s = qemu_mallocz(sizeof(SerialState));
@@ -873,7 +872,6 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
serial_init_core(s);
vmstate_register(NULL, base, &vmstate_serial, s);
- end = (be ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN);
memory_region_init_io(&s->io, &serial_mm_ops[end], s,
"serial", 8 << it_shift);
if (ioregister) {
diff --git a/hw/sm501.c b/hw/sm501.c
index 0f0bf96..de57186 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -1440,15 +1440,9 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* bridge to serial emulation module */
if (chr) {
-#ifdef TARGET_WORDS_BIGENDIAN
serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
- 115200, chr, 1, 1);
-#else
- serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
- NULL, /* TODO : chain irq to IRL */
- 115200, chr, 1, 0);
-#endif
+ 115200, chr, 1, DEVICE_NATIVE_ENDIAN);
}
/* create qemu graphic console */
diff --git a/hw/sun4u.c b/hw/sun4u.c
index b6421cb..d9096fc 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -768,7 +768,7 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200,
- serial_hds[i], 1, 1);
+ serial_hds[i], 1, DEVICE_BIG_ENDIAN);
i++;
}
for(; i < MAX_SERIAL_PORTS; i++) {
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index 15d37b5..d9a2758 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -232,7 +232,8 @@ static void virtex_init(MemoryRegion *address_space_mem,
irq[i] = qdev_get_gpio_in(dev, i);
}
- serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0], 1, 0);
+ serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0],
+ 1, DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 62 Mhz. */
xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* [Qemu-devel] [PATCH 3/9] serial: Remove ioregister parameter from serial_mm_init.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 1/9] serial: " Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 2/9] serial: Use enum device_endian in serial_mm_init parameter Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 4/9] serial: Add MemoryRegion parameter to serial_mm_init Richard Henderson
` (6 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
All callers passed 1.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/mips_jazz.c | 4 ++--
hw/mips_malta.c | 2 +-
hw/musicpal.c | 4 ++--
hw/omap_uart.c | 4 ++--
hw/pc.h | 3 +--
hw/petalogix_ml605_mmu.c | 2 +-
hw/ppc405_uc.c | 8 ++++----
hw/ppc440.c | 4 ++--
hw/ppce500_mpc8544ds.c | 4 ++--
hw/pxa2xx.c | 4 ++--
hw/serial.c | 8 +++-----
hw/sm501.c | 2 +-
hw/sun4u.c | 2 +-
hw/virtex_ml507.c | 2 +-
14 files changed, 25 insertions(+), 28 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 8287ca4..894d716 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -253,11 +253,11 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0],
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1],
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 2851f8c..6412b06 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -447,7 +447,7 @@ static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init);
s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index d33e880..f0065ad 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1489,11 +1489,11 @@ static void musicpal_init(MemoryRegion *address_space_mem,
if (serial_hds[0]) {
serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, DEVICE_NATIVE_ENDIAN);
+ serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, DEVICE_NATIVE_ENDIAN);
+ serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index 64b2085..f1d04c8 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -61,7 +61,7 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->fclk = fclk;
s->irq = irq;
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
- chr ?: qemu_chr_open(label, "null", NULL), 1,
+ chr ?: qemu_chr_open(label, "null", NULL),
DEVICE_NATIVE_ENDIAN);
return s;
}
@@ -178,6 +178,6 @@ void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
/* TODO: Should reuse or destroy current s->serial */
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
- chr ?: qemu_chr_open("null", "null", NULL), 1,
+ chr ?: qemu_chr_open("null", "null", NULL),
DEVICE_NATIVE_ENDIAN);
}
diff --git a/hw/pc.h b/hw/pc.h
index b7323fc..f81635f 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -17,8 +17,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr);
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
- CharDriverState *chr, int ioregister,
- enum device_endian);
+ CharDriverState *chr, enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 2ae5c43..a82ee82 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -189,7 +189,7 @@ petalogix_ml605_init(MemoryRegion *address_space_mem,
}
serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
- serial_hds[0], 1, DEVICE_LITTLE_ENDIAN);
+ serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 100 Mhz. */
xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index fb36c07..2704839 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2150,11 +2150,11 @@ CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[1], DEVICE_BIG_ENDIAN);
}
/* IIC controller */
ppc405_i2c_init(0xef600500, pic[2]);
@@ -2505,11 +2505,11 @@ CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[1], DEVICE_BIG_ENDIAN);
}
/* OCM */
ppc405_ocm_init(env);
diff --git a/hw/ppc440.c b/hw/ppc440.c
index b5391d4..9439716 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -93,11 +93,11 @@ CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[1], DEVICE_BIG_ENDIAN);
}
return env;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index ae72612..588440f 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -278,13 +278,13 @@ static void mpc8544ds_init(MemoryRegion *address_space_mem,
if (serial_hds[0]) {
serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
/* General Utility device */
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index a30e714..f8d052e 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2117,7 +2117,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
if (serial_hds[i]) {
serial_mm_init(pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
- 14857000 / 16, serial_hds[i], 1,
+ 14857000 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
} else {
break;
@@ -2249,7 +2249,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
if (serial_hds[i]) {
serial_mm_init(pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
- 14745600 / 16, serial_hds[i], 1,
+ 14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
} else {
break;
diff --git a/hw/serial.c b/hw/serial.c
index 2954a48..9402a5c 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -857,8 +857,7 @@ static const MemoryRegionOps serial_mm_ops[3] = {
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
- CharDriverState *chr, int ioregister,
- enum device_endian end)
+ CharDriverState *chr, enum device_endian end)
{
SerialState *s;
@@ -874,9 +873,8 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
memory_region_init_io(&s->io, &serial_mm_ops[end], s,
"serial", 8 << it_shift);
- if (ioregister) {
- memory_region_add_subregion(get_system_memory(), base, &s->io);
- }
+ memory_region_add_subregion(get_system_memory(), base, &s->io);
+
serial_update_msl(s);
return s;
}
diff --git a/hw/sm501.c b/hw/sm501.c
index de57186..de9a6d0 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -1442,7 +1442,7 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
if (chr) {
serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
- 115200, chr, 1, DEVICE_NATIVE_ENDIAN);
+ 115200, chr, DEVICE_NATIVE_ENDIAN);
}
/* create qemu graphic console */
diff --git a/hw/sun4u.c b/hw/sun4u.c
index d9096fc..c6948c1 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -768,7 +768,7 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200,
- serial_hds[i], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[i], DEVICE_BIG_ENDIAN);
i++;
}
for(; i < MAX_SERIAL_PORTS; i++) {
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index d9a2758..a211436 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -233,7 +233,7 @@ static void virtex_init(MemoryRegion *address_space_mem,
}
serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0],
- 1, DEVICE_LITTLE_ENDIAN);
+ DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 62 Mhz. */
xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* [Qemu-devel] [PATCH 4/9] serial: Add MemoryRegion parameter to serial_mm_init.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
` (2 preceding siblings ...)
2011-08-11 23:07 ` [Qemu-devel] [PATCH 3/9] serial: Remove ioregister parameter from serial_mm_init Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 5/9] ppc405: Pass in address_space_mem to ppc405{cr, ep}_init Richard Henderson
` (5 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
Remove the get_system_memory() call from serial_mm_init, pushing
it back into the callers. In many cases we already have the
system memory region available.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/mips_jazz.c | 8 ++++----
hw/mips_malta.c | 4 ++--
hw/musicpal.c | 8 ++++----
hw/omap_uart.c | 6 ++++--
hw/pc.h | 7 ++++---
hw/petalogix_ml605_mmu.c | 4 ++--
hw/ppc405_uc.c | 20 ++++++++++++--------
hw/ppc440.c | 11 +++++++----
hw/ppce500_mpc8544ds.c | 4 ++--
hw/pxa2xx.c | 5 +++--
hw/serial.c | 10 +++++-----
hw/sm501.c | 4 +++-
hw/sun4u.c | 5 +++--
hw/virtex_ml507.c | 4 ++--
14 files changed, 57 insertions(+), 43 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 894d716..70132c4 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -252,12 +252,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0],
- DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 8000000/16,
+ serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1],
- DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 8000000/16,
+ serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 6412b06..8afef80 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -446,8 +446,8 @@ static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init);
- s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
- DEVICE_NATIVE_ENDIAN);
+ s->uart = serial_mm_init(address_space, base + 0x900, 3, uart_irq,
+ 230400, uart_chr, DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index f0065ad..5ef2011 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1488,12 +1488,12 @@ static void musicpal_init(MemoryRegion *address_space_mem,
pic[MP_TIMER4_IRQ], NULL);
if (serial_hds[0]) {
- serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],
+ 1825000, serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
- serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],
+ 1825000, serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index f1d04c8..d04bec1 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -22,6 +22,7 @@
#include "omap.h"
/* We use pc-style serial ports. */
#include "pc.h"
+#include "exec-memory.h"
/* UARTs */
struct omap_uart_s {
@@ -60,7 +61,8 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->base = base;
s->fclk = fclk;
s->irq = irq;
- s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
+ s->serial = serial_mm_init(get_system_memory(), base, 2, irq,
+ omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_open(label, "null", NULL),
DEVICE_NATIVE_ENDIAN);
return s;
@@ -176,7 +178,7 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
{
/* TODO: Should reuse or destroy current s->serial */
- s->serial = serial_mm_init(s->base, 2, s->irq,
+ s->serial = serial_mm_init(get_system_memory(), s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_open("null", "null", NULL),
DEVICE_NATIVE_ENDIAN);
diff --git a/hw/pc.h b/hw/pc.h
index f81635f..ca57577 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -15,9 +15,10 @@
SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr);
-SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
- qemu_irq irq, int baudbase,
- CharDriverState *chr, enum device_endian);
+SerialState *serial_mm_init(MemoryRegion *address_space,
+ target_phys_addr_t base, int it_shift,
+ qemu_irq irq, int baudbase,
+ CharDriverState *chr, enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index a82ee82..a1787e3 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -188,8 +188,8 @@ petalogix_ml605_init(MemoryRegion *address_space_mem,
irq[i] = qdev_get_gpio_in(dev, i);
}
- serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
- serial_hds[0], DEVICE_LITTLE_ENDIAN);
+ serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,
+ irq[5], 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 100 Mhz. */
xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 2704839..ffd806b 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2149,12 +2149,14 @@ CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
ppc405_dma_init(env, dma_irqs);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
+ DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
+ DEVICE_BIG_ENDIAN);
}
/* IIC controller */
ppc405_i2c_init(0xef600500, pic[2]);
@@ -2504,12 +2506,14 @@ CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
ppc405_gpio_init(0xef600700);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
+ DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
+ DEVICE_BIG_ENDIAN);
}
/* OCM */
ppc405_ocm_init(env);
diff --git a/hw/ppc440.c b/hw/ppc440.c
index 9439716..71e85ab 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -20,6 +20,7 @@
#include "ppc405.h"
#include "sysemu.h"
#include "kvm.h"
+#include "exec-memory.h"
#define PPC440EP_PCI_CONFIG 0xeec00000
#define PPC440EP_PCI_INTACK 0xeed00000
@@ -92,12 +93,14 @@ CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN);
if (serial_hds[0] != NULL) {
- serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
+ DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
+ DEVICE_BIG_ENDIAN);
}
return env;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 588440f..110e0f3 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -276,13 +276,13 @@ static void mpc8544ds_init(MemoryRegion *address_space_mem,
/* Serial */
if (serial_hds[0]) {
- serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
+ serial_mm_init(address_space_mem, MPC8544_SERIAL0_REGS_BASE,
0, mpic[12+26], 399193,
serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1]) {
- serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
+ serial_mm_init(address_space_mem, MPC8544_SERIAL1_REGS_BASE,
0, mpic[12+26], 399193,
serial_hds[0], DEVICE_BIG_ENDIAN);
}
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index f8d052e..c1a8cfc 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -15,6 +15,7 @@
#include "ssi.h"
#include "qemu-char.h"
#include "blockdev.h"
+#include "exec-memory.h"
static struct {
target_phys_addr_t io_base;
@@ -2115,7 +2116,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
for (i = 0; pxa270_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(pxa270_serial[i].io_base, 2,
+ serial_mm_init(get_system_memory(), pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
14857000 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
@@ -2247,7 +2248,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(pxa255_serial[i].io_base, 2,
+ serial_mm_init(get_system_memory(), pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
diff --git a/hw/serial.c b/hw/serial.c
index 9402a5c..7acfa1e 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -28,7 +28,6 @@
#include "pc.h"
#include "qemu-timer.h"
#include "sysemu.h"
-#include "exec-memory.h"
//#define DEBUG_SERIAL
@@ -855,9 +854,10 @@ static const MemoryRegionOps serial_mm_ops[3] = {
},
};
-SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
- qemu_irq irq, int baudbase,
- CharDriverState *chr, enum device_endian end)
+SerialState *serial_mm_init(MemoryRegion *address_space,
+ target_phys_addr_t base, int it_shift,
+ qemu_irq irq, int baudbase,
+ CharDriverState *chr, enum device_endian end)
{
SerialState *s;
@@ -873,7 +873,7 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
memory_region_init_io(&s->io, &serial_mm_ops[end], s,
"serial", 8 << it_shift);
- memory_region_add_subregion(get_system_memory(), base, &s->io);
+ memory_region_add_subregion(address_space, base, &s->io);
serial_update_msl(s);
return s;
diff --git a/hw/sm501.c b/hw/sm501.c
index de9a6d0..56db3b9 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -30,6 +30,7 @@
#include "sysbus.h"
#include "qdev-addr.h"
#include "range.h"
+#include "exec-memory.h"
/*
* Status: 2010/05/07
@@ -1440,7 +1441,8 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* bridge to serial emulation module */
if (chr) {
- serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
+ serial_mm_init(get_system_memory(),
+ base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
115200, chr, DEVICE_NATIVE_ENDIAN);
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index c6948c1..346d6d9 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -38,6 +38,7 @@
#include "loader.h"
#include "elf.h"
#include "blockdev.h"
+#include "exec-memory.h"
//#define DEBUG_IRQ
//#define DEBUG_EBUS
@@ -767,8 +768,8 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
- serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200,
- serial_hds[i], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), hwdef->console_serial_base, 0,
+ NULL, 115200, serial_hds[i], DEVICE_BIG_ENDIAN);
i++;
}
for(; i < MAX_SERIAL_PORTS; i++) {
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index a211436..2e04f1a 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -232,8 +232,8 @@ static void virtex_init(MemoryRegion *address_space_mem,
irq[i] = qdev_get_gpio_in(dev, i);
}
- serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0],
- DEVICE_LITTLE_ENDIAN);
+ serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200,
+ serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 62 Mhz. */
xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* [Qemu-devel] [PATCH 5/9] ppc405: Pass in address_space_mem to ppc405{cr, ep}_init.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
` (3 preceding siblings ...)
2011-08-11 23:07 ` [Qemu-devel] [PATCH 4/9] serial: Add MemoryRegion parameter to serial_mm_init Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 6/9] ppc440: Pass in address_space_mem to ppc440ep_init Richard Henderson
` (4 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/ppc405.h | 22 ++++++++++++----------
hw/ppc405_boards.c | 8 ++++----
hw/ppc405_uc.c | 30 ++++++++++++++++--------------
3 files changed, 32 insertions(+), 28 deletions(-)
diff --git a/hw/ppc405.h b/hw/ppc405.h
index f0e81a6..d8fdf09 100644
--- a/hw/ppc405.h
+++ b/hw/ppc405.h
@@ -59,16 +59,18 @@ struct ppc4xx_bd_info_t {
ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd,
uint32_t flags);
-CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
- target_phys_addr_t ram_bases[4],
- target_phys_addr_t ram_sizes[4],
- uint32_t sysclk, qemu_irq **picp,
- int do_init);
-CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
- target_phys_addr_t ram_bases[2],
- target_phys_addr_t ram_sizes[2],
- uint32_t sysclk, qemu_irq **picp,
- int do_init);
+CPUState *ppc405cr_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[4],
+ target_phys_addr_t ram_bases[4],
+ target_phys_addr_t ram_sizes[4],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init);
+CPUState *ppc405ep_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[2],
+ target_phys_addr_t ram_bases[2],
+ target_phys_addr_t ram_sizes[2],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init);
/* IBM STBxxx microcontrollers */
CPUState *ppc_stb025_init (MemoryRegion ram_memories[2],
target_phys_addr_t ram_bases[2],
diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c
index 29de6c7..c696373 100644
--- a/hw/ppc405_boards.c
+++ b/hw/ppc405_boards.c
@@ -209,8 +209,8 @@ static void ref405ep_init (MemoryRegion *address_space_mem,
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
- env = ppc405ep_init(ram_memories, ram_bases, ram_sizes, 33333333, &pic,
- kernel_filename == NULL ? 0 : 1);
+ env = ppc405ep_init(address_space_mem, ram_memories, ram_bases, ram_sizes,
+ 33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
sram_offset = qemu_ram_alloc(NULL, "ef405ep.sram", sram_size);
@@ -538,8 +538,8 @@ static void taihu_405ep_init(MemoryRegion *address_space_mem,
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
- ppc405ep_init(ram_memories, ram_bases, ram_sizes, 33333333, &pic,
- kernel_filename == NULL ? 0 : 1);
+ ppc405ep_init(address_space_mem, ram_memories, ram_bases, ram_sizes,
+ 33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate and load BIOS */
#ifdef DEBUG_BOARD_INIT
printf("%s: register BIOS\n", __func__);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index ffd806b..cbe7a18 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2107,11 +2107,12 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7],
qemu_register_reset(ppc405cr_cpc_reset, cpc);
}
-CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
- target_phys_addr_t ram_bases[4],
- target_phys_addr_t ram_sizes[4],
- uint32_t sysclk, qemu_irq **picp,
- int do_init)
+CPUState *ppc405cr_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[4],
+ target_phys_addr_t ram_bases[4],
+ target_phys_addr_t ram_sizes[4],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init)
{
clk_setup_t clk_setup[PPC405CR_CLK_NB];
qemu_irq dma_irqs[4];
@@ -2149,12 +2150,12 @@ CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
ppc405_dma_init(env, dma_irqs);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
DEVICE_BIG_ENDIAN);
}
@@ -2455,11 +2456,12 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8],
#endif
}
-CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
- target_phys_addr_t ram_bases[2],
- target_phys_addr_t ram_sizes[2],
- uint32_t sysclk, qemu_irq **picp,
- int do_init)
+CPUState *ppc405ep_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[2],
+ target_phys_addr_t ram_bases[2],
+ target_phys_addr_t ram_sizes[2],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init)
{
clk_setup_t clk_setup[PPC405EP_CLK_NB], tlb_clk_setup;
qemu_irq dma_irqs[4], gpt_irqs[5], mal_irqs[4];
@@ -2506,12 +2508,12 @@ CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
ppc405_gpio_init(0xef600700);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
DEVICE_BIG_ENDIAN);
}
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* [Qemu-devel] [PATCH 6/9] ppc440: Pass in address_space_mem to ppc440ep_init.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
` (4 preceding siblings ...)
2011-08-11 23:07 ` [Qemu-devel] [PATCH 5/9] ppc405: Pass in address_space_mem to ppc405{cr, ep}_init Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 7/9] pxa: Pass in address_space to pxa{255, 270}_init Richard Henderson
` (3 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/ppc440.c | 11 +++++------
hw/ppc440.h | 6 +++---
hw/ppc440_bamboo.c | 3 ++-
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/ppc440.c b/hw/ppc440.c
index 71e85ab..11933d9 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -20,7 +20,6 @@
#include "ppc405.h"
#include "sysemu.h"
#include "kvm.h"
-#include "exec-memory.h"
#define PPC440EP_PCI_CONFIG 0xeec00000
#define PPC440EP_PCI_INTACK 0xeed00000
@@ -35,9 +34,9 @@ static const unsigned int ppc440ep_sdram_bank_sizes[] = {
256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
};
-CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
- const unsigned int pci_irq_nrs[4], int do_init,
- const char *cpu_model)
+CPUState *ppc440ep_init(MemoryRegion *address_space_mem, ram_addr_t *ram_size,
+ PCIBus **pcip, const unsigned int pci_irq_nrs[4],
+ int do_init, const char *cpu_model)
{
MemoryRegion *ram_memories
= qemu_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories));
@@ -93,12 +92,12 @@ CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN);
if (serial_hds[0] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
DEVICE_BIG_ENDIAN);
}
diff --git a/hw/ppc440.h b/hw/ppc440.h
index a40f917..9c27c36 100644
--- a/hw/ppc440.h
+++ b/hw/ppc440.h
@@ -14,8 +14,8 @@
#include "hw.h"
-CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
- const unsigned int pci_irq_nrs[4], int do_init,
- const char *cpu_model);
+CPUState *ppc440ep_init(MemoryRegion *address_space, ram_addr_t *ram_size,
+ PCIBus **pcip, const unsigned int pci_irq_nrs[4],
+ int do_init, const char *cpu_model);
#endif
diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index f27c182..a417c8b 100644
--- a/hw/ppc440_bamboo.c
+++ b/hw/ppc440_bamboo.c
@@ -109,7 +109,8 @@ static void bamboo_init(MemoryRegion *address_space_mem,
int i;
/* Setup CPU. */
- env = ppc440ep_init(&ram_size, &pcibus, pci_irq_nrs, 1, cpu_model);
+ env = ppc440ep_init(address_space_mem, &ram_size, &pcibus,
+ pci_irq_nrs, 1, cpu_model);
if (pcibus) {
/* Register network interfaces. */
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* [Qemu-devel] [PATCH 7/9] pxa: Pass in address_space to pxa{255, 270}_init.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
` (5 preceding siblings ...)
2011-08-11 23:07 ` [Qemu-devel] [PATCH 6/9] ppc440: Pass in address_space_mem to ppc440ep_init Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-11 23:07 ` [Qemu-devel] [PATCH 8/9] sm501: Pass address_space_mem to sm501_init Richard Henderson
` (2 subsequent siblings)
9 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/gumstix.c | 4 ++--
hw/mainstone.c | 2 +-
hw/pxa.h | 7 +++++--
hw/pxa2xx.c | 10 +++++-----
hw/spitz.c | 2 +-
hw/tosa.c | 2 +-
hw/z2.c | 2 +-
7 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/hw/gumstix.c b/hw/gumstix.c
index 620bdd7..3466893 100644
--- a/hw/gumstix.c
+++ b/hw/gumstix.c
@@ -57,7 +57,7 @@ static void connex_init(MemoryRegion *address_space_mem,
uint32_t connex_rom = 0x01000000;
uint32_t connex_ram = 0x04000000;
- cpu = pxa255_init(connex_ram);
+ cpu = pxa255_init(address_space_mem, connex_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
if (!dinfo) {
@@ -100,7 +100,7 @@ static void verdex_init(MemoryRegion *address_space_mem,
uint32_t verdex_rom = 0x02000000;
uint32_t verdex_ram = 0x10000000;
- cpu = pxa270_init(verdex_ram, cpu_model ?: "pxa270-c0");
+ cpu = pxa270_init(address_space_mem, verdex_ram, cpu_model ?: "pxa270-c0");
dinfo = drive_get(IF_PFLASH, 0, 0);
if (!dinfo) {
diff --git a/hw/mainstone.c b/hw/mainstone.c
index ae7a542..da14cb4 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -111,7 +111,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
cpu_model = "pxa270-c5";
/* Setup CPU & memory */
- cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
diff --git a/hw/pxa.h b/hw/pxa.h
index 859fc67..1204165 100644
--- a/hw/pxa.h
+++ b/hw/pxa.h
@@ -9,6 +9,8 @@
#ifndef PXA_H
# define PXA_H "pxa.h"
+#include "memory.h"
+
/* Interrupt numbers */
# define PXA2XX_PIC_SSP3 0
# define PXA2XX_PIC_USBH2 2
@@ -173,7 +175,8 @@ struct PXA2xxI2SState {
# define PA_FMT "0x%08lx"
# define REG_FMT "0x" TARGET_FMT_plx
-PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision);
-PXA2xxState *pxa255_init(unsigned int sdram_size);
+PXA2xxState *pxa270_init(MemoryRegion *address_space, unsigned int sdram_size,
+ const char *revision);
+PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size);
#endif /* PXA_H */
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index c1a8cfc..bf00ff7 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -15,7 +15,6 @@
#include "ssi.h"
#include "qemu-char.h"
#include "blockdev.h"
-#include "exec-memory.h"
static struct {
target_phys_addr_t io_base;
@@ -2060,7 +2059,8 @@ static void pxa2xx_reset(void *opaque, int line, int level)
}
/* Initialise a PXA270 integrated chip (ARM based core). */
-PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
+PXA2xxState *pxa270_init(MemoryRegion *address_space,
+ unsigned int sdram_size, const char *revision)
{
PXA2xxState *s;
int iomemtype, i;
@@ -2116,7 +2116,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
for (i = 0; pxa270_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(get_system_memory(), pxa270_serial[i].io_base, 2,
+ serial_mm_init(address_space, pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
14857000 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
@@ -2199,7 +2199,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
}
/* Initialise a PXA255 integrated chip (ARM based core). */
-PXA2xxState *pxa255_init(unsigned int sdram_size)
+PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
{
PXA2xxState *s;
int iomemtype, i;
@@ -2248,7 +2248,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(get_system_memory(), pxa255_serial[i].io_base, 2,
+ serial_mm_init(address_space, pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
diff --git a/hw/spitz.c b/hw/spitz.c
index cac4669..a288879 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -907,7 +907,7 @@ static void spitz_common_init(MemoryRegion *address_space_mem,
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
/* Setup CPU & memory */
- cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
diff --git a/hw/tosa.c b/hw/tosa.c
index cce828f..4b15cc4 100644
--- a/hw/tosa.c
+++ b/hw/tosa.c
@@ -219,7 +219,7 @@ static void tosa_init(MemoryRegion *address_space_mem,
if (!cpu_model)
cpu_model = "pxa255";
- cpu = pxa255_init(tosa_binfo.ram_size);
+ cpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
cpu_register_physical_memory(0, TOSA_ROM,
qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM);
diff --git a/hw/z2.c b/hw/z2.c
index a6a4761..58c361a 100644
--- a/hw/z2.c
+++ b/hw/z2.c
@@ -294,7 +294,7 @@ static void z2_init(MemoryRegion *address_space_mem,
}
/* Setup CPU & memory */
- cpu = pxa270_init(z2_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, z2_binfo.ram_size, cpu_model);
#ifdef TARGET_WORDS_BIGENDIAN
flash_ops = &pflash_cfi01_ops_be;
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* [Qemu-devel] [PATCH 8/9] sm501: Pass address_space_mem to sm501_init.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
` (6 preceding siblings ...)
2011-08-11 23:07 ` [Qemu-devel] [PATCH 7/9] pxa: Pass in address_space to pxa{255, 270}_init Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-17 22:30 ` Peter Maydell
2011-08-11 23:07 ` [Qemu-devel] [PATCH 9/9] sun4u: Pass address_space_mem to sun4uv_init Richard Henderson
2011-08-14 23:23 ` [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Avi Kivity
9 siblings, 1 reply; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/devices.h | 6 +++++-
hw/r2d.c | 3 ++-
hw/sm501.c | 7 +++----
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/hw/devices.h b/hw/devices.h
index 07fda83..36c21e7 100644
--- a/hw/devices.h
+++ b/hw/devices.h
@@ -1,6 +1,9 @@
#ifndef QEMU_DEVICES_H
#define QEMU_DEVICES_H
+/* ??? Not all users of this file can include cpu-common.h. */
+typedef struct MemoryRegion MemoryRegion;
+
/* Devices that have nowhere better to go. */
/* smc91c111.c */
@@ -57,7 +60,8 @@ qemu_irq *tc6393xb_gpio_in_get(TC6393xbState *s);
qemu_irq tc6393xb_l3v_get(TC6393xbState *s);
/* sm501.c */
-void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
+void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
+ uint32_t local_mem_bytes, qemu_irq irq,
CharDriverState *chr);
#endif
diff --git a/hw/r2d.c b/hw/r2d.c
index e9ec58f..1338cd7 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -262,7 +262,8 @@ static void r2d_init(MemoryRegion *address_space_mem,
sysbus_create_varargs("sh_pci", 0x1e200000, irq[PCI_INTA], irq[PCI_INTB],
irq[PCI_INTC], irq[PCI_INTD], NULL);
- sm501_init(0x10000000, SM501_VRAM_SIZE, irq[SM501], serial_hds[2]);
+ sm501_init(address_space_mem, 0x10000000, SM501_VRAM_SIZE,
+ irq[SM501], serial_hds[2]);
/* onboard CF (True IDE mode, Master only). */
dinfo = drive_get(IF_IDE, 0, 0);
diff --git a/hw/sm501.c b/hw/sm501.c
index 56db3b9..8ec498f 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -30,7 +30,6 @@
#include "sysbus.h"
#include "qdev-addr.h"
#include "range.h"
-#include "exec-memory.h"
/*
* Status: 2010/05/07
@@ -1386,8 +1385,8 @@ static void sm501_update_display(void *opaque)
sm501_draw_crt(s);
}
-void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
- CharDriverState *chr)
+void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
+ uint32_t local_mem_bytes, qemu_irq irq, CharDriverState *chr)
{
SM501State * s;
DeviceState *dev;
@@ -1441,7 +1440,7 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* bridge to serial emulation module */
if (chr) {
- serial_mm_init(get_system_memory(),
+ serial_mm_init(address_space_mem,
base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
115200, chr, DEVICE_NATIVE_ENDIAN);
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [Qemu-devel] [PATCH 8/9] sm501: Pass address_space_mem to sm501_init.
2011-08-11 23:07 ` [Qemu-devel] [PATCH 8/9] sm501: Pass address_space_mem to sm501_init Richard Henderson
@ 2011-08-17 22:30 ` Peter Maydell
0 siblings, 0 replies; 13+ messages in thread
From: Peter Maydell @ 2011-08-17 22:30 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, avi
On 12 August 2011 00:07, Richard Henderson <rth@twiddle.net> wrote:
> diff --git a/hw/devices.h b/hw/devices.h
> index 07fda83..36c21e7 100644
> --- a/hw/devices.h
> +++ b/hw/devices.h
> @@ -1,6 +1,9 @@
> #ifndef QEMU_DEVICES_H
> #define QEMU_DEVICES_H
>
> +/* ??? Not all users of this file can include cpu-common.h. */
> +typedef struct MemoryRegion MemoryRegion;
> +
This breaks compilation of Avi's memory-region branch:
In file included from /home/petmay01/git/qemu/hw/smc91c111.c:12:0:
/home/petmay01/git/qemu/hw/devices.h:5:29: error: redefinition of
typedef ‘MemoryRegion’
/home/petmay01/git/qemu/memory.h:29:29: note: previous declaration of
‘MemoryRegion’ was here
-- PMM
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH 9/9] sun4u: Pass address_space_mem to sun4uv_init.
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
` (7 preceding siblings ...)
2011-08-11 23:07 ` [Qemu-devel] [PATCH 8/9] sm501: Pass address_space_mem to sm501_init Richard Henderson
@ 2011-08-11 23:07 ` Richard Henderson
2011-08-14 23:23 ` [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Avi Kivity
9 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2011-08-11 23:07 UTC (permalink / raw)
To: qemu-devel; +Cc: avi
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
hw/sun4u.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 346d6d9..6739ba2 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -38,7 +38,6 @@
#include "loader.h"
#include "elf.h"
#include "blockdev.h"
-#include "exec-memory.h"
//#define DEBUG_IRQ
//#define DEBUG_EBUS
@@ -732,7 +731,8 @@ static CPUState *cpu_devinit(const char *cpu_model, const struct hwdef *hwdef)
return env;
}
-static void sun4uv_init(ram_addr_t RAM_size,
+static void sun4uv_init(MemoryRegion *address_space_mem,
+ ram_addr_t RAM_size,
const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model,
@@ -768,7 +768,7 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
- serial_mm_init(get_system_memory(), hwdef->console_serial_base, 0,
+ serial_mm_init(address_space_mem, hwdef->console_serial_base, 0,
NULL, 115200, serial_hds[i], DEVICE_BIG_ENDIAN);
i++;
}
@@ -875,7 +875,7 @@ static void sun4u_init(MemoryRegion *address_space_mem,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, boot_devices, kernel_filename,
+ sun4uv_init(address_space_mem, RAM_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
}
@@ -887,7 +887,7 @@ static void sun4v_init(MemoryRegion *address_space_mem,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, boot_devices, kernel_filename,
+ sun4uv_init(address_space_mem, RAM_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
}
@@ -899,7 +899,7 @@ static void niagara_init(MemoryRegion *address_space_mem,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, boot_devices, kernel_filename,
+ sun4uv_init(address_space_mem, RAM_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[2]);
}
--
1.7.6
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion
2011-08-11 23:07 [Qemu-devel] [PATCH 0/9] Convert serial_mm_init to MemoryRegion Richard Henderson
` (8 preceding siblings ...)
2011-08-11 23:07 ` [Qemu-devel] [PATCH 9/9] sun4u: Pass address_space_mem to sun4uv_init Richard Henderson
@ 2011-08-14 23:23 ` Avi Kivity
9 siblings, 0 replies; 13+ messages in thread
From: Avi Kivity @ 2011-08-14 23:23 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
On 08/11/2011 04:07 PM, Richard Henderson wrote:
> The last patch set converted the serial i/o path; this patch
> set converts the serial mmio path.
>
> Intermediate patches increase the use of get_system_memory(),
> and later patches reduce those uses again. In all but one
> case in the end we use the address_space_mem parameter from
> the original board init function.
>
> The major portion of the cleanup comes from actually utilizing
> the device_endian enum provided by the i/o subsystem. This
> allows us to remove all of the ifdeffery in this area.
>
Thanks, queued on qemu-kvm.git memory-region.
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
^ permalink raw reply [flat|nested] 13+ messages in thread