From: Marc Zyngier <marc.zyngier@arm.com>
To: Changhwan Youn <chaos.youn@samsung.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-samsung-soc@vger.kernel.org"
<linux-samsung-soc@vger.kernel.org>,
"kgene.kim@samsung.com" <kgene.kim@samsung.com>,
"ben-linux@fluff.org" <ben-linux@fluff.org>,
Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH 5/7] ARM: EXYNOS4: Add support external GIC
Date: Wed, 05 Oct 2011 14:55:16 +0100 [thread overview]
Message-ID: <4E8C61C4.9090709@arm.com> (raw)
In-Reply-To: <1308555258-4322-6-git-send-email-chaos.youn@samsung.com>
Hi Changhwan,
On 20/06/11 08:34, Changhwan Youn wrote:
> For full support of power modes, this patch adds implementation
> external GIC on EXYNOS4.
>
> External GIC of Exynos4 cannot support register banking so
> several interrupt related code for CPU1 should be different
> from that of CPU0.
I just realized that patch has made it to mainline... Unfortunately, it
seems quite broken to me:
> Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
> ---
> arch/arm/mach-exynos4/cpu.c | 10 ++++++++
> arch/arm/mach-exynos4/include/mach/entry-macro.S | 5 ++++
> arch/arm/mach-exynos4/include/mach/map.h | 1 +
> arch/arm/mach-exynos4/platsmp.c | 27 +++++++++++++++++++++-
> 4 files changed, 42 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
> index fa33294..40a866c 100644
> --- a/arch/arm/mach-exynos4/cpu.c
> +++ b/arch/arm/mach-exynos4/cpu.c
> @@ -16,6 +16,7 @@
>
> #include <asm/proc-fns.h>
> #include <asm/hardware/cache-l2x0.h>
> +#include <asm/hardware/gic.h>
>
> #include <plat/cpu.h>
> #include <plat/clock.h>
> @@ -159,11 +160,20 @@ void __init exynos4_init_clocks(int xtal)
> exynos4_setup_clocks();
> }
>
> +static void exynos4_gic_irq_eoi(struct irq_data *d)
> +{
> + struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
> +
> + gic_data->cpu_base = S5P_VA_GIC_CPU +
> + (EXYNOS4_GIC_BANK_OFFSET * smp_processor_id());
Here, you're overwriting a field that is shared among *all* the
interrupts in the system. What if an interrupt comes up on another CPU?
If you look at the implementation of gic_eoi_irq(), you'll definitely
see the race.
> +}
> +
> void __init exynos4_init_irq(void)
> {
> int irq;
>
> gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
> + gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi;
And here you're abusing the GIC extension feature.
I've also had a look at -next, and this has been extended further to
support 4412. The problem with that is without banking, you're painfully
working around the GIC driver. At that stage, I wonder if you wouldn't
be better off with a separate driver instead of abusing the existing one...
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/7] ARM: EXYNOS4: Add support external GIC
Date: Wed, 05 Oct 2011 14:55:16 +0100 [thread overview]
Message-ID: <4E8C61C4.9090709@arm.com> (raw)
In-Reply-To: <1308555258-4322-6-git-send-email-chaos.youn@samsung.com>
Hi Changhwan,
On 20/06/11 08:34, Changhwan Youn wrote:
> For full support of power modes, this patch adds implementation
> external GIC on EXYNOS4.
>
> External GIC of Exynos4 cannot support register banking so
> several interrupt related code for CPU1 should be different
> from that of CPU0.
I just realized that patch has made it to mainline... Unfortunately, it
seems quite broken to me:
> Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
> ---
> arch/arm/mach-exynos4/cpu.c | 10 ++++++++
> arch/arm/mach-exynos4/include/mach/entry-macro.S | 5 ++++
> arch/arm/mach-exynos4/include/mach/map.h | 1 +
> arch/arm/mach-exynos4/platsmp.c | 27 +++++++++++++++++++++-
> 4 files changed, 42 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
> index fa33294..40a866c 100644
> --- a/arch/arm/mach-exynos4/cpu.c
> +++ b/arch/arm/mach-exynos4/cpu.c
> @@ -16,6 +16,7 @@
>
> #include <asm/proc-fns.h>
> #include <asm/hardware/cache-l2x0.h>
> +#include <asm/hardware/gic.h>
>
> #include <plat/cpu.h>
> #include <plat/clock.h>
> @@ -159,11 +160,20 @@ void __init exynos4_init_clocks(int xtal)
> exynos4_setup_clocks();
> }
>
> +static void exynos4_gic_irq_eoi(struct irq_data *d)
> +{
> + struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);
> +
> + gic_data->cpu_base = S5P_VA_GIC_CPU +
> + (EXYNOS4_GIC_BANK_OFFSET * smp_processor_id());
Here, you're overwriting a field that is shared among *all* the
interrupts in the system. What if an interrupt comes up on another CPU?
If you look at the implementation of gic_eoi_irq(), you'll definitely
see the race.
> +}
> +
> void __init exynos4_init_irq(void)
> {
> int irq;
>
> gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
> + gic_arch_extn.irq_eoi = exynos4_gic_irq_eoi;
And here you're abusing the GIC extension feature.
I've also had a look at -next, and this has been extended further to
support 4412. The problem with that is without banking, you're painfully
working around the GIC driver. At that stage, I wonder if you wouldn't
be better off with a separate driver instead of abusing the existing one...
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2011-10-05 13:54 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-20 7:34 [PATCH 0/7] ARM: EXYNOS4: Adds External GIC Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-06-20 7:34 ` [PATCH 1/7] ARM: EXYNOS4: Add external GIC io memory mapping Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-06-30 5:14 ` MyungJoo Ham
2011-06-30 5:14 ` MyungJoo Ham
2011-06-30 6:54 ` MyungJoo Ham
2011-06-30 6:54 ` MyungJoo Ham
2011-07-04 10:25 ` Kukjin Kim
2011-07-04 10:25 ` Kukjin Kim
2011-06-20 7:34 ` [PATCH 2/7] ARM: EXYNOS4: modify interrupt mappings for external GIC Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-06-20 7:34 ` [PATCH 3/7] ARM: EXYNOS4: set the affinity of mct1 interrupt using IRQ_MCT_L1 Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-06-20 7:34 ` [PATCH 4/7] ARM: GIC: move gic_chip_data structure declaration to header Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-07-04 9:38 ` Kukjin Kim
2011-07-04 9:38 ` Kukjin Kim
2011-06-20 7:34 ` [PATCH 5/7] ARM: EXYNOS4: Add support external GIC Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-10-05 13:55 ` Marc Zyngier [this message]
2011-10-05 13:55 ` Marc Zyngier
2011-10-06 6:30 ` Kukjin Kim
2011-10-06 6:30 ` Kukjin Kim
2011-10-06 8:18 ` Marc Zyngier
2011-10-06 8:18 ` Marc Zyngier
2011-10-07 9:44 ` Marc Zyngier
2011-10-07 9:44 ` Marc Zyngier
2011-10-07 10:54 ` Kukjin Kim
2011-10-07 10:54 ` Kukjin Kim
2011-10-07 15:16 ` Will Deacon
2011-10-07 15:16 ` Will Deacon
2011-10-10 13:02 ` Marc Zyngier
2011-10-10 13:02 ` Marc Zyngier
2011-10-11 12:22 ` Changhwan Youn
2011-10-11 12:22 ` Changhwan Youn
2011-10-11 13:30 ` Marc Zyngier
2011-10-11 13:30 ` Marc Zyngier
2011-10-12 5:16 ` Kukjin Kim
2011-10-12 5:16 ` Kukjin Kim
2011-11-02 11:15 ` Marc Zyngier
2011-11-02 11:15 ` Marc Zyngier
2011-11-02 11:29 ` Kukjin Kim
2011-11-02 11:29 ` Kukjin Kim
2011-10-13 11:09 ` Russell King - ARM Linux
2011-10-13 11:09 ` Russell King - ARM Linux
2011-10-13 17:51 ` Will Deacon
2011-10-13 17:51 ` Will Deacon
2011-06-20 7:34 ` [PATCH 6/7] ARM: EXYNOS4: Remove clock event timers using ARM private timers Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-06-20 7:34 ` [PATCH 7/7] ARM: EXYNOS4: Add chained enrty/exit function to uart interrupt handler Changhwan Youn
2011-06-20 7:34 ` Changhwan Youn
2011-06-21 0:01 ` [PATCH 0/7] ARM: EXYNOS4: Adds External GIC Kyungmin Park
2011-06-21 0:01 ` Kyungmin Park
2011-07-16 6:55 ` Kukjin Kim
2011-07-16 6:55 ` Kukjin Kim
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