From: Scott Wood <scottwood@freescale.com>
To: Alexander Graf <agraf@suse.de>
Cc: "<kvm-ppc@vger.kernel.org>" <kvm-ppc@vger.kernel.org>,
kvm list <kvm@vger.kernel.org>, Avi Kivity <avi@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>
Subject: Re: [PATCH] KVM: PPC: Add generic single register ioctls
Date: Mon, 09 Jan 2012 20:12:19 +0000 [thread overview]
Message-ID: <4F0B4A23.9070808@freescale.com> (raw)
In-Reply-To: <C1F8E785-7BEA-401C-8BF7-A277F16D6C03@suse.de>
On 01/09/2012 02:11 PM, Alexander Graf wrote:
>
>
> Am 09.01.2012 um 20:07 schrieb Scott Wood <scottwood@freescale.com>:
>
>> On 01/06/2012 06:52 PM, Alexander Graf wrote:
>>>
>>>
>>> On 06.01.2012, at 20:32, Scott Wood <scottwood@freescale.com> wrote:
>>>
>>>> On 01/05/2012 10:15 PM, Alexander Graf wrote:
>>>>
>>>>> +/*
>>>>> + * Architecture specific registers are to be defined in arch headers and
>>>>> + * ORed with the arch identifier.
>>>>> + */
>>>>> +#define KVM_REG_PPC 0x1000000000000000ULL
>>>>> +#define KVM_REG_X86 0x2000000000000000ULL
>>>>> +#define KVM_REG_IA64 0x3000000000000000ULL
>>>>> +#define KVM_REG_ARM 0x4000000000000000ULL
>>>>> +#define KVM_REG_S390 0x5000000000000000ULL
>>>>> +
>>>>> +#define KVM_REG_SIZE_SHIFT 52
>>>>> +#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL
>>>>> +#define KVM_REG_SIZE_U8 0x0000000000000000ULL
>>>>> +#define KVM_REG_SIZE_U16 0x0010000000000000ULL
>>>>> +#define KVM_REG_SIZE_U32 0x0020000000000000ULL
>>>>> +#define KVM_REG_SIZE_U64 0x0030000000000000ULL
>>>>> +#define KVM_REG_SIZE_U128 0x0040000000000000ULL
>>>>> +#define KVM_REG_SIZE_U256 0x0050000000000000ULL
>>>>> +#define KVM_REG_SIZE_U512 0x0060000000000000ULL
>>>>> +#define KVM_REG_SIZE_U1024 0x0070000000000000ULL
>>>>
>>>> Why not just encode directly as number of bytes?
>>>
>>> Because this is 1 << n bytes :)
>>
>> Some registers may not be a power-of-2 number of bytes (e.g. x86 segment
>> descriptors), and we've got plenty of space to spare in the id.
>
> If they're not a power of 2, we can still bmp it to the next power of 2 size, no?
Yes, that's what I meant by it not being a huge deal and documenting
whether the padding is on the right or the left. Just seems a little
more awkward than necessary, given that we have room to encode it as a
plain linear size.
-Scott
WARNING: multiple messages have this Message-ID (diff)
From: Scott Wood <scottwood@freescale.com>
To: Alexander Graf <agraf@suse.de>
Cc: "<kvm-ppc@vger.kernel.org>" <kvm-ppc@vger.kernel.org>,
kvm list <kvm@vger.kernel.org>, Avi Kivity <avi@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>
Subject: Re: [PATCH] KVM: PPC: Add generic single register ioctls
Date: Mon, 9 Jan 2012 14:12:19 -0600 [thread overview]
Message-ID: <4F0B4A23.9070808@freescale.com> (raw)
In-Reply-To: <C1F8E785-7BEA-401C-8BF7-A277F16D6C03@suse.de>
On 01/09/2012 02:11 PM, Alexander Graf wrote:
>
>
> Am 09.01.2012 um 20:07 schrieb Scott Wood <scottwood@freescale.com>:
>
>> On 01/06/2012 06:52 PM, Alexander Graf wrote:
>>>
>>>
>>> On 06.01.2012, at 20:32, Scott Wood <scottwood@freescale.com> wrote:
>>>
>>>> On 01/05/2012 10:15 PM, Alexander Graf wrote:
>>>>
>>>>> +/*
>>>>> + * Architecture specific registers are to be defined in arch headers and
>>>>> + * ORed with the arch identifier.
>>>>> + */
>>>>> +#define KVM_REG_PPC 0x1000000000000000ULL
>>>>> +#define KVM_REG_X86 0x2000000000000000ULL
>>>>> +#define KVM_REG_IA64 0x3000000000000000ULL
>>>>> +#define KVM_REG_ARM 0x4000000000000000ULL
>>>>> +#define KVM_REG_S390 0x5000000000000000ULL
>>>>> +
>>>>> +#define KVM_REG_SIZE_SHIFT 52
>>>>> +#define KVM_REG_SIZE_MASK 0x00f0000000000000ULL
>>>>> +#define KVM_REG_SIZE_U8 0x0000000000000000ULL
>>>>> +#define KVM_REG_SIZE_U16 0x0010000000000000ULL
>>>>> +#define KVM_REG_SIZE_U32 0x0020000000000000ULL
>>>>> +#define KVM_REG_SIZE_U64 0x0030000000000000ULL
>>>>> +#define KVM_REG_SIZE_U128 0x0040000000000000ULL
>>>>> +#define KVM_REG_SIZE_U256 0x0050000000000000ULL
>>>>> +#define KVM_REG_SIZE_U512 0x0060000000000000ULL
>>>>> +#define KVM_REG_SIZE_U1024 0x0070000000000000ULL
>>>>
>>>> Why not just encode directly as number of bytes?
>>>
>>> Because this is 1 << n bytes :)
>>
>> Some registers may not be a power-of-2 number of bytes (e.g. x86 segment
>> descriptors), and we've got plenty of space to spare in the id.
>
> If they're not a power of 2, we can still bmp it to the next power of 2 size, no?
Yes, that's what I meant by it not being a huge deal and documenting
whether the padding is on the right or the left. Just seems a little
more awkward than necessary, given that we have room to encode it as a
plain linear size.
-Scott
next prev parent reply other threads:[~2012-01-09 20:12 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-06 3:59 [PATCH 0/3] GET/SET_ONE_REG and HIOR patches v2 Alexander Graf
2012-01-06 3:59 ` Alexander Graf
2012-01-06 3:59 ` [PATCH 1/3] KVM: PPC: Add generic single register ioctls Alexander Graf
2012-01-06 3:59 ` Alexander Graf
2012-01-06 3:49 ` Alexander Graf
2012-01-06 3:49 ` Alexander Graf
2012-01-06 4:15 ` [PATCH] " Alexander Graf
2012-01-06 4:15 ` Alexander Graf
2012-01-06 19:32 ` Scott Wood
2012-01-06 19:32 ` Scott Wood
2012-01-07 0:52 ` Alexander Graf
2012-01-07 0:52 ` Alexander Graf
2012-01-09 19:07 ` Scott Wood
2012-01-09 19:07 ` Scott Wood
2012-01-09 20:11 ` Alexander Graf
2012-01-09 20:11 ` Alexander Graf
2012-01-09 20:12 ` Scott Wood [this message]
2012-01-09 20:12 ` Scott Wood
2012-01-09 20:14 ` Alexander Graf
2012-01-09 20:14 ` Alexander Graf
2012-01-06 3:59 ` [PATCH 2/3] KVM: PPC: Add support for explicit HIOR setting Alexander Graf
2012-01-06 3:59 ` Alexander Graf
2012-01-06 18:42 ` Scott Wood
2012-01-06 18:42 ` Scott Wood
2012-04-01 19:51 ` Andreas Schwab
2012-04-01 19:51 ` Andreas Schwab
2012-04-16 16:54 ` Alexander Graf
2012-04-16 16:54 ` Alexander Graf
2012-04-16 21:42 ` Paul Mackerras
2012-04-16 21:42 ` Paul Mackerras
2012-01-06 3:59 ` [PATCH 3/3] KVM: PPC: Move kvm_vcpu_ioctl_[gs]et_one_reg down to platform-specific code Alexander Graf
2012-01-06 3:59 ` Alexander Graf
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