* [Qemu-devel] [PATCH RFC v2 1/8] qom: Allow object_class_foreach() to take additional parameters to refine search
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 2/8] qom: Register QOM infrastructure early Andreas Färber
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel; +Cc: Anthony Liguori, Andreas Färber
From: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
include/qemu/object.h | 1 +
qom/object.c | 18 ++++++++++++++++--
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/include/qemu/object.h b/include/qemu/object.h
index ba37850..adbcfb1 100644
--- a/include/qemu/object.h
+++ b/include/qemu/object.h
@@ -431,6 +431,7 @@ const char *object_class_get_name(ObjectClass *klass);
ObjectClass *object_class_by_name(const char *typename);
void object_class_foreach(void (*fn)(ObjectClass *klass, void *opaque),
+ const char *implements_type, bool include_abstract,
void *opaque);
#endif
diff --git a/qom/object.c b/qom/object.c
index a12895f..3dabb1a 100644
--- a/qom/object.c
+++ b/qom/object.c
@@ -467,6 +467,8 @@ ObjectClass *object_class_by_name(const char *typename)
typedef struct OCFData
{
void (*fn)(ObjectClass *klass, void *opaque);
+ const char *implements_type;
+ bool include_abstract;
void *opaque;
} OCFData;
@@ -475,16 +477,28 @@ static void object_class_foreach_tramp(gpointer key, gpointer value,
{
OCFData *data = opaque;
TypeImpl *type = value;
+ ObjectClass *k;
type_class_init(type);
+ k = type->class;
- data->fn(value, type->class);
+ if (!data->include_abstract && type->abstract) {
+ return;
+ }
+
+ if (data->implements_type &&
+ !object_class_dynamic_cast(k, data->implements_type)) {
+ return;
+ }
+
+ data->fn(k, data->opaque);
}
void object_class_foreach(void (*fn)(ObjectClass *klass, void *opaque),
+ const char *implements_type, bool include_abstract,
void *opaque)
{
- OCFData data = { fn, opaque };
+ OCFData data = { fn, implements_type, include_abstract, opaque };
g_hash_table_foreach(type_table_get(), object_class_foreach_tramp, &data);
}
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread* [Qemu-devel] [PATCH RFC v2 2/8] qom: Register QOM infrastructure early
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 1/8] qom: Allow object_class_foreach() to take additional parameters to refine search Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 3/8] qom: Add QOM support to user emulators Andreas Färber
` (5 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
QOM TYPE_INTERFACE was registered with device_init(), whose
constructors are executed rather late in vl.c's main().
Rename the module init type from DEVICE to QOM and call it very early
so that QOM can safely be used for machines and CPUs.
device_init() is left for legacy types. New ones should use type_init().
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
---
module.h | 5 +++--
vl.c | 4 ++--
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/module.h b/module.h
index ef66730..56391a5 100644
--- a/module.h
+++ b/module.h
@@ -21,15 +21,16 @@ static void __attribute__((constructor)) do_qemu_init_ ## function(void) { \
}
typedef enum {
+ MODULE_INIT_QOM,
MODULE_INIT_BLOCK,
- MODULE_INIT_DEVICE,
MODULE_INIT_MACHINE,
MODULE_INIT_QAPI,
MODULE_INIT_MAX
} module_init_type;
+#define type_init(function) module_init(function, MODULE_INIT_QOM)
#define block_init(function) module_init(function, MODULE_INIT_BLOCK)
-#define device_init(function) module_init(function, MODULE_INIT_DEVICE)
+#define device_init(function) module_init(function, MODULE_INIT_QOM)
#define machine_init(function) module_init(function, MODULE_INIT_MACHINE)
#define qapi_init(function) module_init(function, MODULE_INIT_QAPI)
diff --git a/vl.c b/vl.c
index d88a18c..69110f2 100644
--- a/vl.c
+++ b/vl.c
@@ -2208,6 +2208,8 @@ int main(int argc, char **argv, char **envp)
#endif
}
+ module_call_init(MODULE_INIT_QOM);
+
runstate_init();
init_clocks();
@@ -3347,8 +3349,6 @@ int main(int argc, char **argv, char **envp)
if (foreach_device_config(DEV_DEBUGCON, debugcon_parse) < 0)
exit(1);
- module_call_init(MODULE_INIT_DEVICE);
-
/* must be after qdev registration but before machine init */
if (vga_model) {
select_vgahw(vga_model);
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread* [Qemu-devel] [PATCH RFC v2 3/8] qom: Add QOM support to user emulators
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 1/8] qom: Allow object_class_foreach() to take additional parameters to refine search Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 2/8] qom: Register QOM infrastructure early Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 4/8] qom: Introduce CPU class Andreas Färber
` (4 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
Link the Object base class and the module infrastructure for class
registration. Call QOM module init.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
---
Makefile.target | 6 ++++++
Makefile.user | 1 +
bsd-user/main.c | 2 ++
darwin-user/main.c | 3 +++
linux-user/main.c | 2 ++
5 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/Makefile.target b/Makefile.target
index 68481a3..d1b7867 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -129,6 +129,8 @@ obj-m68k-y += m68k-sim.o m68k-semi.o
$(obj-y) $(obj-$(TARGET_BASE_ARCH)-y): $(GENERATED_HEADERS)
+obj-y += module.o
+obj-y += $(addprefix ../qom/, $(qom-y))
obj-y += $(addprefix ../libuser/, $(user-obj-y))
obj-y += $(addprefix ../libdis-user/, $(libdis-y))
obj-y += $(libobj-y)
@@ -156,6 +158,8 @@ obj-i386-y += ioport-user.o
$(obj-y) $(obj-$(TARGET_BASE_ARCH)-y): $(GENERATED_HEADERS)
+obj-y += module.o
+obj-y += $(addprefix ../qom/, $(qom-y))
obj-y += $(addprefix ../libuser/, $(user-obj-y))
obj-y += $(addprefix ../libdis-user/, $(libdis-y))
obj-y += $(libobj-y)
@@ -178,6 +182,8 @@ obj-i386-y += ioport-user.o
$(obj-y) $(obj-$(TARGET_BASE_ARCH)-y): $(GENERATED_HEADERS)
+obj-y += module.o
+obj-y += $(addprefix ../qom/, $(qom-y))
obj-y += $(addprefix ../libuser/, $(user-obj-y))
obj-y += $(addprefix ../libdis-user/, $(libdis-y))
obj-y += $(libobj-y)
diff --git a/Makefile.user b/Makefile.user
index 2b1e4d1..72d01c1 100644
--- a/Makefile.user
+++ b/Makefile.user
@@ -9,6 +9,7 @@ include $(SRC_PATH)/rules.mak
$(call set-vpath, $(SRC_PATH))
QEMU_CFLAGS+=-I..
+QEMU_CFLAGS+=-I$(SRC_PATH)/include
include $(SRC_PATH)/Makefile.objs
diff --git a/bsd-user/main.c b/bsd-user/main.c
index cc7d4a3..cdb0d0a 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -748,6 +748,8 @@ int main(int argc, char **argv)
if (argc <= 1)
usage();
+ module_call_init(MODULE_INIT_QOM);
+
if ((envlist = envlist_create()) == NULL) {
(void) fprintf(stderr, "Unable to allocate envlist\n");
exit(1);
diff --git a/darwin-user/main.c b/darwin-user/main.c
index 9b57c20..e1519c7 100644
--- a/darwin-user/main.c
+++ b/darwin-user/main.c
@@ -28,6 +28,7 @@
#include <sys/mman.h>
#include "qemu.h"
+#include "qemu-common.h"
#define DEBUG_LOGFILE "/tmp/qemu.log"
@@ -749,6 +750,8 @@ int main(int argc, char **argv)
if (argc <= 1)
usage();
+ module_call_init(MODULE_INIT_QOM);
+
optind = 1;
for(;;) {
if (optind >= argc)
diff --git a/linux-user/main.c b/linux-user/main.c
index 64d2208..f55109c 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -3278,6 +3278,8 @@ int main(int argc, char **argv, char **envp)
int i;
int ret;
+ module_call_init(MODULE_INIT_QOM);
+
qemu_cache_utils_init(envp);
if ((envlist = envlist_create()) == NULL) {
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread* [Qemu-devel] [PATCH RFC v2 4/8] qom: Introduce CPU class
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
` (2 preceding siblings ...)
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 3/8] qom: Add QOM support to user emulators Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
2012-02-01 22:25 ` Peter Maydell
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 5/8] target-arm: Introduce QOM CPU and use it for CPUID lookup Andreas Färber
` (3 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
It's abstract and derived directly from TYPE_OBJECT.
Prepare a virtual reset method.
Place it in hw/. Have user emulators pick it up via VPATH, building it
per target since they didn't use any qdev/QOM devices so far.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
---
Makefile.objs | 1 +
Makefile.target | 9 +++++--
hw/cpu.c | 39 ++++++++++++++++++++++++++++++++
include/qemu/cpu.h | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 108 insertions(+), 3 deletions(-)
create mode 100644 hw/cpu.c
create mode 100644 include/qemu/cpu.h
diff --git a/Makefile.objs b/Makefile.objs
index b942625..a4b20fa 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -189,6 +189,7 @@ user-obj-y += $(trace-obj-y)
hw-obj-y =
hw-obj-y += vl.o loader.o
+hw-obj-y += cpu.o
hw-obj-$(CONFIG_VIRTIO) += virtio-console.o
hw-obj-y += usb-libhw.o
hw-obj-$(CONFIG_VIRTIO_PCI) += virtio-pci.o
diff --git a/Makefile.target b/Makefile.target
index d1b7867..5d3470e 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -107,7 +107,7 @@ signal.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
ifdef CONFIG_LINUX_USER
-$(call set-vpath, $(SRC_PATH)/linux-user:$(SRC_PATH)/linux-user/$(TARGET_ABI_DIR))
+$(call set-vpath, $(SRC_PATH)/linux-user:$(SRC_PATH)/linux-user/$(TARGET_ABI_DIR):$(SRC_PATH)/hw)
QEMU_CFLAGS+=-I$(SRC_PATH)/linux-user/$(TARGET_ABI_DIR) -I$(SRC_PATH)/linux-user
obj-y = main.o syscall.o strace.o mmap.o signal.o thunk.o \
@@ -130,6 +130,7 @@ obj-m68k-y += m68k-sim.o m68k-semi.o
$(obj-y) $(obj-$(TARGET_BASE_ARCH)-y): $(GENERATED_HEADERS)
obj-y += module.o
+obj-y += cpu.o
obj-y += $(addprefix ../qom/, $(qom-y))
obj-y += $(addprefix ../libuser/, $(user-obj-y))
obj-y += $(addprefix ../libdis-user/, $(libdis-y))
@@ -142,7 +143,7 @@ endif #CONFIG_LINUX_USER
ifdef CONFIG_DARWIN_USER
-$(call set-vpath, $(SRC_PATH)/darwin-user)
+$(call set-vpath, $(SRC_PATH)/darwin-user:$(SRC_PATH)/hw)
QEMU_CFLAGS+=-I$(SRC_PATH)/darwin-user -I$(SRC_PATH)/darwin-user/$(TARGET_ARCH)
@@ -159,6 +160,7 @@ obj-i386-y += ioport-user.o
$(obj-y) $(obj-$(TARGET_BASE_ARCH)-y): $(GENERATED_HEADERS)
obj-y += module.o
+obj-y += cpu.o
obj-y += $(addprefix ../qom/, $(qom-y))
obj-y += $(addprefix ../libuser/, $(user-obj-y))
obj-y += $(addprefix ../libdis-user/, $(libdis-y))
@@ -171,7 +173,7 @@ endif #CONFIG_DARWIN_USER
ifdef CONFIG_BSD_USER
-$(call set-vpath, $(SRC_PATH)/bsd-user)
+$(call set-vpath, $(SRC_PATH)/bsd-user:$(SRC_PATH)/hw)
QEMU_CFLAGS+=-I$(SRC_PATH)/bsd-user -I$(SRC_PATH)/bsd-user/$(TARGET_ARCH)
@@ -183,6 +185,7 @@ obj-i386-y += ioport-user.o
$(obj-y) $(obj-$(TARGET_BASE_ARCH)-y): $(GENERATED_HEADERS)
obj-y += module.o
+obj-y += cpu.o
obj-y += $(addprefix ../qom/, $(qom-y))
obj-y += $(addprefix ../libuser/, $(user-obj-y))
obj-y += $(addprefix ../libdis-user/, $(libdis-y))
diff --git a/hw/cpu.c b/hw/cpu.c
new file mode 100644
index 0000000..1502fee
--- /dev/null
+++ b/hw/cpu.c
@@ -0,0 +1,39 @@
+/*
+ * QEMU CPU model
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * Licensed under the terms of the GNU GPL version 2
+ * or (at your option) any later version.
+ */
+
+#include "qemu/cpu.h"
+#include "qemu-common.h"
+
+void cpu_do_reset(CPU *cpu)
+{
+ CPUClass *klass = CPU_GET_CLASS(cpu);
+
+ if (klass->reset != NULL) {
+ (*klass->reset)(cpu);
+ }
+}
+
+void cpu_common_reset(CPU *cpu)
+{
+}
+
+static TypeInfo cpu_type_info = {
+ .name = TYPE_CPU,
+ .parent = TYPE_OBJECT,
+ .instance_size = sizeof(CPU),
+ .abstract = true,
+ .class_size = sizeof(CPUClass),
+};
+
+static void cpu_register_types(void)
+{
+ type_register_static(&cpu_type_info);
+}
+
+type_init(cpu_register_types)
diff --git a/include/qemu/cpu.h b/include/qemu/cpu.h
new file mode 100644
index 0000000..cccf4a5
--- /dev/null
+++ b/include/qemu/cpu.h
@@ -0,0 +1,62 @@
+/*
+ * QEMU CPU model
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * Licensed under the terms of the GNU GPL version 2
+ * or (at your option) any later version.
+ */
+#ifndef QEMU_CPU_H
+#define QEMU_CPU_H
+
+#include "qemu/object.h"
+
+#define TYPE_CPU "cpu"
+
+#define CPU(obj) OBJECT_CHECK(CPU, (obj), TYPE_CPU)
+#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
+#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
+
+typedef struct CPU CPU;
+
+/**
+ * CPUClass:
+ * @reset: Callback to reset the #CPU to its initial state.
+ *
+ * Represents a CPU family or model.
+ */
+typedef struct CPUClass {
+ ObjectClass parent_class;
+
+ void (*reset)(CPU *cpu);
+} CPUClass;
+
+/**
+ * CPU:
+ *
+ * State of one CPU core or thread.
+ */
+struct CPU {
+ Object parent_obj;
+
+ /* TODO Move common fields from CPUState here. */
+};
+
+
+/* TODO Rename to cpu_reset once all CPUState is converted to QOM. */
+/**
+ * cpu_do_reset:
+ * @cpu: The CPU whose state is to be reset.
+ */
+void cpu_do_reset(CPU *cpu);
+
+/**
+ * cpu_common_reset:
+ * @cpu: The CPU whose common state is to be reset.
+ *
+ * To be used by derived classes.
+ */
+void cpu_common_reset(CPU *cpu);
+
+
+#endif
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [Qemu-devel] [PATCH RFC v2 4/8] qom: Introduce CPU class
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 4/8] qom: Introduce CPU class Andreas Färber
@ 2012-02-01 22:25 ` Peter Maydell
0 siblings, 0 replies; 11+ messages in thread
From: Peter Maydell @ 2012-02-01 22:25 UTC (permalink / raw)
To: Andreas Färber; +Cc: Anthony Liguori, qemu-devel
On 1 February 2012 12:57, Andreas Färber <afaerber@suse.de> wrote:
> It's abstract and derived directly from TYPE_OBJECT.
> Prepare a virtual reset method.
>
> Place it in hw/. Have user emulators pick it up via VPATH, building it
> per target since they didn't use any qdev/QOM devices so far.
> ifdef CONFIG_LINUX_USER
>
> -$(call set-vpath, $(SRC_PATH)/linux-user:$(SRC_PATH)/linux-user/$(TARGET_ABI_DIR))
> +$(call set-vpath, $(SRC_PATH)/linux-user:$(SRC_PATH)/linux-user/$(TARGET_ABI_DIR):$(SRC_PATH)/hw)
I don't think we should go down the path of adding hw/ to the vpath
path for the user-mode emulators. hw/ is for system emulator specific
code and I don't think we should change that.
On the other hand I don't have an immediate answer to where it
should go instead and we didn't seem to come up with a clear answer
on IRC either. Anthony seems to be suggesting that as we do "proper"
QOM conversions on devices we move them out of hw/, I think, in
which case maybe we should put this in wherever the new right
place is (under some new subdir of qom/ ?)
-- PMM
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH RFC v2 5/8] target-arm: Introduce QOM CPU and use it for CPUID lookup
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
` (3 preceding siblings ...)
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 4/8] qom: Introduce CPU class Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
2012-02-01 16:16 ` Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 6/8] target-arm: Embed CPUARMState in QOM ARMCPU Andreas Färber
` (2 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber, Paul Brook
Create a CPU subclass, and register classes matching all CPU models.
Don't name the file target-arm/cpu.c so that the user emulators can
still easily pick up the base class in hw/cpu.c via VPATH.
Make arm_cpu_list() enumerate CPU subclasses.
Replace cpu_arm_find_by_name()'s string -> CPUID lookup by storing the
CPUID in the class.
NB: CPUIDs were first introduced by Paul Brook in r1765 (2006).
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Paul Brook <paul@codesourcery.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
Makefile.target | 1 +
target-arm/cpu-core.c | 181 +++++++++++++++++++++++++++++++++++++++++++++++++
target-arm/cpu-core.h | 45 ++++++++++++
target-arm/helper.c | 80 ++++++----------------
4 files changed, 249 insertions(+), 58 deletions(-)
create mode 100644 target-arm/cpu-core.c
create mode 100644 target-arm/cpu-core.h
diff --git a/Makefile.target b/Makefile.target
index 5d3470e..96043c4 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -80,6 +80,7 @@ endif
libobj-$(TARGET_SPARC64) += vis_helper.o
libobj-$(CONFIG_NEED_MMU) += mmu.o
libobj-$(TARGET_ARM) += neon_helper.o iwmmxt_helper.o
+libobj-$(TARGET_ARM) += cpu-core.o
ifeq ($(TARGET_BASE_ARCH), sparc)
libobj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
libobj-y += cpu_init.o
diff --git a/target-arm/cpu-core.c b/target-arm/cpu-core.c
new file mode 100644
index 0000000..b255741
--- /dev/null
+++ b/target-arm/cpu-core.c
@@ -0,0 +1,181 @@
+/*
+ * QEMU ARM CPU core
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * Licensed under the terms of the GNU GPL version 2
+ * or (at your option) any later version.
+ */
+
+#include "cpu-core.h"
+#include "qemu-common.h"
+
+static void arm_cpu_reset(CPU *c)
+{
+ cpu_common_reset(c);
+}
+
+/* CPU models */
+
+typedef struct ARMCPUInfo {
+ const char *name;
+ const char *alias;
+ uint32_t id;
+} ARMCPUInfo;
+
+static const ARMCPUInfo arm_cpus[] = {
+ {
+ .name = "arm926",
+ .id = 0x41069265,
+ },
+ {
+ .name = "arm946",
+ .id = 0x41059461,
+ },
+ {
+ .name = "arm1026",
+ .id = 0x4106a262,
+ },
+ /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
+ * older core than plain "arm1136". In particular this does not
+ * have the v6K features.
+ */
+ {
+ .name = "arm1136-r2",
+ .id = 0x4107b362,
+ },
+ {
+ .name = "arm1136",
+ .id = 0x4117b363,
+ },
+ {
+ .name = "arm1176",
+ .id = 0x410fb767,
+ },
+ {
+ .name = "arm11mpcore",
+ .id = 0x410fb022,
+ },
+ {
+ .name = "cortex-m3",
+ .id = 0x410fc231,
+ },
+ {
+ .name = "cortex-a8",
+ .id = 0x410fc080,
+ },
+ {
+ .name = "cortex-a9",
+ .id = 0x410fc090,
+ },
+ {
+ .name = "cortex-a15",
+ .id = 0x412fc0f1,
+ },
+ {
+ .name = "ti925t",
+ .id = 0x54029252,
+ },
+ {
+ .name = "sa1100",
+ .id = 0x4401A11B,
+ },
+ {
+ .name = "sa1110",
+ .id = 0x6901B119,
+ },
+ {
+ .name = "pxa250",
+ .id = 0x69052100,
+ },
+ {
+ .name = "pxa255",
+ .id = 0x69052d00,
+ },
+ {
+ .name = "pxa260",
+ .id = 0x69052903,
+ },
+ {
+ .name = "pxa261",
+ .id = 0x69052d05,
+ },
+ {
+ .name = "pxa262",
+ .id = 0x69052d06,
+ },
+ {
+ .name = "pxa270-a0",
+ .alias = "pxa270",
+ .id = 0x69054110,
+ },
+ {
+ .name = "pxa270-a1",
+ .id = 0x69054111,
+ },
+ {
+ .name = "pxa270-b0",
+ .id = 0x69054112,
+ },
+ {
+ .name = "pxa270-b1",
+ .id = 0x69054113,
+ },
+ {
+ .name = "pxa270-c0",
+ .id = 0x69054114,
+ },
+ {
+ .name = "pxa270-c5",
+ .id = 0x69054117,
+ },
+ {
+ .name = "any",
+ .id = 0xffffffff,
+ },
+};
+
+static void arm_cpu_class_init(ObjectClass *klass, void *data)
+{
+ ARMCPUClass *k = ARM_CPU_CLASS(klass);
+ CPUClass *cpu_class = CPU_CLASS(klass);
+ const ARMCPUInfo *info = data;
+
+ cpu_class->reset = arm_cpu_reset;
+
+ k->id = info->id;
+}
+
+static void cpu_register(const ARMCPUInfo *info)
+{
+ TypeInfo type = {
+ .name = info->name,
+ .parent = TYPE_ARM_CPU,
+ .instance_size = sizeof(ARMCPU),
+ .class_size = sizeof(ARMCPUClass),
+ .class_init = arm_cpu_class_init,
+ .class_data = (void *)info,
+ };
+
+ type_register_static(&type);
+}
+
+static TypeInfo arm_cpu_type_info = {
+ .name = TYPE_ARM_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(ARMCPU),
+ .abstract = true,
+ .class_size = sizeof(ARMCPUClass),
+};
+
+static void arm_cpu_types_init(void)
+{
+ int i;
+
+ type_register_static(&arm_cpu_type_info);
+ for (i = 0; i < ARRAY_SIZE(arm_cpus); i++) {
+ cpu_register(&arm_cpus[i]);
+ }
+}
+
+type_init(arm_cpu_types_init)
diff --git a/target-arm/cpu-core.h b/target-arm/cpu-core.h
new file mode 100644
index 0000000..ccc5503
--- /dev/null
+++ b/target-arm/cpu-core.h
@@ -0,0 +1,45 @@
+/*
+ * QEMU ARM CPU core
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * Licensed under the terms of the GNU GPL version 2
+ * or (at your option) any later version.
+ */
+#ifndef QEMU_ARM_CPU_CORE_H
+#define QEMU_ARM_CPU_CORE_H
+
+#include "qemu/cpu.h"
+
+#define TYPE_ARM_CPU "arm-cpu"
+
+#define ARM_CPU_CLASS(klass) \
+ OBJECT_CLASS_CHECK(ARMCPUClass, (klass), TYPE_ARM_CPU)
+#define ARM_CPU(obj) \
+ OBJECT_CHECK(ARMCPU, (obj), TYPE_ARM_CPU)
+#define ARM_CPU_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(ARMCPUClass, (obj), TYPE_ARM_CPU)
+
+/**
+ * ARMCPUClass:
+ * @id: CPUID value.
+ *
+ * An ARM CPU model.
+ */
+typedef struct ARMCPUClass {
+ CPUClass parent_class;
+
+ uint32_t id;
+} ARMCPUClass;
+
+/**
+ * ARMCPU:
+ *
+ * An ARM CPU core.
+ */
+typedef struct ARMCPU {
+ CPU parent_obj;
+} ARMCPU;
+
+
+#endif
diff --git a/target-arm/helper.c b/target-arm/helper.c
index ea4f35f..3f34d8d 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -11,6 +11,7 @@
#include "hw/loader.h"
#endif
#include "sysemu.h"
+#include "cpu-core.h"
static uint32_t cortexa15_cp15_c0_c1[8] = {
0x00001131, 0x00011011, 0x02010555, 0x00000000,
@@ -51,8 +52,6 @@ static uint32_t arm1176_cp15_c0_c1[8] =
static uint32_t arm1176_cp15_c0_c2[8] =
{ 0x0140011, 0x12002111, 0x11231121, 0x01102131, 0x01141, 0, 0, 0 };
-static uint32_t cpu_arm_find_by_name(const char *name);
-
static inline void set_feature(CPUARMState *env, int feature)
{
env->features |= 1u << feature;
@@ -400,13 +399,16 @@ static int vfp_gdb_set_reg(CPUState *env, uint8_t *buf, int reg)
CPUARMState *cpu_arm_init(const char *cpu_model)
{
+ ObjectClass *klass;
+ ARMCPUClass *cpu_class;
CPUARMState *env;
- uint32_t id;
static int inited = 0;
- id = cpu_arm_find_by_name(cpu_model);
- if (id == 0)
+ klass = object_class_by_name(cpu_model);
+ if (klass == NULL) {
return NULL;
+ }
+ cpu_class = ARM_CPU_CLASS(klass);
env = g_malloc0(sizeof(CPUARMState));
cpu_exec_init(env);
if (tcg_enabled() && !inited) {
@@ -415,7 +417,7 @@ CPUARMState *cpu_arm_init(const char *cpu_model)
}
env->cpu_model_str = cpu_model;
- env->cp15.c0_cpuid = id;
+ env->cp15.c0_cpuid = cpu_class->id;
cpu_reset(env);
if (arm_feature(env, ARM_FEATURE_NEON)) {
gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
@@ -431,66 +433,28 @@ CPUARMState *cpu_arm_init(const char *cpu_model)
return env;
}
-struct arm_cpu_t {
- uint32_t id;
- const char *name;
+struct ARMCPUListState {
+ fprintf_function cpu_fprintf;
+ FILE *file;
};
-static const struct arm_cpu_t arm_cpu_names[] = {
- { ARM_CPUID_ARM926, "arm926"},
- { ARM_CPUID_ARM946, "arm946"},
- { ARM_CPUID_ARM1026, "arm1026"},
- { ARM_CPUID_ARM1136, "arm1136"},
- { ARM_CPUID_ARM1136_R2, "arm1136-r2"},
- { ARM_CPUID_ARM1176, "arm1176"},
- { ARM_CPUID_ARM11MPCORE, "arm11mpcore"},
- { ARM_CPUID_CORTEXM3, "cortex-m3"},
- { ARM_CPUID_CORTEXA8, "cortex-a8"},
- { ARM_CPUID_CORTEXA9, "cortex-a9"},
- { ARM_CPUID_CORTEXA15, "cortex-a15" },
- { ARM_CPUID_TI925T, "ti925t" },
- { ARM_CPUID_PXA250, "pxa250" },
- { ARM_CPUID_SA1100, "sa1100" },
- { ARM_CPUID_SA1110, "sa1110" },
- { ARM_CPUID_PXA255, "pxa255" },
- { ARM_CPUID_PXA260, "pxa260" },
- { ARM_CPUID_PXA261, "pxa261" },
- { ARM_CPUID_PXA262, "pxa262" },
- { ARM_CPUID_PXA270, "pxa270" },
- { ARM_CPUID_PXA270_A0, "pxa270-a0" },
- { ARM_CPUID_PXA270_A1, "pxa270-a1" },
- { ARM_CPUID_PXA270_B0, "pxa270-b0" },
- { ARM_CPUID_PXA270_B1, "pxa270-b1" },
- { ARM_CPUID_PXA270_C0, "pxa270-c0" },
- { ARM_CPUID_PXA270_C5, "pxa270-c5" },
- { ARM_CPUID_ANY, "any"},
- { 0, NULL}
-};
-
-void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
+static void arm_cpu_list_entry(ObjectClass *klass, void *opaque)
{
- int i;
+ struct ARMCPUListState *s = opaque;
- (*cpu_fprintf)(f, "Available CPUs:\n");
- for (i = 0; arm_cpu_names[i].name; i++) {
- (*cpu_fprintf)(f, " %s\n", arm_cpu_names[i].name);
- }
+ (*s->cpu_fprintf)(s->file, " %s\n",
+ object_class_get_name(klass));
}
-/* return 0 if not found */
-static uint32_t cpu_arm_find_by_name(const char *name)
+void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
- int i;
- uint32_t id;
+ struct ARMCPUListState s = {
+ .cpu_fprintf = cpu_fprintf,
+ .file = f,
+ };
- id = 0;
- for (i = 0; arm_cpu_names[i].name; i++) {
- if (strcmp(name, arm_cpu_names[i].name) == 0) {
- id = arm_cpu_names[i].id;
- break;
- }
- }
- return id;
+ (*cpu_fprintf)(f, "Available CPUs:\n");
+ object_class_foreach(arm_cpu_list_entry, TYPE_CPU, false, &s);
}
void cpu_arm_close(CPUARMState *env)
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [Qemu-devel] [PATCH RFC v2 5/8] target-arm: Introduce QOM CPU and use it for CPUID lookup
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 5/8] target-arm: Introduce QOM CPU and use it for CPUID lookup Andreas Färber
@ 2012-02-01 16:16 ` Andreas Färber
0 siblings, 0 replies; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 16:16 UTC (permalink / raw)
To: Andreas Färber; +Cc: Peter Maydell, qemu-devel, Paul Brook
Am 01.02.2012 13:57, schrieb Andreas Färber:
> +/* CPU models */
> +
> +typedef struct ARMCPUInfo {
> + const char *name;
> + const char *alias;
> + uint32_t id;
> +} ARMCPUInfo;
> +
> +static const ARMCPUInfo arm_cpus[] = {
> + {
> + .name = "pxa270-a0",
> + .alias = "pxa270",
Er, forgot about this. This alias should have become a simple strcmp()
in cpu_arm_init(), as pointed out by Anthony.
> + .id = 0x69054110,
> + },
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Qemu-devel] [PATCH RFC v2 6/8] target-arm: Embed CPUARMState in QOM ARMCPU
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
` (4 preceding siblings ...)
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 5/8] target-arm: Introduce QOM CPU and use it for CPUID lookup Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 7/8] target-arm: Prepare model-specific class_init function Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 8/8] target-arm: Move CPU feature flags out of CPUState Andreas Färber
7 siblings, 0 replies; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, Andreas Färber, Paul Brook
We g_malloc0()'ed CPUARMState ourself, and exec.c's cpu_copy() runs
through cpu_init() as well, so we are at liberty to supply the CPUState
any way we see fit. Having CPUARMState as field in the QOM CPU allows
both to access env from an ARMCPU object and to access the QOM Object
and its ObjectClass from an env pointer, in ARM code for now.
The goal is to convert all CPUs to QOM and to use CPU objects in central
places, especially once we have property support for Object.
This will then allow to have TCG AREG0 point to target-specific fields
where small immediate offsets are desired (as pointed out by rth) while
allowing for common fields at known offsets from the base class.
Having the CPUID in ARMCPUClass, we can set it from the instance_init
function. Same for cpu_model_str, which is now the QOM class name.
Make cpu_reset() call cpu_do_reset().
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Paul Brook <paul@codesourcery.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
---
target-arm/cpu-core.c | 13 +++++++++++++
target-arm/cpu-core.h | 11 +++++++++++
target-arm/helper.c | 15 ++++++++-------
3 files changed, 32 insertions(+), 7 deletions(-)
diff --git a/target-arm/cpu-core.c b/target-arm/cpu-core.c
index b255741..1caf9aa 100644
--- a/target-arm/cpu-core.c
+++ b/target-arm/cpu-core.c
@@ -135,6 +135,18 @@ static const ARMCPUInfo arm_cpus[] = {
},
};
+static void arm_cpu_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+ ARMCPUClass *cpu_class = ARM_CPU_GET_CLASS(obj);
+
+ memset(&cpu->env, 0, sizeof(CPUARMState));
+ cpu_exec_init(&cpu->env);
+
+ cpu->env.cpu_model_str = object_get_typename(obj);
+ cpu->env.cp15.c0_cpuid = cpu_class->id;
+}
+
static void arm_cpu_class_init(ObjectClass *klass, void *data)
{
ARMCPUClass *k = ARM_CPU_CLASS(klass);
@@ -152,6 +164,7 @@ static void cpu_register(const ARMCPUInfo *info)
.name = info->name,
.parent = TYPE_ARM_CPU,
.instance_size = sizeof(ARMCPU),
+ .instance_init = arm_cpu_initfn,
.class_size = sizeof(ARMCPUClass),
.class_init = arm_cpu_class_init,
.class_data = (void *)info,
diff --git a/target-arm/cpu-core.h b/target-arm/cpu-core.h
index ccc5503..cd3af77 100644
--- a/target-arm/cpu-core.h
+++ b/target-arm/cpu-core.h
@@ -10,6 +10,7 @@
#define QEMU_ARM_CPU_CORE_H
#include "qemu/cpu.h"
+#include "cpu.h"
#define TYPE_ARM_CPU "arm-cpu"
@@ -39,7 +40,17 @@ typedef struct ARMCPUClass {
*/
typedef struct ARMCPU {
CPU parent_obj;
+
+ /* TODO Inline this and split off common state */
+ CPUARMState env;
} ARMCPU;
+static inline Object *arm_env_get_object(CPUARMState *env)
+{
+ return OBJECT((void *)(env) - offsetof(ARMCPU, env));
+}
+
+#define ENV_GET_OBJECT(e) arm_env_get_object(e)
+
#endif
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3f34d8d..34b1d24 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -292,6 +292,8 @@ void cpu_reset(CPUARMState *env)
log_cpu_state(env, 0);
}
+ cpu_do_reset(CPU(ENV_GET_OBJECT(env)));
+
id = env->cp15.c0_cpuid;
tmp = env->cp15.c15_config_base_address;
memset(env, 0, offsetof(CPUARMState, breakpoints));
@@ -400,7 +402,7 @@ static int vfp_gdb_set_reg(CPUState *env, uint8_t *buf, int reg)
CPUARMState *cpu_arm_init(const char *cpu_model)
{
ObjectClass *klass;
- ARMCPUClass *cpu_class;
+ ARMCPU *cpu;
CPUARMState *env;
static int inited = 0;
@@ -408,16 +410,14 @@ CPUARMState *cpu_arm_init(const char *cpu_model)
if (klass == NULL) {
return NULL;
}
- cpu_class = ARM_CPU_CLASS(klass);
- env = g_malloc0(sizeof(CPUARMState));
- cpu_exec_init(env);
+ cpu = ARM_CPU(object_new_with_type(klass->type));
+ env = &cpu->env;
+
if (tcg_enabled() && !inited) {
inited = 1;
arm_translate_init();
}
- env->cpu_model_str = cpu_model;
- env->cp15.c0_cpuid = cpu_class->id;
cpu_reset(env);
if (arm_feature(env, ARM_FEATURE_NEON)) {
gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg,
@@ -459,7 +459,8 @@ void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
void cpu_arm_close(CPUARMState *env)
{
- g_free(env);
+ Object *obj = ENV_GET_OBJECT(env);
+ object_delete(obj);
}
static int bad_mode_switch(CPUState *env, int mode)
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread* [Qemu-devel] [PATCH RFC v2 7/8] target-arm: Prepare model-specific class_init function
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
` (5 preceding siblings ...)
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 6/8] target-arm: Embed CPUARMState in QOM ARMCPU Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 8/8] target-arm: Move CPU feature flags out of CPUState Andreas Färber
7 siblings, 0 replies; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel; +Cc: Andreas Färber
This allows to share initialization between CPU models.
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
target-arm/cpu-core.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu-core.c b/target-arm/cpu-core.c
index 1caf9aa..8284418 100644
--- a/target-arm/cpu-core.c
+++ b/target-arm/cpu-core.c
@@ -21,6 +21,7 @@ typedef struct ARMCPUInfo {
const char *name;
const char *alias;
uint32_t id;
+ void (*class_init)(ARMCPUClass *klass, const struct ARMCPUInfo *info);
} ARMCPUInfo;
static const ARMCPUInfo arm_cpus[] = {
@@ -156,6 +157,10 @@ static void arm_cpu_class_init(ObjectClass *klass, void *data)
cpu_class->reset = arm_cpu_reset;
k->id = info->id;
+
+ if (info->class_init != NULL) {
+ (*info->class_init)(k, info);
+ }
}
static void cpu_register(const ARMCPUInfo *info)
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread* [Qemu-devel] [PATCH RFC v2 8/8] target-arm: Move CPU feature flags out of CPUState
2012-02-01 12:57 [Qemu-devel] [PATCH RFC v2 0/8] Introduce QOM CPU and use for ARM Andreas Färber
` (6 preceding siblings ...)
2012-02-01 12:57 ` [Qemu-devel] [PATCH RFC v2 7/8] target-arm: Prepare model-specific class_init function Andreas Färber
@ 2012-02-01 12:57 ` Andreas Färber
7 siblings, 0 replies; 11+ messages in thread
From: Andreas Färber @ 2012-02-01 12:57 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Andreas Färber
The internal CPU feature flags were only ever set in
cpu_reset_model_id(). Therefore move their initialization into
ARMCPUClass. We might want to tweak them in the future though (e.g.,
-cpu cortex-r4,+fpu), so keep a copy in ARMCPU. This in turn means we
need to infer features for both ARMCPUClass and ARMCPU, so move feature
inference to arm_infer_features() and use macros to simplify it.
Since cpu.h defines ARMCPUState, which has been incorporated into
ARMCPU, and tries to use arm_feature() in cpu_get_tb_cpu_state(),
move arm_feature() to cpu-core.h and add a forward declaration.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/cpu-core.c | 159 +++++++++++++++++++++++++++++++++++++++++++++++++
target-arm/cpu-core.h | 12 ++++
target-arm/cpu.h | 9 +--
target-arm/helper.c | 95 -----------------------------
target-arm/machine.c | 6 +-
5 files changed, 177 insertions(+), 104 deletions(-)
diff --git a/target-arm/cpu-core.c b/target-arm/cpu-core.c
index 8284418..3dac540 100644
--- a/target-arm/cpu-core.c
+++ b/target-arm/cpu-core.c
@@ -15,27 +15,126 @@ static void arm_cpu_reset(CPU *c)
cpu_common_reset(c);
}
+/* CPU feature flags */
+
+#define ARM_FEATURE(x) (1u << ARM_FEATURE_ ## x)
+
+#define has_feature(x) ((*features & ARM_FEATURE(x)) != 0)
+#define set_feature(x) (*features |= ARM_FEATURE(x))
+
+/**
+ * arm_infer_features:
+ * @features: Pointer to the feature flags of #ARMCPUClass or #ARMCPU.
+ *
+ * Some features automatically imply others.
+ */
+static void arm_infer_features(uint32_t *features)
+{
+ if (has_feature(V7)) {
+ set_feature(VAPA);
+ set_feature(THUMB2);
+ if (!has_feature(M)) {
+ set_feature(V6K);
+ } else {
+ set_feature(V6);
+ }
+ }
+ if (has_feature(V6K)) {
+ set_feature(V6);
+ }
+ if (has_feature(V6)) {
+ set_feature(V5);
+ if (!has_feature(M)) {
+ set_feature(AUXCR);
+ }
+ }
+ if (has_feature(V5)) {
+ set_feature(V4T);
+ }
+ if (has_feature(M)) {
+ set_feature(THUMB_DIV);
+ }
+ if (has_feature(ARM_DIV)) {
+ set_feature(THUMB_DIV);
+ }
+ if (has_feature(VFP4)) {
+ set_feature(VFP3);
+ }
+ if (has_feature(VFP3)) {
+ set_feature(VFP);
+ }
+}
+
+#undef has_feature
+#undef set_feature
+
+static inline void set_class_feature(ARMCPUClass *klass, int feature)
+{
+ klass->features |= 1u << feature;
+}
+
+static inline void unset_class_feature(ARMCPUClass *klass, int feature)
+{
+ klass->features &= ~(1u << feature);
+}
+
/* CPU models */
typedef struct ARMCPUInfo {
const char *name;
const char *alias;
uint32_t id;
+ uint32_t features;
void (*class_init)(ARMCPUClass *klass, const struct ARMCPUInfo *info);
} ARMCPUInfo;
+static void arm1136_r0_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
+{
+ ARMCPUClass *r1_class;
+
+ r1_class = ARM_CPU_CLASS(object_class_by_name("arm1136"));
+
+ k->features = r1_class->features;
+ unset_class_feature(k, ARM_FEATURE_V6K);
+}
+
+static void sa11xx_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
+{
+ set_class_feature(k, ARM_FEATURE_STRONGARM);
+}
+
+static void pxa25x_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
+{
+ set_class_feature(k, ARM_FEATURE_V5);
+ set_class_feature(k, ARM_FEATURE_XSCALE);
+}
+
+static void pxa270_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
+{
+ set_class_feature(k, ARM_FEATURE_V5);
+ set_class_feature(k, ARM_FEATURE_XSCALE);
+ set_class_feature(k, ARM_FEATURE_IWMMXT);
+}
+
static const ARMCPUInfo arm_cpus[] = {
{
.name = "arm926",
.id = 0x41069265,
+ .features = ARM_FEATURE(V5) |
+ ARM_FEATURE(VFP),
},
{
.name = "arm946",
.id = 0x41059461,
+ .features = ARM_FEATURE(V5) |
+ ARM_FEATURE(MPU),
},
{
.name = "arm1026",
.id = 0x4106a262,
+ .features = ARM_FEATURE(V5) |
+ ARM_FEATURE(VFP) |
+ ARM_FEATURE(AUXCR),
},
/* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
* older core than plain "arm1136". In particular this does not
@@ -44,95 +143,150 @@ static const ARMCPUInfo arm_cpus[] = {
{
.name = "arm1136-r2",
.id = 0x4107b362,
+ .class_init = arm1136_r0_class_init,
},
{
.name = "arm1136",
.id = 0x4117b363,
+ .features = ARM_FEATURE(V6) |
+ ARM_FEATURE(VFP),
},
{
.name = "arm1176",
.id = 0x410fb767,
+ .features = ARM_FEATURE(V6K) |
+ ARM_FEATURE(VFP) |
+ ARM_FEATURE(VAPA),
},
{
.name = "arm11mpcore",
.id = 0x410fb022,
+ .features = ARM_FEATURE(V6K) |
+ ARM_FEATURE(VFP) |
+ ARM_FEATURE(VAPA),
},
{
.name = "cortex-m3",
.id = 0x410fc231,
+ .features = ARM_FEATURE(V7) |
+ ARM_FEATURE(M),
},
{
.name = "cortex-a8",
.id = 0x410fc080,
+ .features = ARM_FEATURE(V7) |
+ ARM_FEATURE(VFP3) |
+ ARM_FEATURE(NEON) |
+ ARM_FEATURE(THUMB2EE),
},
{
.name = "cortex-a9",
.id = 0x410fc090,
+ .features = ARM_FEATURE(V7) |
+ ARM_FEATURE(VFP3) |
+ ARM_FEATURE(VFP_FP16) |
+ ARM_FEATURE(NEON) |
+ ARM_FEATURE(THUMB2EE) |
+ /* Note that A9 supports the MP extensions even for
+ * A9UP and single-core A9MP (which are both different
+ * and valid configurations; we don't model A9UP).
+ */
+ ARM_FEATURE(V7MP),
},
{
.name = "cortex-a15",
.id = 0x412fc0f1,
+ .features = ARM_FEATURE(V7) |
+ ARM_FEATURE(VFP4) |
+ ARM_FEATURE(VFP_FP16) |
+ ARM_FEATURE(NEON) |
+ ARM_FEATURE(THUMB2EE) |
+ ARM_FEATURE(ARM_DIV) |
+ ARM_FEATURE(V7MP) |
+ ARM_FEATURE(GENERIC_TIMER),
},
{
.name = "ti925t",
.id = 0x54029252,
+ .features = ARM_FEATURE(V4T) |
+ ARM_FEATURE(OMAPCP),
},
{
.name = "sa1100",
.id = 0x4401A11B,
+ .class_init = sa11xx_class_init,
},
{
.name = "sa1110",
.id = 0x6901B119,
+ .class_init = sa11xx_class_init,
},
{
.name = "pxa250",
.id = 0x69052100,
+ .class_init = pxa25x_class_init,
},
{
.name = "pxa255",
.id = 0x69052d00,
+ .class_init = pxa25x_class_init,
},
{
.name = "pxa260",
.id = 0x69052903,
+ .class_init = pxa25x_class_init,
},
{
.name = "pxa261",
.id = 0x69052d05,
+ .class_init = pxa25x_class_init,
},
{
.name = "pxa262",
.id = 0x69052d06,
+ .class_init = pxa25x_class_init,
},
{
.name = "pxa270-a0",
.alias = "pxa270",
.id = 0x69054110,
+ .class_init = pxa270_class_init,
},
{
.name = "pxa270-a1",
.id = 0x69054111,
+ .class_init = pxa270_class_init,
},
{
.name = "pxa270-b0",
.id = 0x69054112,
+ .class_init = pxa270_class_init,
},
{
.name = "pxa270-b1",
.id = 0x69054113,
+ .class_init = pxa270_class_init,
},
{
.name = "pxa270-c0",
.id = 0x69054114,
+ .class_init = pxa270_class_init,
},
{
.name = "pxa270-c5",
.id = 0x69054117,
+ .class_init = pxa270_class_init,
},
{
.name = "any",
.id = 0xffffffff,
+ .features = ARM_FEATURE(V7) |
+ ARM_FEATURE(VFP4) |
+ ARM_FEATURE(VFP_FP16) |
+ ARM_FEATURE(NEON) |
+ ARM_FEATURE(THUMB2EE) |
+ ARM_FEATURE(ARM_DIV) |
+ ARM_FEATURE(V7MP),
},
};
@@ -141,6 +295,8 @@ static void arm_cpu_initfn(Object *obj)
ARMCPU *cpu = ARM_CPU(obj);
ARMCPUClass *cpu_class = ARM_CPU_GET_CLASS(obj);
+ cpu->features = cpu_class->features;
+
memset(&cpu->env, 0, sizeof(CPUARMState));
cpu_exec_init(&cpu->env);
@@ -157,10 +313,13 @@ static void arm_cpu_class_init(ObjectClass *klass, void *data)
cpu_class->reset = arm_cpu_reset;
k->id = info->id;
+ k->features = info->features;
if (info->class_init != NULL) {
(*info->class_init)(k, info);
}
+
+ arm_infer_features(&k->features);
}
static void cpu_register(const ARMCPUInfo *info)
diff --git a/target-arm/cpu-core.h b/target-arm/cpu-core.h
index cd3af77..4966dba 100644
--- a/target-arm/cpu-core.h
+++ b/target-arm/cpu-core.h
@@ -31,6 +31,9 @@ typedef struct ARMCPUClass {
CPUClass parent_class;
uint32_t id;
+
+ /* Internal CPU feature flags. */
+ uint32_t features;
} ARMCPUClass;
/**
@@ -41,6 +44,9 @@ typedef struct ARMCPUClass {
typedef struct ARMCPU {
CPU parent_obj;
+ /* Internal CPU feature flags. */
+ uint32_t features;
+
/* TODO Inline this and split off common state */
CPUARMState env;
} ARMCPU;
@@ -52,5 +58,11 @@ static inline Object *arm_env_get_object(CPUARMState *env)
#define ENV_GET_OBJECT(e) arm_env_get_object(e)
+static inline int arm_feature(CPUARMState *env, int feature)
+{
+ ARMCPU *cpu = ARM_CPU(ENV_GET_OBJECT(env));
+ return (cpu->features & (1u << feature)) != 0;
+}
+
#endif
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 0d9b39c..b595e48 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -170,9 +170,6 @@ typedef struct CPUARMState {
uint32_t teecr;
uint32_t teehbr;
- /* Internal CPU feature flags. */
- uint32_t features;
-
/* VFP coprocessor state. */
struct {
float64 regs[32];
@@ -385,10 +382,7 @@ enum arm_features {
ARM_FEATURE_GENERIC_TIMER,
};
-static inline int arm_feature(CPUARMState *env, int feature)
-{
- return (env->features & (1u << feature)) != 0;
-}
+static inline int arm_feature(CPUARMState *env, int feature);
void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
@@ -476,6 +470,7 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
#endif
#include "cpu-all.h"
+#include "cpu-core.h"
/* Bit usage in the TB flags field: */
#define ARM_TBFLAG_THUMB_SHIFT 0
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 34b1d24..f98eeae 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -52,47 +52,32 @@ static uint32_t arm1176_cp15_c0_c1[8] =
static uint32_t arm1176_cp15_c0_c2[8] =
{ 0x0140011, 0x12002111, 0x11231121, 0x01102131, 0x01141, 0, 0, 0 };
-static inline void set_feature(CPUARMState *env, int feature)
-{
- env->features |= 1u << feature;
-}
-
static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
{
env->cp15.c0_cpuid = id;
switch (id) {
case ARM_CPUID_ARM926:
- set_feature(env, ARM_FEATURE_V5);
- set_feature(env, ARM_FEATURE_VFP);
env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090;
env->cp15.c0_cachetype = 0x1dd20d2;
env->cp15.c1_sys = 0x00090078;
break;
case ARM_CPUID_ARM946:
- set_feature(env, ARM_FEATURE_V5);
- set_feature(env, ARM_FEATURE_MPU);
env->cp15.c0_cachetype = 0x0f004006;
env->cp15.c1_sys = 0x00000078;
break;
case ARM_CPUID_ARM1026:
- set_feature(env, ARM_FEATURE_V5);
- set_feature(env, ARM_FEATURE_VFP);
- set_feature(env, ARM_FEATURE_AUXCR);
env->vfp.xregs[ARM_VFP_FPSID] = 0x410110a0;
env->cp15.c0_cachetype = 0x1dd20d2;
env->cp15.c1_sys = 0x00090078;
break;
case ARM_CPUID_ARM1136:
/* This is the 1136 r1, which is a v6K core */
- set_feature(env, ARM_FEATURE_V6K);
/* Fall through */
case ARM_CPUID_ARM1136_R2:
/* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
* older core than plain "arm1136". In particular this does not
* have the v6K features.
*/
- set_feature(env, ARM_FEATURE_V6);
- set_feature(env, ARM_FEATURE_VFP);
/* These ID register values are correct for 1136 but may be wrong
* for 1136_r2 (in particular r0p2 does not actually implement most
* of the ID registers).
@@ -106,9 +91,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM1176:
- set_feature(env, ARM_FEATURE_V6K);
- set_feature(env, ARM_FEATURE_VFP);
- set_feature(env, ARM_FEATURE_VAPA);
env->vfp.xregs[ARM_VFP_FPSID] = 0x410120b5;
env->vfp.xregs[ARM_VFP_MVFR0] = 0x11111111;
env->vfp.xregs[ARM_VFP_MVFR1] = 0x00000000;
@@ -118,9 +100,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00050078;
break;
case ARM_CPUID_ARM11MPCORE:
- set_feature(env, ARM_FEATURE_V6K);
- set_feature(env, ARM_FEATURE_VFP);
- set_feature(env, ARM_FEATURE_VAPA);
env->vfp.xregs[ARM_VFP_FPSID] = 0x410120b4;
env->vfp.xregs[ARM_VFP_MVFR0] = 0x11111111;
env->vfp.xregs[ARM_VFP_MVFR1] = 0x00000000;
@@ -129,10 +108,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c0_cachetype = 0x1dd20d2;
break;
case ARM_CPUID_CORTEXA8:
- set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP3);
- set_feature(env, ARM_FEATURE_NEON);
- set_feature(env, ARM_FEATURE_THUMB2EE);
env->vfp.xregs[ARM_VFP_FPSID] = 0x410330c0;
env->vfp.xregs[ARM_VFP_MVFR0] = 0x11110222;
env->vfp.xregs[ARM_VFP_MVFR1] = 0x00011100;
@@ -146,16 +121,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA9:
- set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP3);
- set_feature(env, ARM_FEATURE_VFP_FP16);
- set_feature(env, ARM_FEATURE_NEON);
- set_feature(env, ARM_FEATURE_THUMB2EE);
- /* Note that A9 supports the MP extensions even for
- * A9UP and single-core A9MP (which are both different
- * and valid configurations; we don't model A9UP).
- */
- set_feature(env, ARM_FEATURE_V7MP);
env->vfp.xregs[ARM_VFP_FPSID] = 0x41034000; /* Guess */
env->vfp.xregs[ARM_VFP_MVFR0] = 0x11110222;
env->vfp.xregs[ARM_VFP_MVFR1] = 0x01111111;
@@ -168,14 +133,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXA15:
- set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP4);
- set_feature(env, ARM_FEATURE_VFP_FP16);
- set_feature(env, ARM_FEATURE_NEON);
- set_feature(env, ARM_FEATURE_THUMB2EE);
- set_feature(env, ARM_FEATURE_ARM_DIV);
- set_feature(env, ARM_FEATURE_V7MP);
- set_feature(env, ARM_FEATURE_GENERIC_TIMER);
env->vfp.xregs[ARM_VFP_FPSID] = 0x410430f0;
env->vfp.xregs[ARM_VFP_MVFR0] = 0x10110222;
env->vfp.xregs[ARM_VFP_MVFR1] = 0x11111111;
@@ -189,22 +146,11 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
env->cp15.c1_sys = 0x00c50078;
break;
case ARM_CPUID_CORTEXM3:
- set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_M);
break;
case ARM_CPUID_ANY: /* For userspace emulation. */
- set_feature(env, ARM_FEATURE_V7);
- set_feature(env, ARM_FEATURE_VFP4);
- set_feature(env, ARM_FEATURE_VFP_FP16);
- set_feature(env, ARM_FEATURE_NEON);
- set_feature(env, ARM_FEATURE_THUMB2EE);
- set_feature(env, ARM_FEATURE_ARM_DIV);
- set_feature(env, ARM_FEATURE_V7MP);
break;
case ARM_CPUID_TI915T:
case ARM_CPUID_TI925T:
- set_feature(env, ARM_FEATURE_V4T);
- set_feature(env, ARM_FEATURE_OMAPCP);
env->cp15.c0_cpuid = ARM_CPUID_TI925T; /* Depends on wiring. */
env->cp15.c0_cachetype = 0x5109149;
env->cp15.c1_sys = 0x00000070;
@@ -216,8 +162,6 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_PXA260:
case ARM_CPUID_PXA261:
case ARM_CPUID_PXA262:
- set_feature(env, ARM_FEATURE_V5);
- set_feature(env, ARM_FEATURE_XSCALE);
/* JTAG_ID is ((id << 28) | 0x09265013) */
env->cp15.c0_cachetype = 0xd172172;
env->cp15.c1_sys = 0x00000078;
@@ -228,58 +172,19 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_PXA270_B1:
case ARM_CPUID_PXA270_C0:
case ARM_CPUID_PXA270_C5:
- set_feature(env, ARM_FEATURE_V5);
- set_feature(env, ARM_FEATURE_XSCALE);
/* JTAG_ID is ((id << 28) | 0x09265013) */
- set_feature(env, ARM_FEATURE_IWMMXT);
env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
env->cp15.c0_cachetype = 0xd172172;
env->cp15.c1_sys = 0x00000078;
break;
case ARM_CPUID_SA1100:
case ARM_CPUID_SA1110:
- set_feature(env, ARM_FEATURE_STRONGARM);
env->cp15.c1_sys = 0x00000070;
break;
default:
cpu_abort(env, "Bad CPU ID: %x\n", id);
break;
}
-
- /* Some features automatically imply others: */
- if (arm_feature(env, ARM_FEATURE_V7)) {
- set_feature(env, ARM_FEATURE_VAPA);
- set_feature(env, ARM_FEATURE_THUMB2);
- if (!arm_feature(env, ARM_FEATURE_M)) {
- set_feature(env, ARM_FEATURE_V6K);
- } else {
- set_feature(env, ARM_FEATURE_V6);
- }
- }
- if (arm_feature(env, ARM_FEATURE_V6K)) {
- set_feature(env, ARM_FEATURE_V6);
- }
- if (arm_feature(env, ARM_FEATURE_V6)) {
- set_feature(env, ARM_FEATURE_V5);
- if (!arm_feature(env, ARM_FEATURE_M)) {
- set_feature(env, ARM_FEATURE_AUXCR);
- }
- }
- if (arm_feature(env, ARM_FEATURE_V5)) {
- set_feature(env, ARM_FEATURE_V4T);
- }
- if (arm_feature(env, ARM_FEATURE_M)) {
- set_feature(env, ARM_FEATURE_THUMB_DIV);
- }
- if (arm_feature(env, ARM_FEATURE_ARM_DIV)) {
- set_feature(env, ARM_FEATURE_THUMB_DIV);
- }
- if (arm_feature(env, ARM_FEATURE_VFP4)) {
- set_feature(env, ARM_FEATURE_VFP3);
- }
- if (arm_feature(env, ARM_FEATURE_VFP3)) {
- set_feature(env, ARM_FEATURE_VFP);
- }
}
void cpu_reset(CPUARMState *env)
diff --git a/target-arm/machine.c b/target-arm/machine.c
index f66b8df..c93fded 100644
--- a/target-arm/machine.c
+++ b/target-arm/machine.c
@@ -5,6 +5,7 @@ void cpu_save(QEMUFile *f, void *opaque)
{
int i;
CPUARMState *env = (CPUARMState *)opaque;
+ ARMCPU *cpu = ARM_CPU(ENV_GET_OBJECT(env));
for (i = 0; i < 16; i++) {
qemu_put_be32(f, env->regs[i]);
@@ -61,7 +62,7 @@ void cpu_save(QEMUFile *f, void *opaque)
qemu_put_be32(f, env->cp15.c15_diagnostic);
qemu_put_be32(f, env->cp15.c15_power_diagnostic);
- qemu_put_be32(f, env->features);
+ qemu_put_be32(f, cpu->features);
if (arm_feature(env, ARM_FEATURE_VFP)) {
for (i = 0; i < 16; i++) {
@@ -115,6 +116,7 @@ void cpu_save(QEMUFile *f, void *opaque)
int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
CPUARMState *env = (CPUARMState *)opaque;
+ ARMCPU *cpu = ARM_CPU(ENV_GET_OBJECT(env));
int i;
uint32_t val;
@@ -179,7 +181,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id)
env->cp15.c15_diagnostic = qemu_get_be32(f);
env->cp15.c15_power_diagnostic = qemu_get_be32(f);
- env->features = qemu_get_be32(f);
+ cpu->features = qemu_get_be32(f);
if (arm_feature(env, ARM_FEATURE_VFP)) {
for (i = 0; i < 16; i++) {
--
1.7.7
^ permalink raw reply related [flat|nested] 11+ messages in thread