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From: wmb@firmworks.com (Mitch Bradley)
To: linux-arm-kernel@lists.infradead.org
Subject: An extremely simplified pinctrl bindings proposal
Date: Mon, 06 Feb 2012 09:05:24 -1000	[thread overview]
Message-ID: <4F302474.1020701@firmworks.com> (raw)
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF178E5D3160@HQMAIL01.nvidia.com>

I like the general approach of simplifying the pinctrl thing, as the 
previous approach did not appear to be converging.

One possible name would be "gpconfig" - for general purpose configuration.

The register access model in the strawman proposal is probably too 
simple.  32-bit memory mapped registers are certainly the most common 
subcase on ARM, but there are many other cases that occur in practice:

* Registers that must be accessed with 8, 16, or 64-bit cycles.
* Registers that have side effects on read, so read-mask-write must be 
avoided
* Registers accessed via an index/data cycle pair, thus having locking 
requirements
* Registers that must be read after being written, or otherwise 
requiring some sort of memory-ordering enforcement.
* Time delays between pairs of writes
* PCI configuration registers, which often have some combination of the 
above
* Registers behind serial buses like I2C

Both Open Firmware and ACPI have addressed this general problem.  In 
addition to a numeric identifier for the register, you need to specify 
the access semantics.  It's difficult to finitely enumerate all possible 
cases, but you can get to 99.9% with a modest number of access models, 
and then add new models as needed.

WARNING: multiple messages have this Message-ID (diff)
From: Mitch Bradley <wmb@firmworks.com>
To: Stephen Warren <swarren@nvidia.com>
Cc: "devicetree-discuss@lists.ozlabs.org"
	<devicetree-discuss@lists.ozlabs.org>,
	"cjb@laptop.org" <cjb@laptop.org>,
	Dong Aisheng <dongas86@gmail.com>,
	"ext Tony Lindgren (tony@atomide.com)" <tony@atomide.com>,
	"Linus Walleij (linus.walleij@linaro.org)"
	<linus.walleij@linaro.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"rob.herring@calxeda.com" <rob.herring@calxeda.com>,
	"Grant Likely (grant.likely@secretlab.ca)"
	<grant.likely@secretlab.ca>,
	Thomas Abraham <thomas.abraham@linaro.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"Simon Glass (sjg@chromium.org)" <sjg@chromium.org>,
	Shawn Guo <shawn.guo@linaro.org>,
	Dong Aisheng-B29396 <B29396@freescale.com>,
	"Sascha Hauer (s.hauer@pengutronix.de)" <s.hauer@pengutronix.de>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: An extremely simplified pinctrl bindings proposal
Date: Mon, 06 Feb 2012 09:05:24 -1000	[thread overview]
Message-ID: <4F302474.1020701@firmworks.com> (raw)
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF178E5D3160@HQMAIL01.nvidia.com>

I like the general approach of simplifying the pinctrl thing, as the 
previous approach did not appear to be converging.

One possible name would be "gpconfig" - for general purpose configuration.

The register access model in the strawman proposal is probably too 
simple.  32-bit memory mapped registers are certainly the most common 
subcase on ARM, but there are many other cases that occur in practice:

* Registers that must be accessed with 8, 16, or 64-bit cycles.
* Registers that have side effects on read, so read-mask-write must be 
avoided
* Registers accessed via an index/data cycle pair, thus having locking 
requirements
* Registers that must be read after being written, or otherwise 
requiring some sort of memory-ordering enforcement.
* Time delays between pairs of writes
* PCI configuration registers, which often have some combination of the 
above
* Registers behind serial buses like I2C

Both Open Firmware and ACPI have addressed this general problem.  In 
addition to a numeric identifier for the register, you need to specify 
the access semantics.  It's difficult to finitely enumerate all possible 
cases, but you can get to 99.9% with a modest number of access models, 
and then add new models as needed.

WARNING: multiple messages have this Message-ID (diff)
From: Mitch Bradley <wmb@firmworks.com>
To: Stephen Warren <swarren@nvidia.com>
Cc: Dong Aisheng <dongas86@gmail.com>,
	Shawn Guo <shawn.guo@linaro.org>,
	Dong Aisheng-B29396 <B29396@freescale.com>,
	"Linus Walleij (linus.walleij@linaro.org)"
	<linus.walleij@linaro.org>,
	"Sascha Hauer (s.hauer@pengutronix.de)" <s.hauer@pengutronix.de>,
	"rob.herring@calxeda.com" <rob.herring@calxeda.com>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	"cjb@laptop.org" <cjb@laptop.org>,
	"Simon Glass (sjg@chromium.org)" <sjg@chromium.org>,
	Thomas Abraham <thomas.abraham@linaro.org>,
	"Grant Likely (grant.likely@secretlab.ca)" 
	<grant.likely@secretlab.ca>,
	"ext Tony Lindgren (tony@atomide.com)" <tony@atomide.com>,
	"devicetree-discuss@lists.ozlabs.org" 
	<devicetree-discuss@lists.ozlabs.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: An extremely simplified pinctrl bindings proposal
Date: Mon, 06 Feb 2012 09:05:24 -1000	[thread overview]
Message-ID: <4F302474.1020701@firmworks.com> (raw)
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF178E5D3160@HQMAIL01.nvidia.com>

I like the general approach of simplifying the pinctrl thing, as the 
previous approach did not appear to be converging.

One possible name would be "gpconfig" - for general purpose configuration.

The register access model in the strawman proposal is probably too 
simple.  32-bit memory mapped registers are certainly the most common 
subcase on ARM, but there are many other cases that occur in practice:

* Registers that must be accessed with 8, 16, or 64-bit cycles.
* Registers that have side effects on read, so read-mask-write must be 
avoided
* Registers accessed via an index/data cycle pair, thus having locking 
requirements
* Registers that must be read after being written, or otherwise 
requiring some sort of memory-ordering enforcement.
* Time delays between pairs of writes
* PCI configuration registers, which often have some combination of the 
above
* Registers behind serial buses like I2C

Both Open Firmware and ACPI have addressed this general problem.  In 
addition to a numeric identifier for the register, you need to specify 
the access semantics.  It's difficult to finitely enumerate all possible 
cases, but you can get to 99.9% with a modest number of access models, 
and then add new models as needed.


  parent reply	other threads:[~2012-02-06 19:05 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-05  5:31 An extremely simplified pinctrl bindings proposal Stephen Warren
2012-02-05  5:31 ` Stephen Warren
2012-02-05  5:31 ` Stephen Warren
2012-02-05  6:07 ` Richard Zhao
2012-02-05  6:07   ` Richard Zhao
2012-02-05  6:07   ` Richard Zhao
2012-02-06  3:07 ` Thomas Abraham
2012-02-06  3:07   ` Thomas Abraham
2012-02-06  5:44   ` Stephen Warren
2012-02-06  5:44     ` Stephen Warren
2012-02-06  4:20 ` Linus Walleij
2012-02-06  4:20   ` Linus Walleij
2012-02-06  5:53   ` Stephen Warren
2012-02-06  5:53     ` Stephen Warren
2012-02-06  5:53     ` Stephen Warren
2012-02-06 17:29     ` Linus Walleij
2012-02-06 17:29       ` Linus Walleij
2012-02-06 19:03       ` Tony Lindgren
2012-02-06 19:03         ` Tony Lindgren
2012-02-06 19:03         ` Tony Lindgren
2012-02-06 19:56         ` Linus Walleij
2012-02-06 19:56           ` Linus Walleij
2012-02-06 19:56           ` Linus Walleij
2012-02-06 21:04           ` Tony Lindgren
2012-02-06 21:04             ` Tony Lindgren
2012-02-06 21:04             ` Tony Lindgren
2012-02-06 23:15             ` Linus Walleij
2012-02-06 23:15               ` Linus Walleij
2012-02-06 23:57               ` Tony Lindgren
2012-02-06 23:57                 ` Tony Lindgren
2012-02-06 23:57                 ` Tony Lindgren
2012-02-07  1:07                 ` Linus Walleij
2012-02-07  1:07                   ` Linus Walleij
2012-02-07  1:07                   ` Linus Walleij
2012-02-07  5:28         ` Stephen Warren
2012-02-07  5:28           ` Stephen Warren
2012-02-06 19:41     ` Mark Brown
2012-02-06 19:41       ` Mark Brown
2012-02-06 19:41       ` Mark Brown
2012-02-06 18:57 ` Tony Lindgren
2012-02-06 18:57   ` Tony Lindgren
2012-02-06 18:57   ` Tony Lindgren
2012-02-06 19:05 ` Mitch Bradley [this message]
2012-02-06 19:05   ` Mitch Bradley
2012-02-06 19:05   ` Mitch Bradley
2012-02-06 19:26   ` Linus Walleij
2012-02-06 19:26     ` Linus Walleij
2012-02-06 21:24     ` Mitch Bradley
2012-02-06 21:24       ` Mitch Bradley
2012-02-06 21:24       ` Mitch Bradley
2012-02-07  5:33   ` Stephen Warren
2012-02-07  5:33     ` Stephen Warren
2012-02-07  5:33     ` Stephen Warren
2012-02-07  7:07     ` Mitch Bradley
2012-02-07  7:07       ` Mitch Bradley
2012-02-07  7:07       ` Mitch Bradley

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