Re: [PATCH 1/3] drm/i915: gen7: implement rczunit workaround

[Kenneth Graunke <kenneth@whitecape.org>]

On 02/05/2012 02:47 PM, Eugeni Dodonov wrote:
> This is yet another workaround related to clock gating which we need on
> Ivy Bridge.
>
> Signed-off-by: Eugeni Dodonov<eugeni.dodonov@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_reg.h      |    1 +
>   drivers/gpu/drm/i915/intel_display.c |   14 +++++++++++---
>   2 files changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c3afb78..80fd6b5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3618,6 +3618,7 @@
>   #define    GT_FIFO_NUM_RESERVED_ENTRIES		20
>
>   #define GEN6_UCGCTL2				0x9404
> +# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE		(1<<  13)
>   # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE		(1<<  12)
>   # define GEN6_RCCUNIT_CLOCK_GATE_DISABLE		(1<<  11)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index f1744aa..1defd42 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8396,6 +8396,7 @@ static void gen6_init_clock_gating(struct drm_device *dev)
>   	struct drm_i915_private *dev_priv = dev->dev_private;
>   	int pipe;
>   	uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE;
> +	u32 gstate;
>
>   	I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate);
>
> @@ -8416,10 +8417,17 @@ static void gen6_init_clock_gating(struct drm_device *dev)
>   	 *
>   	 * According to the spec, bit 11 (RCCUNIT) must also be set,
>   	 * but we didn't debug actual testcases to find it out.
> +	 *
> +	 * The bit 13 (RCZUNIT) must also be set, to implement the
> +	 * WaDisableRCZUnitClockGating workaround on Ivy Bridge.
>   	 */
> -	I915_WRITE(GEN6_UCGCTL2,
> -		   GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |
> -		   GEN6_RCCUNIT_CLOCK_GATE_DISABLE);
> +	gstate = GEN6_RCPBUNIT_CLOCK_GATE_DISABLE |
> +		GEN6_RCCUNIT_CLOCK_GATE_DISABLE;
> +
> +	if (IS_IVYBRIDGE(dev))
> +		gstate |= GEN6_RCZUNIT_CLOCK_GATE_DISABLE;
> +
> +	I915_WRITE(GEN6_UCGCTL2, gstate);
>
>   	/*
>   	 * According to the spec the following bits should be

Nack.  gen6_init_clock_gating won't get run on Ivybridge...