* [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
@ 2012-02-17 11:26 ` Vaibhav Hiremath
0 siblings, 0 replies; 8+ messages in thread
From: Vaibhav Hiremath @ 2012-02-17 11:26 UTC (permalink / raw)
To: linux-omap
Cc: khilman, paul, b-cousson, tony, Vaibhav Hiremath, thara,
linux-arm-kernel
In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
is used which is not defined anywhere in the kernel.
Until now the build was going through successfully, since it
is not being used anywhere in kernel.
This bug got introduced by the commit
358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
to specify the offset position of various SYSCONFIG register bits.")
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
---
arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index dbc18ad..55bef2b 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -49,17 +49,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
* with the original PRCM protocol defined for OMAP2420
*/
#define SYSC_TYPE1_MIDLEMODE_SHIFT 12
-#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
+#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
-#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
+#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
#define SYSC_TYPE1_SIDLEMODE_SHIFT 3
-#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
+#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
-#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
+#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
#define SYSC_TYPE1_SOFTRESET_SHIFT 1
-#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
+#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
#define SYSC_TYPE1_AUTOIDLE_SHIFT 0
-#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
+#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
/*
* OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
@ 2012-02-17 11:26 ` Vaibhav Hiremath
0 siblings, 0 replies; 8+ messages in thread
From: Vaibhav Hiremath @ 2012-02-17 11:26 UTC (permalink / raw)
To: linux-arm-kernel
In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
is used which is not defined anywhere in the kernel.
Until now the build was going through successfully, since it
is not being used anywhere in kernel.
This bug got introduced by the commit
358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
to specify the offset position of various SYSCONFIG register bits.")
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
---
arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index dbc18ad..55bef2b 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -49,17 +49,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
* with the original PRCM protocol defined for OMAP2420
*/
#define SYSC_TYPE1_MIDLEMODE_SHIFT 12
-#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
+#define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT)
#define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
-#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
+#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
#define SYSC_TYPE1_SIDLEMODE_SHIFT 3
-#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
+#define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT)
#define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
-#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
+#define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT)
#define SYSC_TYPE1_SOFTRESET_SHIFT 1
-#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
+#define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT)
#define SYSC_TYPE1_AUTOIDLE_SHIFT 0
-#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
+#define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT)
/*
* OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
2012-02-17 11:26 ` Vaibhav Hiremath
@ 2012-02-17 13:37 ` Cousson, Benoit
-1 siblings, 0 replies; 8+ messages in thread
From: Cousson, Benoit @ 2012-02-17 13:37 UTC (permalink / raw)
To: Vaibhav Hiremath; +Cc: khilman, paul, tony, thara, linux-omap, linux-arm-kernel
On 2/17/2012 12:26 PM, Vaibhav Hiremath wrote:
> In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
> is used which is not defined anywhere in the kernel.
> Until now the build was going through successfully, since it
> is not being used anywhere in kernel.
Good catch.
> This bug got introduced by the commit
> 358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
> to specify the offset position of various SYSCONFIG register bits.")
>
> Signed-off-by: Vaibhav Hiremath<hvaibhav@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Regards,
Benoit
> ---
> arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++++++------
> 1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> index dbc18ad..55bef2b 100644
> --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
> +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> @@ -49,17 +49,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
> * with the original PRCM protocol defined for OMAP2420
> */
> #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
> -#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_MIDLEMODE_SHIFT)
> +#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_TYPE1_MIDLEMODE_SHIFT)
> #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
> -#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_CLOCKACTIVITY_SHIFT)
> +#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
> #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
> -#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_SIDLEMODE_SHIFT)
> +#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_TYPE1_SIDLEMODE_SHIFT)
> #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
> -#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_ENAWAKEUP_SHIFT)
> +#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_TYPE1_ENAWAKEUP_SHIFT)
> #define SYSC_TYPE1_SOFTRESET_SHIFT 1
> -#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_SOFTRESET_SHIFT)
> +#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_TYPE1_SOFTRESET_SHIFT)
> #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
> -#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_AUTOIDLE_SHIFT)
> +#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_TYPE1_AUTOIDLE_SHIFT)
>
> /*
> * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
> --
> 1.7.0.4
>
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
@ 2012-02-17 13:37 ` Cousson, Benoit
0 siblings, 0 replies; 8+ messages in thread
From: Cousson, Benoit @ 2012-02-17 13:37 UTC (permalink / raw)
To: linux-arm-kernel
On 2/17/2012 12:26 PM, Vaibhav Hiremath wrote:
> In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
> is used which is not defined anywhere in the kernel.
> Until now the build was going through successfully, since it
> is not being used anywhere in kernel.
Good catch.
> This bug got introduced by the commit
> 358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
> to specify the offset position of various SYSCONFIG register bits.")
>
> Signed-off-by: Vaibhav Hiremath<hvaibhav@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Regards,
Benoit
> ---
> arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++++++------
> 1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> index dbc18ad..55bef2b 100644
> --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
> +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> @@ -49,17 +49,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
> * with the original PRCM protocol defined for OMAP2420
> */
> #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
> -#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_MIDLEMODE_SHIFT)
> +#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_TYPE1_MIDLEMODE_SHIFT)
> #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
> -#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_CLOCKACTIVITY_SHIFT)
> +#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
> #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
> -#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_SIDLEMODE_SHIFT)
> +#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_TYPE1_SIDLEMODE_SHIFT)
> #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
> -#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_ENAWAKEUP_SHIFT)
> +#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_TYPE1_ENAWAKEUP_SHIFT)
> #define SYSC_TYPE1_SOFTRESET_SHIFT 1
> -#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_SOFTRESET_SHIFT)
> +#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_TYPE1_SOFTRESET_SHIFT)
> #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
> -#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_AUTOIDLE_SHIFT)
> +#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_TYPE1_AUTOIDLE_SHIFT)
>
> /*
> * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
> --
> 1.7.0.4
>
^ permalink raw reply [flat|nested] 8+ messages in thread* RE: [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
2012-02-17 13:37 ` Cousson, Benoit
@ 2012-03-12 10:15 ` Hiremath, Vaibhav
-1 siblings, 0 replies; 8+ messages in thread
From: Hiremath, Vaibhav @ 2012-03-12 10:15 UTC (permalink / raw)
To: Cousson, Benoit
Cc: Hilman, Kevin, paul@pwsan.com, tony@atomide.com, Gopinath, Thara,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
On Fri, Feb 17, 2012 at 19:07:34, Cousson, Benoit wrote:
> On 2/17/2012 12:26 PM, Vaibhav Hiremath wrote:
> > In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
> > is used which is not defined anywhere in the kernel.
> > Until now the build was going through successfully, since it
> > is not being used anywhere in kernel.
>
> Good catch.
>
> > This bug got introduced by the commit
> > 358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
> > to specify the offset position of various SYSCONFIG register bits.")
> >
> > Signed-off-by: Vaibhav Hiremath<hvaibhav@ti.com>
>
> Acked-by: Benoit Cousson <b-cousson@ti.com>
>
Tony/Paul,
Can you accept/merge this patch?
Thanks,
Vaibhav
> Regards,
> Benoit
>
>
> > ---
> > arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++++++------
> > 1 files changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> > index dbc18ad..55bef2b 100644
> > --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
> > +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> > @@ -49,17 +49,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
> > * with the original PRCM protocol defined for OMAP2420
> > */
> > #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
> > -#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_MIDLEMODE_SHIFT)
> > +#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_TYPE1_MIDLEMODE_SHIFT)
> > #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
> > -#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_CLOCKACTIVITY_SHIFT)
> > +#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
> > #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
> > -#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_SIDLEMODE_SHIFT)
> > +#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_TYPE1_SIDLEMODE_SHIFT)
> > #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
> > -#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_ENAWAKEUP_SHIFT)
> > +#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_TYPE1_ENAWAKEUP_SHIFT)
> > #define SYSC_TYPE1_SOFTRESET_SHIFT 1
> > -#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_SOFTRESET_SHIFT)
> > +#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_TYPE1_SOFTRESET_SHIFT)
> > #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
> > -#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_AUTOIDLE_SHIFT)
> > +#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_TYPE1_AUTOIDLE_SHIFT)
> >
> > /*
> > * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
> > --
> > 1.7.0.4
> >
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
@ 2012-03-12 10:15 ` Hiremath, Vaibhav
0 siblings, 0 replies; 8+ messages in thread
From: Hiremath, Vaibhav @ 2012-03-12 10:15 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Feb 17, 2012 at 19:07:34, Cousson, Benoit wrote:
> On 2/17/2012 12:26 PM, Vaibhav Hiremath wrote:
> > In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
> > is used which is not defined anywhere in the kernel.
> > Until now the build was going through successfully, since it
> > is not being used anywhere in kernel.
>
> Good catch.
>
> > This bug got introduced by the commit
> > 358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
> > to specify the offset position of various SYSCONFIG register bits.")
> >
> > Signed-off-by: Vaibhav Hiremath<hvaibhav@ti.com>
>
> Acked-by: Benoit Cousson <b-cousson@ti.com>
>
Tony/Paul,
Can you accept/merge this patch?
Thanks,
Vaibhav
> Regards,
> Benoit
>
>
> > ---
> > arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++++++------
> > 1 files changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> > index dbc18ad..55bef2b 100644
> > --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
> > +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
> > @@ -49,17 +49,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type4;
> > * with the original PRCM protocol defined for OMAP2420
> > */
> > #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
> > -#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_MIDLEMODE_SHIFT)
> > +#define SYSC_TYPE1_MIDLEMODE_MASK (0x3<< SYSC_TYPE1_MIDLEMODE_SHIFT)
> > #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
> > -#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_CLOCKACTIVITY_SHIFT)
> > +#define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3<< SYSC_TYPE1_CLOCKACTIVITY_SHIFT)
> > #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
> > -#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_SIDLEMODE_SHIFT)
> > +#define SYSC_TYPE1_SIDLEMODE_MASK (0x3<< SYSC_TYPE1_SIDLEMODE_SHIFT)
> > #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
> > -#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_ENAWAKEUP_SHIFT)
> > +#define SYSC_TYPE1_ENAWAKEUP_MASK (1<< SYSC_TYPE1_ENAWAKEUP_SHIFT)
> > #define SYSC_TYPE1_SOFTRESET_SHIFT 1
> > -#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_SOFTRESET_SHIFT)
> > +#define SYSC_TYPE1_SOFTRESET_MASK (1<< SYSC_TYPE1_SOFTRESET_SHIFT)
> > #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
> > -#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_AUTOIDLE_SHIFT)
> > +#define SYSC_TYPE1_AUTOIDLE_MASK (1<< SYSC_TYPE1_AUTOIDLE_SHIFT)
> >
> > /*
> > * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
> > --
> > 1.7.0.4
> >
>
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
2012-02-17 11:26 ` Vaibhav Hiremath
@ 2012-04-04 15:53 ` Paul Walmsley
-1 siblings, 0 replies; 8+ messages in thread
From: Paul Walmsley @ 2012-04-04 15:53 UTC (permalink / raw)
To: Vaibhav Hiremath
Cc: khilman, b-cousson, tony, thara, linux-omap, linux-arm-kernel
On Fri, 17 Feb 2012, Vaibhav Hiremath wrote:
> In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
> is used which is not defined anywhere in the kernel.
> Until now the build was going through successfully, since it
> is not being used anywhere in kernel.
>
> This bug got introduced by the commit
> 358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
> to specify the offset position of various SYSCONFIG register bits.")
>
> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Thanks, queued for 3.4-rc.
- Paul
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions
@ 2012-04-04 15:53 ` Paul Walmsley
0 siblings, 0 replies; 8+ messages in thread
From: Paul Walmsley @ 2012-04-04 15:53 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, 17 Feb 2012, Vaibhav Hiremath wrote:
> In the SYSC_TYPE1_XXX_MASK configuration, SYSC_XXX_SHIFT macro
> is used which is not defined anywhere in the kernel.
> Until now the build was going through successfully, since it
> is not being used anywhere in kernel.
>
> This bug got introduced by the commit
> 358f0e630d5409ab3837b86db3595560eae773b6 ("OMAP3: hwmod: support
> to specify the offset position of various SYSCONFIG register bits.")
>
> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Thanks, queued for 3.4-rc.
- Paul
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2012-04-04 15:53 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
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2012-02-17 11:26 [PATCH] ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions Vaibhav Hiremath
2012-02-17 11:26 ` Vaibhav Hiremath
2012-02-17 13:37 ` Cousson, Benoit
2012-02-17 13:37 ` Cousson, Benoit
2012-03-12 10:15 ` Hiremath, Vaibhav
2012-03-12 10:15 ` Hiremath, Vaibhav
2012-04-04 15:53 ` Paul Walmsley
2012-04-04 15:53 ` Paul Walmsley
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