All of lore.kernel.org
 help / color / mirror / Atom feed
* RE: SMP MIPS and Linux 3.2
@ 2012-02-22 10:57 Mikael Starvik
  2012-02-23 10:11 ` Deng-Cheng Zhu
  0 siblings, 1 reply; 10+ messages in thread
From: Mikael Starvik @ 2012-02-22 10:57 UTC (permalink / raw)
  To: linux-mips@linux-mips.org

Found it! There are no calls to scheduler_ipi() from the MIPS parts in vanilla 3.2.

/Mikael

-----Original Message-----
From: Mikael Starvik 
Sent: den 20 februari 2012 10:34
To: 'linux-mips@linux-mips.org'
Subject: SMP MIPS and Linux 3.2

I'm running Linux 3.2 on a MIPS 34K with two VPEs (in MT_SMP configuration). It works fine in UP but with SMP it deadlocks during bootup (both CPUs gets idle). Typically like this:

[    0.090000] CPU revision is: 01019550 (MIPS 34Kc) [    0.090000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.090000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [    0.170000] Brought up 2 CPUs <No more output>

I have tried to enable __ARCH_WANT_INTERRUPTS_ON_CTXSW but that didn't improve anything. Anyone else got this running or have any thoughts about what the problem may be?

Best Regards
/Mikael

^ permalink raw reply	[flat|nested] 10+ messages in thread
* SMP MIPS and Linux 3.2
@ 2012-02-20  9:34 Mikael Starvik
  2012-02-21  2:11 ` tiejun.chen
  2012-02-21 10:34 ` Ralf Baechle
  0 siblings, 2 replies; 10+ messages in thread
From: Mikael Starvik @ 2012-02-20  9:34 UTC (permalink / raw)
  To: linux-mips@linux-mips.org

I'm running Linux 3.2 on a MIPS 34K with two VPEs (in MT_SMP configuration). It works fine in UP but with SMP it deadlocks during bootup (both CPUs gets idle). Typically like this:

[    0.090000] CPU revision is: 01019550 (MIPS 34Kc)
[    0.090000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.090000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.170000] Brought up 2 CPUs
<No more output>

I have tried to enable __ARCH_WANT_INTERRUPTS_ON_CTXSW but that didn't improve anything. Anyone else got this running or have any thoughts about what the problem may be?

Best Regards
/Mikael

^ permalink raw reply	[flat|nested] 10+ messages in thread
* SMP MIPS and Linux 3.2
@ 2012-02-13  8:49 Mikael Starvik
  0 siblings, 0 replies; 10+ messages in thread
From: Mikael Starvik @ 2012-02-13  8:49 UTC (permalink / raw)
  To: linux-kernel@vger.kernel.org

I'm running Linux 3.2 on a MIPS 34K with two VPEs (in MT_SMP configuration). It works fine in UP but with SMP it deadlocks during bootup (both CPUs gets idle). Typically like this:

[    0.090000] CPU revision is: 01019550 (MIPS 34Kc)
[    0.090000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.090000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.170000] Brought up 2 CPUs
<No more output>

I have tried to enable __ARCH_WANT_INTERRUPTS_ON_CTXSW but that didn't improve anything. Anyone else got this running or have any thoughts about what the problem may be?

Best Regards
/Mikael

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2012-05-11 12:28 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-02-22 10:57 SMP MIPS and Linux 3.2 Mikael Starvik
2012-02-23 10:11 ` Deng-Cheng Zhu
2012-02-23 16:25   ` John Crispin
2012-02-24  7:53   ` Gandham, Raghu
  -- strict thread matches above, loose matches on Subject: below --
2012-02-20  9:34 Mikael Starvik
2012-02-21  2:11 ` tiejun.chen
2012-05-11 12:28   ` JoeJ
2012-02-21 10:34 ` Ralf Baechle
2012-02-21 15:33   ` John Crispin
2012-02-13  8:49 Mikael Starvik

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.