* [drm-next 01/14] drm/radeon/kms: add wait_for_vblank asic callback
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-24 9:17 ` Michel Dänzer
2012-02-23 22:53 ` [drm-next 02/14] drm/radeon/kms: add a radeon asic callback for mc idle alexdeucher
` (15 subsequent siblings)
16 siblings, 1 reply; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
Required for future functionality.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/evergreen.c | 19 +++++++++++++++++
drivers/gpu/drm/radeon/evergreen_reg.h | 1 +
drivers/gpu/drm/radeon/r100.c | 34 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/radeon/r500_reg.h | 2 +
drivers/gpu/drm/radeon/radeon.h | 3 ++
drivers/gpu/drm/radeon/radeon_asic.c | 17 ++++++++++++++++
drivers/gpu/drm/radeon/radeon_asic.h | 4 ++-
drivers/gpu/drm/radeon/radeon_reg.h | 2 +
drivers/gpu/drm/radeon/rs600.c | 19 +++++++++++++++++
9 files changed, 100 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index f58254a..158ff59 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -68,6 +68,25 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
}
}
+void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc)
+{
+ struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
+ int i;
+
+ if (RREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_MASTER_EN) {
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (!(RREG32(EVERGREEN_CRTC_STATUS + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_V_BLANK))
+ break;
+ udelay(1);
+ }
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (RREG32(EVERGREEN_CRTC_STATUS + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_V_BLANK)
+ break;
+ udelay(1);
+ }
+ }
+}
+
void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc)
{
/* enable the pflip int */
diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h
index 4215de9..96c10b3 100644
--- a/drivers/gpu/drm/radeon/evergreen_reg.h
+++ b/drivers/gpu/drm/radeon/evergreen_reg.h
@@ -219,6 +219,7 @@
# define EVERGREEN_CRTC_MASTER_EN (1 << 0)
# define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 << 24)
#define EVERGREEN_CRTC_STATUS 0x6e8c
+# define EVERGREEN_CRTC_V_BLANK (1 << 0)
#define EVERGREEN_CRTC_STATUS_POSITION 0x6e90
#define EVERGREEN_MASTER_UPDATE_MODE 0x6ef8
#define EVERGREEN_CRTC_UPDATE_LOCK 0x6ed4
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 333cde9..bff612a 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -65,6 +65,40 @@ MODULE_FIRMWARE(FIRMWARE_R520);
#include "r100_track.h"
+void r100_wait_for_vblank(struct radeon_device *rdev, int crtc)
+{
+ struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
+ int i;
+
+ if (radeon_crtc->crtc_id == 0) {
+ if (RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN) {
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (!(RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR))
+ break;
+ udelay(1);
+ }
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR)
+ break;
+ udelay(1);
+ }
+ }
+ } else {
+ if (RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_EN) {
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (!(RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR))
+ break;
+ udelay(1);
+ }
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)
+ break;
+ udelay(1);
+ }
+ }
+ }
+}
+
/* This files gather functions specifics to:
* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
*/
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h
index 3bd8f1b..ec576aa 100644
--- a/drivers/gpu/drm/radeon/r500_reg.h
+++ b/drivers/gpu/drm/radeon/r500_reg.h
@@ -351,6 +351,8 @@
#define AVIVO_D1CRTC_BLANK_CONTROL 0x6084
#define AVIVO_D1CRTC_INTERLACE_CONTROL 0x6088
#define AVIVO_D1CRTC_INTERLACE_STATUS 0x608c
+#define AVIVO_D1CRTC_STATUS 0x609c
+# define AVIVO_D1CRTC_V_BLANK (1 << 0)
#define AVIVO_D1CRTC_STATUS_POSITION 0x60a0
#define AVIVO_D1CRTC_FRAME_COUNT 0x60a4
#define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 509b03d..76d08d8 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1201,6 +1201,8 @@ struct radeon_asic {
void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
void (*post_page_flip)(struct radeon_device *rdev, int crtc);
+ /* wait for vblank */
+ void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
};
/*
@@ -1689,6 +1691,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pre_page_flip((rdev), (crtc))
#define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
#define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
+#define radeon_wait_for_vblank(rdev, crtc) rdev->asic->wait_for_vblank((rdev), (crtc))
/* Common functions */
/* AGP */
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 636c68f..67f809e 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -178,6 +178,7 @@ static struct radeon_asic r100_asic = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
+ .wait_for_vblank = &r100_wait_for_vblank,
};
static struct radeon_asic r200_asic = {
@@ -229,6 +230,7 @@ static struct radeon_asic r200_asic = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
+ .wait_for_vblank = &r100_wait_for_vblank,
};
static struct radeon_asic r300_asic = {
@@ -281,6 +283,7 @@ static struct radeon_asic r300_asic = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
+ .wait_for_vblank = &r100_wait_for_vblank,
};
static struct radeon_asic r300_asic_pcie = {
@@ -332,6 +335,7 @@ static struct radeon_asic r300_asic_pcie = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
+ .wait_for_vblank = &r100_wait_for_vblank,
};
static struct radeon_asic r420_asic = {
@@ -384,6 +388,7 @@ static struct radeon_asic r420_asic = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
+ .wait_for_vblank = &r100_wait_for_vblank,
};
static struct radeon_asic rs400_asic = {
@@ -436,6 +441,7 @@ static struct radeon_asic rs400_asic = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
+ .wait_for_vblank = &r100_wait_for_vblank,
};
static struct radeon_asic rs600_asic = {
@@ -488,6 +494,7 @@ static struct radeon_asic rs600_asic = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
+ .wait_for_vblank = &avivo_wait_for_vblank,
};
static struct radeon_asic rs690_asic = {
@@ -540,6 +547,7 @@ static struct radeon_asic rs690_asic = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
+ .wait_for_vblank = &avivo_wait_for_vblank,
};
static struct radeon_asic rv515_asic = {
@@ -592,6 +600,7 @@ static struct radeon_asic rv515_asic = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
+ .wait_for_vblank = &avivo_wait_for_vblank,
};
static struct radeon_asic r520_asic = {
@@ -644,6 +653,7 @@ static struct radeon_asic r520_asic = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
+ .wait_for_vblank = &avivo_wait_for_vblank,
};
static struct radeon_asic r600_asic = {
@@ -695,6 +705,7 @@ static struct radeon_asic r600_asic = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
+ .wait_for_vblank = &avivo_wait_for_vblank,
};
static struct radeon_asic rs780_asic = {
@@ -746,6 +757,7 @@ static struct radeon_asic rs780_asic = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
+ .wait_for_vblank = &avivo_wait_for_vblank,
};
static struct radeon_asic rv770_asic = {
@@ -797,6 +809,7 @@ static struct radeon_asic rv770_asic = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rv770_page_flip,
.post_page_flip = &rs600_post_page_flip,
+ .wait_for_vblank = &avivo_wait_for_vblank,
};
static struct radeon_asic evergreen_asic = {
@@ -848,6 +861,7 @@ static struct radeon_asic evergreen_asic = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
+ .wait_for_vblank = &dce4_wait_for_vblank,
};
static struct radeon_asic sumo_asic = {
@@ -899,6 +913,7 @@ static struct radeon_asic sumo_asic = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
+ .wait_for_vblank = &dce4_wait_for_vblank,
};
static struct radeon_asic btc_asic = {
@@ -950,6 +965,7 @@ static struct radeon_asic btc_asic = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
+ .wait_for_vblank = &dce4_wait_for_vblank,
};
static const struct radeon_vm_funcs cayman_vm_funcs = {
@@ -1026,6 +1042,7 @@ static struct radeon_asic cayman_asic = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
+ .wait_for_vblank = &dce4_wait_for_vblank,
};
int radeon_asic_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 6304aef..d9df84f 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -139,6 +139,7 @@ extern void r100_pm_get_dynpm_state(struct radeon_device *rdev);
extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc);
extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
extern void r100_post_page_flip(struct radeon_device *rdev, int crtc);
+extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc);
/*
* r200,rv250,rs300,rv280
@@ -236,7 +237,7 @@ extern void rs600_pre_page_flip(struct radeon_device *rdev, int crtc);
extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc);
void rs600_set_safe_registers(struct radeon_device *rdev);
-
+extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc);
/*
* rs690,rs740
@@ -423,6 +424,7 @@ extern void sumo_pm_init_profile(struct radeon_device *rdev);
extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc);
extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc);
+extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc);
void evergreen_disable_interrupt_state(struct radeon_device *rdev);
int evergreen_blit_init(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
index b4ce864..5098634 100644
--- a/drivers/gpu/drm/radeon/radeon_reg.h
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
@@ -539,9 +539,11 @@
#define RADEON_CRTC2_PITCH 0x032c
#define RADEON_CRTC_STATUS 0x005c
+# define RADEON_CRTC_VBLANK_CUR (1 << 0)
# define RADEON_CRTC_VBLANK_SAVE (1 << 1)
# define RADEON_CRTC_VBLANK_SAVE_CLEAR (1 << 1)
#define RADEON_CRTC2_STATUS 0x03fc
+# define RADEON_CRTC2_VBLANK_CUR (1 << 0)
# define RADEON_CRTC2_VBLANK_SAVE (1 << 1)
# define RADEON_CRTC2_VBLANK_SAVE_CLEAR (1 << 1)
#define RADEON_CRTC_V_SYNC_STRT_WID 0x020c
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 4fc7006..ab1b6da 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -46,6 +46,25 @@
void rs600_gpu_init(struct radeon_device *rdev);
int rs600_mc_wait_for_idle(struct radeon_device *rdev);
+void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc)
+{
+ struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
+ int i;
+
+ if (RREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset) & AVIVO_CRTC_EN) {
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (!(RREG32(AVIVO_D1CRTC_STATUS + radeon_crtc->crtc_offset) & AVIVO_D1CRTC_V_BLANK))
+ break;
+ udelay(1);
+ }
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (RREG32(AVIVO_D1CRTC_STATUS + radeon_crtc->crtc_offset) & AVIVO_D1CRTC_V_BLANK)
+ break;
+ udelay(1);
+ }
+ }
+}
+
void rs600_pre_page_flip(struct radeon_device *rdev, int crtc)
{
/* enable the pflip int */
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [drm-next 01/14] drm/radeon/kms: add wait_for_vblank asic callback
2012-02-23 22:53 ` [drm-next 01/14] drm/radeon/kms: add wait_for_vblank asic callback alexdeucher
@ 2012-02-24 9:17 ` Michel Dänzer
2012-02-24 15:14 ` Alex Deucher
0 siblings, 1 reply; 22+ messages in thread
From: Michel Dänzer @ 2012-02-24 9:17 UTC (permalink / raw)
To: alexdeucher; +Cc: dri-devel
On Don, 2012-02-23 at 17:53 -0500, alexdeucher@gmail.com wrote:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> Required for future functionality.
These callbacks may take tens of milliseconds to complete, that's a lot
of spinning. :) Depending on what they'll be used for, it might be
better to wait for vertical blank interrupts, or use sleeps and
VBLANK_SAVE / VBLANK_OCCURRED bits.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Debian, X and DRI developer
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [drm-next 01/14] drm/radeon/kms: add wait_for_vblank asic callback
2012-02-24 9:17 ` Michel Dänzer
@ 2012-02-24 15:14 ` Alex Deucher
0 siblings, 0 replies; 22+ messages in thread
From: Alex Deucher @ 2012-02-24 15:14 UTC (permalink / raw)
To: Michel Dänzer; +Cc: dri-devel
2012/2/24 Michel Dänzer <michel@daenzer.net>:
> On Don, 2012-02-23 at 17:53 -0500, alexdeucher@gmail.com wrote:
>> From: Alex Deucher <alexander.deucher@amd.com>
>>
>> Required for future functionality.
>
> These callbacks may take tens of milliseconds to complete, that's a lot
> of spinning. :) Depending on what they'll be used for, it might be
> better to wait for vertical blank interrupts, or use sleeps and
> VBLANK_SAVE / VBLANK_OCCURRED bits.
The latter would probably work. I just need to wait for a vblank to occur.
>
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Debian, X and DRI developer
^ permalink raw reply [flat|nested] 22+ messages in thread
* [drm-next 02/14] drm/radeon/kms: add a radeon asic callback for mc idle
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
2012-02-23 22:53 ` [drm-next 01/14] drm/radeon/kms: add wait_for_vblank asic callback alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-24 16:58 ` Jerome Glisse
2012-02-23 22:53 ` [drm-next 03/14] drm/radeon/kms: reorganize hpd callbacks alexdeucher
` (14 subsequent siblings)
16 siblings, 1 reply; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
Required for future functionality.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/r520.c | 2 +-
drivers/gpu/drm/radeon/radeon.h | 3 +++
drivers/gpu/drm/radeon/radeon_asic.c | 17 +++++++++++++++++
drivers/gpu/drm/radeon/radeon_asic.h | 10 +++++++++-
drivers/gpu/drm/radeon/rs690.c | 2 +-
5 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 25084e8..8a9dab0 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -33,7 +33,7 @@
/* This files gather functions specifics to: r520,rv530,rv560,rv570,r580 */
-static int r520_mc_wait_for_idle(struct radeon_device *rdev)
+int r520_mc_wait_for_idle(struct radeon_device *rdev)
{
unsigned i;
uint32_t tmp;
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 76d08d8..3906927 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1203,6 +1203,8 @@ struct radeon_asic {
void (*post_page_flip)(struct radeon_device *rdev, int crtc);
/* wait for vblank */
void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
+ /* wait for mc_idle */
+ int (*mc_wait_for_idle)(struct radeon_device *rdev);
};
/*
@@ -1692,6 +1694,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
#define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
#define radeon_wait_for_vblank(rdev, crtc) rdev->asic->wait_for_vblank((rdev), (crtc))
+#define radeon_mc_wait_for_idle(rdev) rdev->asic->mc_wait_for_idle((rdev))
/* Common functions */
/* AGP */
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 67f809e..9f20546 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -179,6 +179,7 @@ static struct radeon_asic r100_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
.wait_for_vblank = &r100_wait_for_vblank,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r200_asic = {
@@ -231,6 +232,7 @@ static struct radeon_asic r200_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
.wait_for_vblank = &r100_wait_for_vblank,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r300_asic = {
@@ -284,6 +286,7 @@ static struct radeon_asic r300_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
.wait_for_vblank = &r100_wait_for_vblank,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic r300_asic_pcie = {
@@ -336,6 +339,7 @@ static struct radeon_asic r300_asic_pcie = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
.wait_for_vblank = &r100_wait_for_vblank,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic r420_asic = {
@@ -389,6 +393,7 @@ static struct radeon_asic r420_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
.wait_for_vblank = &r100_wait_for_vblank,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic rs400_asic = {
@@ -442,6 +447,7 @@ static struct radeon_asic rs400_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
.wait_for_vblank = &r100_wait_for_vblank,
+ .mc_wait_for_idle = &rs400_mc_wait_for_idle,
};
static struct radeon_asic rs600_asic = {
@@ -495,6 +501,7 @@ static struct radeon_asic rs600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
.wait_for_vblank = &avivo_wait_for_vblank,
+ .mc_wait_for_idle = &rs600_mc_wait_for_idle,
};
static struct radeon_asic rs690_asic = {
@@ -548,6 +555,7 @@ static struct radeon_asic rs690_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
.wait_for_vblank = &avivo_wait_for_vblank,
+ .mc_wait_for_idle = &rs690_mc_wait_for_idle,
};
static struct radeon_asic rv515_asic = {
@@ -601,6 +609,7 @@ static struct radeon_asic rv515_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
.wait_for_vblank = &avivo_wait_for_vblank,
+ .mc_wait_for_idle = &rv515_mc_wait_for_idle,
};
static struct radeon_asic r520_asic = {
@@ -654,6 +663,7 @@ static struct radeon_asic r520_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
.wait_for_vblank = &avivo_wait_for_vblank,
+ .mc_wait_for_idle = &r520_mc_wait_for_idle,
};
static struct radeon_asic r600_asic = {
@@ -706,6 +716,7 @@ static struct radeon_asic r600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
.wait_for_vblank = &avivo_wait_for_vblank,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rs780_asic = {
@@ -758,6 +769,7 @@ static struct radeon_asic rs780_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
.wait_for_vblank = &avivo_wait_for_vblank,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rv770_asic = {
@@ -810,6 +822,7 @@ static struct radeon_asic rv770_asic = {
.page_flip = &rv770_page_flip,
.post_page_flip = &rs600_post_page_flip,
.wait_for_vblank = &avivo_wait_for_vblank,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic evergreen_asic = {
@@ -862,6 +875,7 @@ static struct radeon_asic evergreen_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
.wait_for_vblank = &dce4_wait_for_vblank,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic sumo_asic = {
@@ -914,6 +928,7 @@ static struct radeon_asic sumo_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
.wait_for_vblank = &dce4_wait_for_vblank,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic btc_asic = {
@@ -966,6 +981,7 @@ static struct radeon_asic btc_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
.wait_for_vblank = &dce4_wait_for_vblank,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static const struct radeon_vm_funcs cayman_vm_funcs = {
@@ -1043,6 +1059,7 @@ static struct radeon_asic cayman_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
.wait_for_vblank = &dce4_wait_for_vblank,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
int radeon_asic_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index d9df84f..fd8d5da 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -140,6 +140,7 @@ extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc);
extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
extern void r100_post_page_flip(struct radeon_device *rdev, int crtc);
extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc);
+extern int r100_mc_wait_for_idle(struct radeon_device *rdev);
/*
* r200,rv250,rs300,rv280
@@ -177,6 +178,7 @@ extern int rv370_pcie_gart_init(struct radeon_device *rdev);
extern void rv370_pcie_gart_fini(struct radeon_device *rdev);
extern int rv370_pcie_gart_enable(struct radeon_device *rdev);
extern void rv370_pcie_gart_disable(struct radeon_device *rdev);
+extern int r300_mc_wait_for_idle(struct radeon_device *rdev);
/*
* r420,r423,rv410
@@ -207,6 +209,7 @@ int rs400_gart_enable(struct radeon_device *rdev);
void rs400_gart_adjust_size(struct radeon_device *rdev);
void rs400_gart_disable(struct radeon_device *rdev);
void rs400_gart_fini(struct radeon_device *rdev);
+extern int rs400_mc_wait_for_idle(struct radeon_device *rdev);
/*
* rs600.
@@ -238,6 +241,7 @@ extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc);
void rs600_set_safe_registers(struct radeon_device *rdev);
extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc);
+extern int rs600_mc_wait_for_idle(struct radeon_device *rdev);
/*
* rs690,rs740
@@ -252,6 +256,7 @@ void rs690_bandwidth_update(struct radeon_device *rdev);
void rs690_line_buffer_adjust(struct radeon_device *rdev,
struct drm_display_mode *mode1,
struct drm_display_mode *mode2);
+extern int rs690_mc_wait_for_idle(struct radeon_device *rdev);
/*
* rv515
@@ -279,13 +284,14 @@ void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save);
void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save);
void rv515_clock_startup(struct radeon_device *rdev);
void rv515_debugfs(struct radeon_device *rdev);
-
+int rv515_mc_wait_for_idle(struct radeon_device *rdev);
/*
* r520,rv530,rv560,rv570,r580
*/
int r520_init(struct radeon_device *rdev);
int r520_resume(struct radeon_device *rdev);
+int r520_mc_wait_for_idle(struct radeon_device *rdev);
/*
* r600,rv610,rv630,rv620,rv635,rv670,rs780,rs880
@@ -376,6 +382,7 @@ void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence)
void r600_kms_blit_copy(struct radeon_device *rdev,
u64 src_gpu_addr, u64 dst_gpu_addr,
unsigned num_gpu_pages);
+int r600_mc_wait_for_idle(struct radeon_device *rdev);
/*
* rv770,rv730,rv710,rv740
@@ -427,6 +434,7 @@ extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc);
extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc);
void evergreen_disable_interrupt_state(struct radeon_device *rdev);
int evergreen_blit_init(struct radeon_device *rdev);
+int evergreen_mc_wait_for_idle(struct radeon_device *rdev);
/*
* cayman
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index f68dff2..6ce93b2 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -31,7 +31,7 @@
#include "atom.h"
#include "rs690d.h"
-static int rs690_mc_wait_for_idle(struct radeon_device *rdev)
+int rs690_mc_wait_for_idle(struct radeon_device *rdev)
{
unsigned i;
uint32_t tmp;
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [drm-next 02/14] drm/radeon/kms: add a radeon asic callback for mc idle
2012-02-23 22:53 ` [drm-next 02/14] drm/radeon/kms: add a radeon asic callback for mc idle alexdeucher
@ 2012-02-24 16:58 ` Jerome Glisse
0 siblings, 0 replies; 22+ messages in thread
From: Jerome Glisse @ 2012-02-24 16:58 UTC (permalink / raw)
To: alexdeucher; +Cc: Alex Deucher, dri-devel
On Thu, 2012-02-23 at 17:53 -0500, alexdeucher@gmail.com wrote:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> Required for future functionality.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
> ---
> drivers/gpu/drm/radeon/r520.c | 2 +-
> drivers/gpu/drm/radeon/radeon.h | 3 +++
> drivers/gpu/drm/radeon/radeon_asic.c | 17 +++++++++++++++++
> drivers/gpu/drm/radeon/radeon_asic.h | 10 +++++++++-
> drivers/gpu/drm/radeon/rs690.c | 2 +-
> 5 files changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
> index 25084e8..8a9dab0 100644
> --- a/drivers/gpu/drm/radeon/r520.c
> +++ b/drivers/gpu/drm/radeon/r520.c
> @@ -33,7 +33,7 @@
>
> /* This files gather functions specifics to: r520,rv530,rv560,rv570,r580 */
>
> -static int r520_mc_wait_for_idle(struct radeon_device *rdev)
> +int r520_mc_wait_for_idle(struct radeon_device *rdev)
> {
> unsigned i;
> uint32_t tmp;
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 76d08d8..3906927 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -1203,6 +1203,8 @@ struct radeon_asic {
> void (*post_page_flip)(struct radeon_device *rdev, int crtc);
> /* wait for vblank */
> void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
> + /* wait for mc_idle */
> + int (*mc_wait_for_idle)(struct radeon_device *rdev);
> };
>
> /*
> @@ -1692,6 +1694,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
> #define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
> #define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
> #define radeon_wait_for_vblank(rdev, crtc) rdev->asic->wait_for_vblank((rdev), (crtc))
> +#define radeon_mc_wait_for_idle(rdev) rdev->asic->mc_wait_for_idle((rdev))
>
> /* Common functions */
> /* AGP */
> diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
> index 67f809e..9f20546 100644
> --- a/drivers/gpu/drm/radeon/radeon_asic.c
> +++ b/drivers/gpu/drm/radeon/radeon_asic.c
> @@ -179,6 +179,7 @@ static struct radeon_asic r100_asic = {
> .page_flip = &r100_page_flip,
> .post_page_flip = &r100_post_page_flip,
> .wait_for_vblank = &r100_wait_for_vblank,
> + .mc_wait_for_idle = &r100_mc_wait_for_idle,
> };
>
> static struct radeon_asic r200_asic = {
> @@ -231,6 +232,7 @@ static struct radeon_asic r200_asic = {
> .page_flip = &r100_page_flip,
> .post_page_flip = &r100_post_page_flip,
> .wait_for_vblank = &r100_wait_for_vblank,
> + .mc_wait_for_idle = &r100_mc_wait_for_idle,
> };
>
> static struct radeon_asic r300_asic = {
> @@ -284,6 +286,7 @@ static struct radeon_asic r300_asic = {
> .page_flip = &r100_page_flip,
> .post_page_flip = &r100_post_page_flip,
> .wait_for_vblank = &r100_wait_for_vblank,
> + .mc_wait_for_idle = &r300_mc_wait_for_idle,
> };
>
> static struct radeon_asic r300_asic_pcie = {
> @@ -336,6 +339,7 @@ static struct radeon_asic r300_asic_pcie = {
> .page_flip = &r100_page_flip,
> .post_page_flip = &r100_post_page_flip,
> .wait_for_vblank = &r100_wait_for_vblank,
> + .mc_wait_for_idle = &r300_mc_wait_for_idle,
> };
>
> static struct radeon_asic r420_asic = {
> @@ -389,6 +393,7 @@ static struct radeon_asic r420_asic = {
> .page_flip = &r100_page_flip,
> .post_page_flip = &r100_post_page_flip,
> .wait_for_vblank = &r100_wait_for_vblank,
> + .mc_wait_for_idle = &r300_mc_wait_for_idle,
> };
>
> static struct radeon_asic rs400_asic = {
> @@ -442,6 +447,7 @@ static struct radeon_asic rs400_asic = {
> .page_flip = &r100_page_flip,
> .post_page_flip = &r100_post_page_flip,
> .wait_for_vblank = &r100_wait_for_vblank,
> + .mc_wait_for_idle = &rs400_mc_wait_for_idle,
> };
>
> static struct radeon_asic rs600_asic = {
> @@ -495,6 +501,7 @@ static struct radeon_asic rs600_asic = {
> .page_flip = &rs600_page_flip,
> .post_page_flip = &rs600_post_page_flip,
> .wait_for_vblank = &avivo_wait_for_vblank,
> + .mc_wait_for_idle = &rs600_mc_wait_for_idle,
> };
>
> static struct radeon_asic rs690_asic = {
> @@ -548,6 +555,7 @@ static struct radeon_asic rs690_asic = {
> .page_flip = &rs600_page_flip,
> .post_page_flip = &rs600_post_page_flip,
> .wait_for_vblank = &avivo_wait_for_vblank,
> + .mc_wait_for_idle = &rs690_mc_wait_for_idle,
> };
>
> static struct radeon_asic rv515_asic = {
> @@ -601,6 +609,7 @@ static struct radeon_asic rv515_asic = {
> .page_flip = &rs600_page_flip,
> .post_page_flip = &rs600_post_page_flip,
> .wait_for_vblank = &avivo_wait_for_vblank,
> + .mc_wait_for_idle = &rv515_mc_wait_for_idle,
> };
>
> static struct radeon_asic r520_asic = {
> @@ -654,6 +663,7 @@ static struct radeon_asic r520_asic = {
> .page_flip = &rs600_page_flip,
> .post_page_flip = &rs600_post_page_flip,
> .wait_for_vblank = &avivo_wait_for_vblank,
> + .mc_wait_for_idle = &r520_mc_wait_for_idle,
> };
>
> static struct radeon_asic r600_asic = {
> @@ -706,6 +716,7 @@ static struct radeon_asic r600_asic = {
> .page_flip = &rs600_page_flip,
> .post_page_flip = &rs600_post_page_flip,
> .wait_for_vblank = &avivo_wait_for_vblank,
> + .mc_wait_for_idle = &r600_mc_wait_for_idle,
> };
>
> static struct radeon_asic rs780_asic = {
> @@ -758,6 +769,7 @@ static struct radeon_asic rs780_asic = {
> .page_flip = &rs600_page_flip,
> .post_page_flip = &rs600_post_page_flip,
> .wait_for_vblank = &avivo_wait_for_vblank,
> + .mc_wait_for_idle = &r600_mc_wait_for_idle,
> };
>
> static struct radeon_asic rv770_asic = {
> @@ -810,6 +822,7 @@ static struct radeon_asic rv770_asic = {
> .page_flip = &rv770_page_flip,
> .post_page_flip = &rs600_post_page_flip,
> .wait_for_vblank = &avivo_wait_for_vblank,
> + .mc_wait_for_idle = &r600_mc_wait_for_idle,
> };
>
> static struct radeon_asic evergreen_asic = {
> @@ -862,6 +875,7 @@ static struct radeon_asic evergreen_asic = {
> .page_flip = &evergreen_page_flip,
> .post_page_flip = &evergreen_post_page_flip,
> .wait_for_vblank = &dce4_wait_for_vblank,
> + .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
> };
>
> static struct radeon_asic sumo_asic = {
> @@ -914,6 +928,7 @@ static struct radeon_asic sumo_asic = {
> .page_flip = &evergreen_page_flip,
> .post_page_flip = &evergreen_post_page_flip,
> .wait_for_vblank = &dce4_wait_for_vblank,
> + .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
> };
>
> static struct radeon_asic btc_asic = {
> @@ -966,6 +981,7 @@ static struct radeon_asic btc_asic = {
> .page_flip = &evergreen_page_flip,
> .post_page_flip = &evergreen_post_page_flip,
> .wait_for_vblank = &dce4_wait_for_vblank,
> + .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
> };
>
> static const struct radeon_vm_funcs cayman_vm_funcs = {
> @@ -1043,6 +1059,7 @@ static struct radeon_asic cayman_asic = {
> .page_flip = &evergreen_page_flip,
> .post_page_flip = &evergreen_post_page_flip,
> .wait_for_vblank = &dce4_wait_for_vblank,
> + .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
> };
>
> int radeon_asic_init(struct radeon_device *rdev)
> diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
> index d9df84f..fd8d5da 100644
> --- a/drivers/gpu/drm/radeon/radeon_asic.h
> +++ b/drivers/gpu/drm/radeon/radeon_asic.h
> @@ -140,6 +140,7 @@ extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc);
> extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
> extern void r100_post_page_flip(struct radeon_device *rdev, int crtc);
> extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc);
> +extern int r100_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * r200,rv250,rs300,rv280
> @@ -177,6 +178,7 @@ extern int rv370_pcie_gart_init(struct radeon_device *rdev);
> extern void rv370_pcie_gart_fini(struct radeon_device *rdev);
> extern int rv370_pcie_gart_enable(struct radeon_device *rdev);
> extern void rv370_pcie_gart_disable(struct radeon_device *rdev);
> +extern int r300_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * r420,r423,rv410
> @@ -207,6 +209,7 @@ int rs400_gart_enable(struct radeon_device *rdev);
> void rs400_gart_adjust_size(struct radeon_device *rdev);
> void rs400_gart_disable(struct radeon_device *rdev);
> void rs400_gart_fini(struct radeon_device *rdev);
> +extern int rs400_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * rs600.
> @@ -238,6 +241,7 @@ extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
> extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc);
> void rs600_set_safe_registers(struct radeon_device *rdev);
> extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc);
> +extern int rs600_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * rs690,rs740
> @@ -252,6 +256,7 @@ void rs690_bandwidth_update(struct radeon_device *rdev);
> void rs690_line_buffer_adjust(struct radeon_device *rdev,
> struct drm_display_mode *mode1,
> struct drm_display_mode *mode2);
> +extern int rs690_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * rv515
> @@ -279,13 +284,14 @@ void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save);
> void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save);
> void rv515_clock_startup(struct radeon_device *rdev);
> void rv515_debugfs(struct radeon_device *rdev);
> -
> +int rv515_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * r520,rv530,rv560,rv570,r580
> */
> int r520_init(struct radeon_device *rdev);
> int r520_resume(struct radeon_device *rdev);
> +int r520_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * r600,rv610,rv630,rv620,rv635,rv670,rs780,rs880
> @@ -376,6 +382,7 @@ void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence *fence)
> void r600_kms_blit_copy(struct radeon_device *rdev,
> u64 src_gpu_addr, u64 dst_gpu_addr,
> unsigned num_gpu_pages);
> +int r600_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * rv770,rv730,rv710,rv740
> @@ -427,6 +434,7 @@ extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc);
> extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc);
> void evergreen_disable_interrupt_state(struct radeon_device *rdev);
> int evergreen_blit_init(struct radeon_device *rdev);
> +int evergreen_mc_wait_for_idle(struct radeon_device *rdev);
>
> /*
> * cayman
> diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
> index f68dff2..6ce93b2 100644
> --- a/drivers/gpu/drm/radeon/rs690.c
> +++ b/drivers/gpu/drm/radeon/rs690.c
> @@ -31,7 +31,7 @@
> #include "atom.h"
> #include "rs690d.h"
>
> -static int rs690_mc_wait_for_idle(struct radeon_device *rdev)
> +int rs690_mc_wait_for_idle(struct radeon_device *rdev)
> {
> unsigned i;
> uint32_t tmp;
^ permalink raw reply [flat|nested] 22+ messages in thread
* [drm-next 03/14] drm/radeon/kms: reorganize hpd callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
2012-02-23 22:53 ` [drm-next 01/14] drm/radeon/kms: add wait_for_vblank asic callback alexdeucher
2012-02-23 22:53 ` [drm-next 02/14] drm/radeon/kms: add a radeon asic callback for mc idle alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 04/14] drm/radeon/kms: reorganize page flip callbacks alexdeucher
` (13 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 20 +++--
drivers/gpu/drm/radeon/radeon_asic.c | 170 ++++++++++++++++++++--------------
2 files changed, 114 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 3906927..31e3d33 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1179,10 +1179,14 @@ struct radeon_asic {
uint32_t offset, uint32_t obj_size);
void (*clear_surface_reg)(struct radeon_device *rdev, int reg);
void (*bandwidth_update)(struct radeon_device *rdev);
- void (*hpd_init)(struct radeon_device *rdev);
- void (*hpd_fini)(struct radeon_device *rdev);
- bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
- void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+
+ struct {
+ void (*init)(struct radeon_device *rdev);
+ void (*fini)(struct radeon_device *rdev);
+ bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+ void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
+ } hpd;
+
/* ioctl hw specific callback. Some hw might want to perform special
* operation on specific ioctl. For instance on wait idle some hw
* might want to perform and HDP flush through MMIO as it seems that
@@ -1680,10 +1684,10 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
#define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
-#define radeon_hpd_init(rdev) (rdev)->asic->hpd_init((rdev))
-#define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev))
-#define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd))
-#define radeon_hpd_set_polarity(rdev, hpd) (rdev)->asic->hpd_set_polarity((rdev), (hpd))
+#define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev))
+#define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev))
+#define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h))
+#define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h))
#define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev))
#define radeon_pm_misc(rdev) (rdev)->asic->pm_misc((rdev))
#define radeon_pm_prepare(rdev) (rdev)->asic->pm_prepare((rdev))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 9f20546..4a23255 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -164,10 +164,12 @@ static struct radeon_asic r100_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &r100_bandwidth_update,
- .hpd_init = &r100_hpd_init,
- .hpd_fini = &r100_hpd_fini,
- .hpd_sense = &r100_hpd_sense,
- .hpd_set_polarity = &r100_hpd_set_polarity,
+ .hpd = {
+ .init = &r100_hpd_init,
+ .fini = &r100_hpd_fini,
+ .sense = &r100_hpd_sense,
+ .set_polarity = &r100_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &r100_pm_misc,
@@ -217,10 +219,12 @@ static struct radeon_asic r200_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &r100_bandwidth_update,
- .hpd_init = &r100_hpd_init,
- .hpd_fini = &r100_hpd_fini,
- .hpd_sense = &r100_hpd_sense,
- .hpd_set_polarity = &r100_hpd_set_polarity,
+ .hpd = {
+ .init = &r100_hpd_init,
+ .fini = &r100_hpd_fini,
+ .sense = &r100_hpd_sense,
+ .set_polarity = &r100_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &r100_pm_misc,
@@ -271,10 +275,12 @@ static struct radeon_asic r300_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &r100_bandwidth_update,
- .hpd_init = &r100_hpd_init,
- .hpd_fini = &r100_hpd_fini,
- .hpd_sense = &r100_hpd_sense,
- .hpd_set_polarity = &r100_hpd_set_polarity,
+ .hpd = {
+ .init = &r100_hpd_init,
+ .fini = &r100_hpd_fini,
+ .sense = &r100_hpd_sense,
+ .set_polarity = &r100_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &r100_pm_misc,
@@ -324,10 +330,12 @@ static struct radeon_asic r300_asic_pcie = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &r100_bandwidth_update,
- .hpd_init = &r100_hpd_init,
- .hpd_fini = &r100_hpd_fini,
- .hpd_sense = &r100_hpd_sense,
- .hpd_set_polarity = &r100_hpd_set_polarity,
+ .hpd = {
+ .init = &r100_hpd_init,
+ .fini = &r100_hpd_fini,
+ .sense = &r100_hpd_sense,
+ .set_polarity = &r100_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &r100_pm_misc,
@@ -378,10 +386,12 @@ static struct radeon_asic r420_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &r100_bandwidth_update,
- .hpd_init = &r100_hpd_init,
- .hpd_fini = &r100_hpd_fini,
- .hpd_sense = &r100_hpd_sense,
- .hpd_set_polarity = &r100_hpd_set_polarity,
+ .hpd = {
+ .init = &r100_hpd_init,
+ .fini = &r100_hpd_fini,
+ .sense = &r100_hpd_sense,
+ .set_polarity = &r100_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &r100_pm_misc,
@@ -432,10 +442,12 @@ static struct radeon_asic rs400_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &r100_bandwidth_update,
- .hpd_init = &r100_hpd_init,
- .hpd_fini = &r100_hpd_fini,
- .hpd_sense = &r100_hpd_sense,
- .hpd_set_polarity = &r100_hpd_set_polarity,
+ .hpd = {
+ .init = &r100_hpd_init,
+ .fini = &r100_hpd_fini,
+ .sense = &r100_hpd_sense,
+ .set_polarity = &r100_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &r100_pm_misc,
@@ -486,10 +498,12 @@ static struct radeon_asic rs600_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &rs600_bandwidth_update,
- .hpd_init = &rs600_hpd_init,
- .hpd_fini = &rs600_hpd_fini,
- .hpd_sense = &rs600_hpd_sense,
- .hpd_set_polarity = &rs600_hpd_set_polarity,
+ .hpd = {
+ .init = &rs600_hpd_init,
+ .fini = &rs600_hpd_fini,
+ .sense = &rs600_hpd_sense,
+ .set_polarity = &rs600_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &rs600_pm_misc,
@@ -540,10 +554,12 @@ static struct radeon_asic rs690_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &rs690_bandwidth_update,
- .hpd_init = &rs600_hpd_init,
- .hpd_fini = &rs600_hpd_fini,
- .hpd_sense = &rs600_hpd_sense,
- .hpd_set_polarity = &rs600_hpd_set_polarity,
+ .hpd = {
+ .init = &rs600_hpd_init,
+ .fini = &rs600_hpd_fini,
+ .sense = &rs600_hpd_sense,
+ .set_polarity = &rs600_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &rs600_pm_misc,
@@ -594,10 +610,12 @@ static struct radeon_asic rv515_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &rv515_bandwidth_update,
- .hpd_init = &rs600_hpd_init,
- .hpd_fini = &rs600_hpd_fini,
- .hpd_sense = &rs600_hpd_sense,
- .hpd_set_polarity = &rs600_hpd_set_polarity,
+ .hpd = {
+ .init = &rs600_hpd_init,
+ .fini = &rs600_hpd_fini,
+ .sense = &rs600_hpd_sense,
+ .set_polarity = &rs600_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &rs600_pm_misc,
@@ -648,10 +666,12 @@ static struct radeon_asic r520_asic = {
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.bandwidth_update = &rv515_bandwidth_update,
- .hpd_init = &rs600_hpd_init,
- .hpd_fini = &rs600_hpd_fini,
- .hpd_sense = &rs600_hpd_sense,
- .hpd_set_polarity = &rs600_hpd_set_polarity,
+ .hpd = {
+ .init = &rs600_hpd_init,
+ .fini = &rs600_hpd_fini,
+ .sense = &rs600_hpd_sense,
+ .set_polarity = &rs600_hpd_set_polarity,
+ },
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
.pm_misc = &rs600_pm_misc,
@@ -701,10 +721,12 @@ static struct radeon_asic r600_asic = {
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.bandwidth_update = &rv515_bandwidth_update,
- .hpd_init = &r600_hpd_init,
- .hpd_fini = &r600_hpd_fini,
- .hpd_sense = &r600_hpd_sense,
- .hpd_set_polarity = &r600_hpd_set_polarity,
+ .hpd = {
+ .init = &r600_hpd_init,
+ .fini = &r600_hpd_fini,
+ .sense = &r600_hpd_sense,
+ .set_polarity = &r600_hpd_set_polarity,
+ },
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
.pm_misc = &r600_pm_misc,
@@ -754,10 +776,12 @@ static struct radeon_asic rs780_asic = {
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.bandwidth_update = &rs690_bandwidth_update,
- .hpd_init = &r600_hpd_init,
- .hpd_fini = &r600_hpd_fini,
- .hpd_sense = &r600_hpd_sense,
- .hpd_set_polarity = &r600_hpd_set_polarity,
+ .hpd = {
+ .init = &r600_hpd_init,
+ .fini = &r600_hpd_fini,
+ .sense = &r600_hpd_sense,
+ .set_polarity = &r600_hpd_set_polarity,
+ },
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
.pm_misc = &r600_pm_misc,
@@ -807,10 +831,12 @@ static struct radeon_asic rv770_asic = {
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.bandwidth_update = &rv515_bandwidth_update,
- .hpd_init = &r600_hpd_init,
- .hpd_fini = &r600_hpd_fini,
- .hpd_sense = &r600_hpd_sense,
- .hpd_set_polarity = &r600_hpd_set_polarity,
+ .hpd = {
+ .init = &r600_hpd_init,
+ .fini = &r600_hpd_fini,
+ .sense = &r600_hpd_sense,
+ .set_polarity = &r600_hpd_set_polarity,
+ },
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
.pm_misc = &rv770_pm_misc,
@@ -860,10 +886,12 @@ static struct radeon_asic evergreen_asic = {
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.bandwidth_update = &evergreen_bandwidth_update,
- .hpd_init = &evergreen_hpd_init,
- .hpd_fini = &evergreen_hpd_fini,
- .hpd_sense = &evergreen_hpd_sense,
- .hpd_set_polarity = &evergreen_hpd_set_polarity,
+ .hpd = {
+ .init = &evergreen_hpd_init,
+ .fini = &evergreen_hpd_fini,
+ .sense = &evergreen_hpd_sense,
+ .set_polarity = &evergreen_hpd_set_polarity,
+ },
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
.pm_misc = &evergreen_pm_misc,
@@ -913,10 +941,12 @@ static struct radeon_asic sumo_asic = {
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.bandwidth_update = &evergreen_bandwidth_update,
- .hpd_init = &evergreen_hpd_init,
- .hpd_fini = &evergreen_hpd_fini,
- .hpd_sense = &evergreen_hpd_sense,
- .hpd_set_polarity = &evergreen_hpd_set_polarity,
+ .hpd = {
+ .init = &evergreen_hpd_init,
+ .fini = &evergreen_hpd_fini,
+ .sense = &evergreen_hpd_sense,
+ .set_polarity = &evergreen_hpd_set_polarity,
+ },
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
.pm_misc = &evergreen_pm_misc,
@@ -966,10 +996,12 @@ static struct radeon_asic btc_asic = {
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.bandwidth_update = &evergreen_bandwidth_update,
- .hpd_init = &evergreen_hpd_init,
- .hpd_fini = &evergreen_hpd_fini,
- .hpd_sense = &evergreen_hpd_sense,
- .hpd_set_polarity = &evergreen_hpd_set_polarity,
+ .hpd = {
+ .init = &evergreen_hpd_init,
+ .fini = &evergreen_hpd_fini,
+ .sense = &evergreen_hpd_sense,
+ .set_polarity = &evergreen_hpd_set_polarity,
+ },
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
.pm_misc = &evergreen_pm_misc,
@@ -1044,10 +1076,12 @@ static struct radeon_asic cayman_asic = {
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.bandwidth_update = &evergreen_bandwidth_update,
- .hpd_init = &evergreen_hpd_init,
- .hpd_fini = &evergreen_hpd_fini,
- .hpd_sense = &evergreen_hpd_sense,
- .hpd_set_polarity = &evergreen_hpd_set_polarity,
+ .hpd = {
+ .init = &evergreen_hpd_init,
+ .fini = &evergreen_hpd_fini,
+ .sense = &evergreen_hpd_sense,
+ .set_polarity = &evergreen_hpd_set_polarity,
+ },
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
.pm_misc = &evergreen_pm_misc,
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 04/14] drm/radeon/kms: reorganize page flip callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (2 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 03/14] drm/radeon/kms: reorganize hpd callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 05/14] drm/radeon/kms: reorganize pm callbacks alexdeucher
` (12 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 14 ++--
drivers/gpu/drm/radeon/radeon_asic.c | 136 +++++++++++++++++++++-------------
2 files changed, 93 insertions(+), 57 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 31e3d33..20d4aad 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1202,9 +1202,11 @@ struct radeon_asic {
void (*pm_init_profile)(struct radeon_device *rdev);
void (*pm_get_dynpm_state)(struct radeon_device *rdev);
/* pageflipping */
- void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
- u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
- void (*post_page_flip)(struct radeon_device *rdev, int crtc);
+ struct {
+ void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
+ u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
+ void (*post_page_flip)(struct radeon_device *rdev, int crtc);
+ } pflip;
/* wait for vblank */
void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
/* wait for mc_idle */
@@ -1694,9 +1696,9 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_pm_finish(rdev) (rdev)->asic->pm_finish((rdev))
#define radeon_pm_init_profile(rdev) (rdev)->asic->pm_init_profile((rdev))
#define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm_get_dynpm_state((rdev))
-#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pre_page_flip((rdev), (crtc))
-#define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
-#define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
+#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pflip.pre_page_flip((rdev), (crtc))
+#define radeon_page_flip(rdev, crtc, base) rdev->asic->pflip.page_flip((rdev), (crtc), (base))
+#define radeon_post_page_flip(rdev, crtc) rdev->asic->pflip.post_page_flip((rdev), (crtc))
#define radeon_wait_for_vblank(rdev, crtc) rdev->asic->wait_for_vblank((rdev), (crtc))
#define radeon_mc_wait_for_idle(rdev) rdev->asic->mc_wait_for_idle((rdev))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 4a23255..6ebdeeb 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -177,9 +177,11 @@ static struct radeon_asic r100_asic = {
.pm_finish = &r100_pm_finish,
.pm_init_profile = &r100_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &r100_pre_page_flip,
- .page_flip = &r100_page_flip,
- .post_page_flip = &r100_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &r100_pre_page_flip,
+ .page_flip = &r100_page_flip,
+ .post_page_flip = &r100_post_page_flip,
+ },
.wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r100_mc_wait_for_idle,
};
@@ -232,9 +234,11 @@ static struct radeon_asic r200_asic = {
.pm_finish = &r100_pm_finish,
.pm_init_profile = &r100_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &r100_pre_page_flip,
- .page_flip = &r100_page_flip,
- .post_page_flip = &r100_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &r100_pre_page_flip,
+ .page_flip = &r100_page_flip,
+ .post_page_flip = &r100_post_page_flip,
+ },
.wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r100_mc_wait_for_idle,
};
@@ -288,9 +292,11 @@ static struct radeon_asic r300_asic = {
.pm_finish = &r100_pm_finish,
.pm_init_profile = &r100_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &r100_pre_page_flip,
- .page_flip = &r100_page_flip,
- .post_page_flip = &r100_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &r100_pre_page_flip,
+ .page_flip = &r100_page_flip,
+ .post_page_flip = &r100_post_page_flip,
+ },
.wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r300_mc_wait_for_idle,
};
@@ -343,9 +349,11 @@ static struct radeon_asic r300_asic_pcie = {
.pm_finish = &r100_pm_finish,
.pm_init_profile = &r100_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &r100_pre_page_flip,
- .page_flip = &r100_page_flip,
- .post_page_flip = &r100_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &r100_pre_page_flip,
+ .page_flip = &r100_page_flip,
+ .post_page_flip = &r100_post_page_flip,
+ },
.wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r300_mc_wait_for_idle,
};
@@ -399,9 +407,11 @@ static struct radeon_asic r420_asic = {
.pm_finish = &r100_pm_finish,
.pm_init_profile = &r420_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &r100_pre_page_flip,
- .page_flip = &r100_page_flip,
- .post_page_flip = &r100_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &r100_pre_page_flip,
+ .page_flip = &r100_page_flip,
+ .post_page_flip = &r100_post_page_flip,
+ },
.wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r300_mc_wait_for_idle,
};
@@ -455,9 +465,11 @@ static struct radeon_asic rs400_asic = {
.pm_finish = &r100_pm_finish,
.pm_init_profile = &r100_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &r100_pre_page_flip,
- .page_flip = &r100_page_flip,
- .post_page_flip = &r100_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &r100_pre_page_flip,
+ .page_flip = &r100_page_flip,
+ .post_page_flip = &r100_post_page_flip,
+ },
.wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &rs400_mc_wait_for_idle,
};
@@ -511,9 +523,11 @@ static struct radeon_asic rs600_asic = {
.pm_finish = &rs600_pm_finish,
.pm_init_profile = &r420_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &rs600_pre_page_flip,
- .page_flip = &rs600_page_flip,
- .post_page_flip = &rs600_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &rs600_pre_page_flip,
+ .page_flip = &rs600_page_flip,
+ .post_page_flip = &rs600_post_page_flip,
+ },
.wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &rs600_mc_wait_for_idle,
};
@@ -567,9 +581,11 @@ static struct radeon_asic rs690_asic = {
.pm_finish = &rs600_pm_finish,
.pm_init_profile = &r420_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &rs600_pre_page_flip,
- .page_flip = &rs600_page_flip,
- .post_page_flip = &rs600_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &rs600_pre_page_flip,
+ .page_flip = &rs600_page_flip,
+ .post_page_flip = &rs600_post_page_flip,
+ },
.wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &rs690_mc_wait_for_idle,
};
@@ -623,9 +639,11 @@ static struct radeon_asic rv515_asic = {
.pm_finish = &rs600_pm_finish,
.pm_init_profile = &r420_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &rs600_pre_page_flip,
- .page_flip = &rs600_page_flip,
- .post_page_flip = &rs600_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &rs600_pre_page_flip,
+ .page_flip = &rs600_page_flip,
+ .post_page_flip = &rs600_post_page_flip,
+ },
.wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &rv515_mc_wait_for_idle,
};
@@ -679,9 +697,11 @@ static struct radeon_asic r520_asic = {
.pm_finish = &rs600_pm_finish,
.pm_init_profile = &r420_pm_init_profile,
.pm_get_dynpm_state = &r100_pm_get_dynpm_state,
- .pre_page_flip = &rs600_pre_page_flip,
- .page_flip = &rs600_page_flip,
- .post_page_flip = &rs600_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &rs600_pre_page_flip,
+ .page_flip = &rs600_page_flip,
+ .post_page_flip = &rs600_post_page_flip,
+ },
.wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r520_mc_wait_for_idle,
};
@@ -734,9 +754,11 @@ static struct radeon_asic r600_asic = {
.pm_finish = &rs600_pm_finish,
.pm_init_profile = &r600_pm_init_profile,
.pm_get_dynpm_state = &r600_pm_get_dynpm_state,
- .pre_page_flip = &rs600_pre_page_flip,
- .page_flip = &rs600_page_flip,
- .post_page_flip = &rs600_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &rs600_pre_page_flip,
+ .page_flip = &rs600_page_flip,
+ .post_page_flip = &rs600_post_page_flip,
+ },
.wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r600_mc_wait_for_idle,
};
@@ -789,9 +811,11 @@ static struct radeon_asic rs780_asic = {
.pm_finish = &rs600_pm_finish,
.pm_init_profile = &rs780_pm_init_profile,
.pm_get_dynpm_state = &r600_pm_get_dynpm_state,
- .pre_page_flip = &rs600_pre_page_flip,
- .page_flip = &rs600_page_flip,
- .post_page_flip = &rs600_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &rs600_pre_page_flip,
+ .page_flip = &rs600_page_flip,
+ .post_page_flip = &rs600_post_page_flip,
+ },
.wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r600_mc_wait_for_idle,
};
@@ -844,9 +868,11 @@ static struct radeon_asic rv770_asic = {
.pm_finish = &rs600_pm_finish,
.pm_init_profile = &r600_pm_init_profile,
.pm_get_dynpm_state = &r600_pm_get_dynpm_state,
- .pre_page_flip = &rs600_pre_page_flip,
- .page_flip = &rv770_page_flip,
- .post_page_flip = &rs600_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &rs600_pre_page_flip,
+ .page_flip = &rv770_page_flip,
+ .post_page_flip = &rs600_post_page_flip,
+ },
.wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r600_mc_wait_for_idle,
};
@@ -899,9 +925,11 @@ static struct radeon_asic evergreen_asic = {
.pm_finish = &evergreen_pm_finish,
.pm_init_profile = &r600_pm_init_profile,
.pm_get_dynpm_state = &r600_pm_get_dynpm_state,
- .pre_page_flip = &evergreen_pre_page_flip,
- .page_flip = &evergreen_page_flip,
- .post_page_flip = &evergreen_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &evergreen_pre_page_flip,
+ .page_flip = &evergreen_page_flip,
+ .post_page_flip = &evergreen_post_page_flip,
+ },
.wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
@@ -954,9 +982,11 @@ static struct radeon_asic sumo_asic = {
.pm_finish = &evergreen_pm_finish,
.pm_init_profile = &sumo_pm_init_profile,
.pm_get_dynpm_state = &r600_pm_get_dynpm_state,
- .pre_page_flip = &evergreen_pre_page_flip,
- .page_flip = &evergreen_page_flip,
- .post_page_flip = &evergreen_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &evergreen_pre_page_flip,
+ .page_flip = &evergreen_page_flip,
+ .post_page_flip = &evergreen_post_page_flip,
+ },
.wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
@@ -1009,9 +1039,11 @@ static struct radeon_asic btc_asic = {
.pm_finish = &evergreen_pm_finish,
.pm_init_profile = &r600_pm_init_profile,
.pm_get_dynpm_state = &r600_pm_get_dynpm_state,
- .pre_page_flip = &evergreen_pre_page_flip,
- .page_flip = &evergreen_page_flip,
- .post_page_flip = &evergreen_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &evergreen_pre_page_flip,
+ .page_flip = &evergreen_page_flip,
+ .post_page_flip = &evergreen_post_page_flip,
+ },
.wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
@@ -1089,9 +1121,11 @@ static struct radeon_asic cayman_asic = {
.pm_finish = &evergreen_pm_finish,
.pm_init_profile = &r600_pm_init_profile,
.pm_get_dynpm_state = &r600_pm_get_dynpm_state,
- .pre_page_flip = &evergreen_pre_page_flip,
- .page_flip = &evergreen_page_flip,
- .post_page_flip = &evergreen_post_page_flip,
+ .pflip = {
+ .pre_page_flip = &evergreen_pre_page_flip,
+ .page_flip = &evergreen_page_flip,
+ .post_page_flip = &evergreen_post_page_flip,
+ },
.wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 05/14] drm/radeon/kms: reorganize pm callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (3 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 04/14] drm/radeon/kms: reorganize page flip callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 06/14] drm/radeon/kms: reorganize copy callbacks alexdeucher
` (11 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 22 ++--
drivers/gpu/drm/radeon/radeon_asic.c | 204 ++++++++++++++++++++--------------
2 files changed, 131 insertions(+), 95 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 20d4aad..3ad14208 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1196,11 +1196,13 @@ struct radeon_asic {
void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
bool (*gui_idle)(struct radeon_device *rdev);
/* power management */
- void (*pm_misc)(struct radeon_device *rdev);
- void (*pm_prepare)(struct radeon_device *rdev);
- void (*pm_finish)(struct radeon_device *rdev);
- void (*pm_init_profile)(struct radeon_device *rdev);
- void (*pm_get_dynpm_state)(struct radeon_device *rdev);
+ struct {
+ void (*misc)(struct radeon_device *rdev);
+ void (*prepare)(struct radeon_device *rdev);
+ void (*finish)(struct radeon_device *rdev);
+ void (*init_profile)(struct radeon_device *rdev);
+ void (*get_dynpm_state)(struct radeon_device *rdev);
+ } pm;
/* pageflipping */
struct {
void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
@@ -1691,11 +1693,11 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h))
#define radeon_hpd_set_polarity(rdev, h) (rdev)->asic->hpd.set_polarity((rdev), (h))
#define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev))
-#define radeon_pm_misc(rdev) (rdev)->asic->pm_misc((rdev))
-#define radeon_pm_prepare(rdev) (rdev)->asic->pm_prepare((rdev))
-#define radeon_pm_finish(rdev) (rdev)->asic->pm_finish((rdev))
-#define radeon_pm_init_profile(rdev) (rdev)->asic->pm_init_profile((rdev))
-#define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm_get_dynpm_state((rdev))
+#define radeon_pm_misc(rdev) (rdev)->asic->pm.misc((rdev))
+#define radeon_pm_prepare(rdev) (rdev)->asic->pm.prepare((rdev))
+#define radeon_pm_finish(rdev) (rdev)->asic->pm.finish((rdev))
+#define radeon_pm_init_profile(rdev) (rdev)->asic->pm.init_profile((rdev))
+#define radeon_pm_get_dynpm_state(rdev) (rdev)->asic->pm.get_dynpm_state((rdev))
#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pflip.pre_page_flip((rdev), (crtc))
#define radeon_page_flip(rdev, crtc, base) rdev->asic->pflip.page_flip((rdev), (crtc), (base))
#define radeon_post_page_flip(rdev, crtc) rdev->asic->pflip.post_page_flip((rdev), (crtc))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 6ebdeeb..38a29bc 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -172,11 +172,13 @@ static struct radeon_asic r100_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &r100_pm_misc,
- .pm_prepare = &r100_pm_prepare,
- .pm_finish = &r100_pm_finish,
- .pm_init_profile = &r100_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r100_pm_misc,
+ .prepare = &r100_pm_prepare,
+ .finish = &r100_pm_finish,
+ .init_profile = &r100_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
@@ -229,11 +231,13 @@ static struct radeon_asic r200_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &r100_pm_misc,
- .pm_prepare = &r100_pm_prepare,
- .pm_finish = &r100_pm_finish,
- .pm_init_profile = &r100_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r100_pm_misc,
+ .prepare = &r100_pm_prepare,
+ .finish = &r100_pm_finish,
+ .init_profile = &r100_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
@@ -287,11 +291,13 @@ static struct radeon_asic r300_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &r100_pm_misc,
- .pm_prepare = &r100_pm_prepare,
- .pm_finish = &r100_pm_finish,
- .pm_init_profile = &r100_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r100_pm_misc,
+ .prepare = &r100_pm_prepare,
+ .finish = &r100_pm_finish,
+ .init_profile = &r100_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
@@ -344,11 +350,13 @@ static struct radeon_asic r300_asic_pcie = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &r100_pm_misc,
- .pm_prepare = &r100_pm_prepare,
- .pm_finish = &r100_pm_finish,
- .pm_init_profile = &r100_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r100_pm_misc,
+ .prepare = &r100_pm_prepare,
+ .finish = &r100_pm_finish,
+ .init_profile = &r100_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
@@ -402,11 +410,13 @@ static struct radeon_asic r420_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &r100_pm_misc,
- .pm_prepare = &r100_pm_prepare,
- .pm_finish = &r100_pm_finish,
- .pm_init_profile = &r420_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r100_pm_misc,
+ .prepare = &r100_pm_prepare,
+ .finish = &r100_pm_finish,
+ .init_profile = &r420_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
@@ -460,11 +470,13 @@ static struct radeon_asic rs400_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &r100_pm_misc,
- .pm_prepare = &r100_pm_prepare,
- .pm_finish = &r100_pm_finish,
- .pm_init_profile = &r100_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r100_pm_misc,
+ .prepare = &r100_pm_prepare,
+ .finish = &r100_pm_finish,
+ .init_profile = &r100_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
.page_flip = &r100_page_flip,
@@ -518,11 +530,13 @@ static struct radeon_asic rs600_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &rs600_pm_misc,
- .pm_prepare = &rs600_pm_prepare,
- .pm_finish = &rs600_pm_finish,
- .pm_init_profile = &r420_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &rs600_pm_misc,
+ .prepare = &rs600_pm_prepare,
+ .finish = &rs600_pm_finish,
+ .init_profile = &r420_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
@@ -576,11 +590,13 @@ static struct radeon_asic rs690_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &rs600_pm_misc,
- .pm_prepare = &rs600_pm_prepare,
- .pm_finish = &rs600_pm_finish,
- .pm_init_profile = &r420_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &rs600_pm_misc,
+ .prepare = &rs600_pm_prepare,
+ .finish = &rs600_pm_finish,
+ .init_profile = &r420_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
@@ -634,11 +650,13 @@ static struct radeon_asic rv515_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &rs600_pm_misc,
- .pm_prepare = &rs600_pm_prepare,
- .pm_finish = &rs600_pm_finish,
- .pm_init_profile = &r420_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &rs600_pm_misc,
+ .prepare = &rs600_pm_prepare,
+ .finish = &rs600_pm_finish,
+ .init_profile = &r420_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
@@ -692,11 +710,13 @@ static struct radeon_asic r520_asic = {
},
.ioctl_wait_idle = NULL,
.gui_idle = &r100_gui_idle,
- .pm_misc = &rs600_pm_misc,
- .pm_prepare = &rs600_pm_prepare,
- .pm_finish = &rs600_pm_finish,
- .pm_init_profile = &r420_pm_init_profile,
- .pm_get_dynpm_state = &r100_pm_get_dynpm_state,
+ .pm = {
+ .misc = &rs600_pm_misc,
+ .prepare = &rs600_pm_prepare,
+ .finish = &rs600_pm_finish,
+ .init_profile = &r420_pm_init_profile,
+ .get_dynpm_state = &r100_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
@@ -749,11 +769,13 @@ static struct radeon_asic r600_asic = {
},
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
- .pm_misc = &r600_pm_misc,
- .pm_prepare = &rs600_pm_prepare,
- .pm_finish = &rs600_pm_finish,
- .pm_init_profile = &r600_pm_init_profile,
- .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r600_pm_misc,
+ .prepare = &rs600_pm_prepare,
+ .finish = &rs600_pm_finish,
+ .init_profile = &r600_pm_init_profile,
+ .get_dynpm_state = &r600_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
@@ -806,11 +828,13 @@ static struct radeon_asic rs780_asic = {
},
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
- .pm_misc = &r600_pm_misc,
- .pm_prepare = &rs600_pm_prepare,
- .pm_finish = &rs600_pm_finish,
- .pm_init_profile = &rs780_pm_init_profile,
- .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+ .pm = {
+ .misc = &r600_pm_misc,
+ .prepare = &rs600_pm_prepare,
+ .finish = &rs600_pm_finish,
+ .init_profile = &rs780_pm_init_profile,
+ .get_dynpm_state = &r600_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rs600_page_flip,
@@ -863,11 +887,13 @@ static struct radeon_asic rv770_asic = {
},
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
- .pm_misc = &rv770_pm_misc,
- .pm_prepare = &rs600_pm_prepare,
- .pm_finish = &rs600_pm_finish,
- .pm_init_profile = &r600_pm_init_profile,
- .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+ .pm = {
+ .misc = &rv770_pm_misc,
+ .prepare = &rs600_pm_prepare,
+ .finish = &rs600_pm_finish,
+ .init_profile = &r600_pm_init_profile,
+ .get_dynpm_state = &r600_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
.page_flip = &rv770_page_flip,
@@ -920,11 +946,13 @@ static struct radeon_asic evergreen_asic = {
},
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
- .pm_misc = &evergreen_pm_misc,
- .pm_prepare = &evergreen_pm_prepare,
- .pm_finish = &evergreen_pm_finish,
- .pm_init_profile = &r600_pm_init_profile,
- .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+ .pm = {
+ .misc = &evergreen_pm_misc,
+ .prepare = &evergreen_pm_prepare,
+ .finish = &evergreen_pm_finish,
+ .init_profile = &r600_pm_init_profile,
+ .get_dynpm_state = &r600_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
@@ -977,11 +1005,13 @@ static struct radeon_asic sumo_asic = {
},
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
- .pm_misc = &evergreen_pm_misc,
- .pm_prepare = &evergreen_pm_prepare,
- .pm_finish = &evergreen_pm_finish,
- .pm_init_profile = &sumo_pm_init_profile,
- .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+ .pm = {
+ .misc = &evergreen_pm_misc,
+ .prepare = &evergreen_pm_prepare,
+ .finish = &evergreen_pm_finish,
+ .init_profile = &sumo_pm_init_profile,
+ .get_dynpm_state = &r600_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
@@ -1034,11 +1064,13 @@ static struct radeon_asic btc_asic = {
},
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
- .pm_misc = &evergreen_pm_misc,
- .pm_prepare = &evergreen_pm_prepare,
- .pm_finish = &evergreen_pm_finish,
- .pm_init_profile = &r600_pm_init_profile,
- .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+ .pm = {
+ .misc = &evergreen_pm_misc,
+ .prepare = &evergreen_pm_prepare,
+ .finish = &evergreen_pm_finish,
+ .init_profile = &r600_pm_init_profile,
+ .get_dynpm_state = &r600_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
@@ -1116,11 +1148,13 @@ static struct radeon_asic cayman_asic = {
},
.ioctl_wait_idle = r600_ioctl_wait_idle,
.gui_idle = &r600_gui_idle,
- .pm_misc = &evergreen_pm_misc,
- .pm_prepare = &evergreen_pm_prepare,
- .pm_finish = &evergreen_pm_finish,
- .pm_init_profile = &r600_pm_init_profile,
- .pm_get_dynpm_state = &r600_pm_get_dynpm_state,
+ .pm = {
+ .misc = &evergreen_pm_misc,
+ .prepare = &evergreen_pm_prepare,
+ .finish = &evergreen_pm_finish,
+ .init_profile = &r600_pm_init_profile,
+ .get_dynpm_state = &r600_pm_get_dynpm_state,
+ },
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
.page_flip = &evergreen_page_flip,
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 06/14] drm/radeon/kms: reorganize copy callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (4 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 05/14] drm/radeon/kms: reorganize pm callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 07/14] drm/radeon/kms: reorganize irq callbacks alexdeucher
` (10 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct, handle multiple
rings better.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/evergreen.c | 2 +-
drivers/gpu/drm/radeon/ni.c | 2 +-
drivers/gpu/drm/radeon/r600.c | 2 +-
drivers/gpu/drm/radeon/radeon.h | 50 +++++---
drivers/gpu/drm/radeon/radeon_asic.c | 190 +++++++++++++++++++++--------
drivers/gpu/drm/radeon/radeon_benchmark.c | 12 +-
drivers/gpu/drm/radeon/radeon_ttm.c | 15 ++-
drivers/gpu/drm/radeon/rv770.c | 2 +-
8 files changed, 185 insertions(+), 90 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 158ff59..ab334e9 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3166,7 +3166,7 @@ static int evergreen_startup(struct radeon_device *rdev)
r = evergreen_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
- rdev->asic->copy = NULL;
+ rdev->asic->copy.copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 2509c50..2d9ee5d 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1466,7 +1466,7 @@ static int cayman_startup(struct radeon_device *rdev)
r = evergreen_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
- rdev->asic->copy = NULL;
+ rdev->asic->copy.copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index fbcd848..e15a267 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2449,7 +2449,7 @@ int r600_startup(struct radeon_device *rdev)
r = r600_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
- rdev->asic->copy = NULL;
+ rdev->asic->copy.copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 3ad14208..d49d461 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1152,21 +1152,30 @@ struct radeon_asic {
int (*irq_set)(struct radeon_device *rdev);
int (*irq_process)(struct radeon_device *rdev);
u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);
- int (*copy_blit)(struct radeon_device *rdev,
- uint64_t src_offset,
- uint64_t dst_offset,
- unsigned num_gpu_pages,
- struct radeon_fence *fence);
- int (*copy_dma)(struct radeon_device *rdev,
- uint64_t src_offset,
- uint64_t dst_offset,
- unsigned num_gpu_pages,
- struct radeon_fence *fence);
- int (*copy)(struct radeon_device *rdev,
- uint64_t src_offset,
- uint64_t dst_offset,
- unsigned num_gpu_pages,
- struct radeon_fence *fence);
+
+ struct {
+ int (*blit)(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_gpu_pages,
+ struct radeon_fence *fence);
+ u32 blit_ring_index;
+ int (*dma)(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_gpu_pages,
+ struct radeon_fence *fence);
+ u32 dma_ring_index;
+ /* method used for bo copy */
+ int (*copy)(struct radeon_device *rdev,
+ uint64_t src_offset,
+ uint64_t dst_offset,
+ unsigned num_gpu_pages,
+ struct radeon_fence *fence);
+ /* ring used for bo copies */
+ u32 copy_ring_index;
+ } copy;
+
uint32_t (*get_engine_clock)(struct radeon_device *rdev);
void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock);
uint32_t (*get_memory_clock)(struct radeon_device *rdev);
@@ -1503,8 +1512,6 @@ struct radeon_device {
unsigned debugfs_count;
/* virtual memory */
struct radeon_vm_manager vm_manager;
- /* ring used for bo copies */
- u32 copy_ring;
};
int radeon_device_init(struct radeon_device *rdev,
@@ -1675,9 +1682,12 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->get_vblank_counter((rdev), (crtc))
#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence))
#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait))
-#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f))
-#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f))
-#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f))
+#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f))
+#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy.dma((rdev), (s), (d), (np), (f))
+#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy.copy((rdev), (s), (d), (np), (f))
+#define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index
+#define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index
+#define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index
#define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev))
#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
#define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 38a29bc..6bd1525 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -151,9 +151,14 @@ static struct radeon_asic r100_asic = {
.irq_set = &r100_irq_set,
.irq_process = &r100_irq_process,
.get_vblank_counter = &r100_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = NULL,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_legacy_get_engine_clock,
.set_engine_clock = &radeon_legacy_set_engine_clock,
.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -211,9 +216,14 @@ static struct radeon_asic r200_asic = {
.irq_set = &r100_irq_set,
.irq_process = &r100_irq_process,
.get_vblank_counter = &r100_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_legacy_get_engine_clock,
.set_engine_clock = &radeon_legacy_set_engine_clock,
.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -270,9 +280,14 @@ static struct radeon_asic r300_asic = {
.irq_set = &r100_irq_set,
.irq_process = &r100_irq_process,
.get_vblank_counter = &r100_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_legacy_get_engine_clock,
.set_engine_clock = &radeon_legacy_set_engine_clock,
.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -330,9 +345,14 @@ static struct radeon_asic r300_asic_pcie = {
.irq_set = &r100_irq_set,
.irq_process = &r100_irq_process,
.get_vblank_counter = &r100_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_legacy_get_engine_clock,
.set_engine_clock = &radeon_legacy_set_engine_clock,
.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -389,9 +409,14 @@ static struct radeon_asic r420_asic = {
.irq_set = &r100_irq_set,
.irq_process = &r100_irq_process,
.get_vblank_counter = &r100_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -449,9 +474,14 @@ static struct radeon_asic rs400_asic = {
.irq_set = &r100_irq_set,
.irq_process = &r100_irq_process,
.get_vblank_counter = &r100_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_legacy_get_engine_clock,
.set_engine_clock = &radeon_legacy_set_engine_clock,
.get_memory_clock = &radeon_legacy_get_memory_clock,
@@ -509,9 +539,14 @@ static struct radeon_asic rs600_asic = {
.irq_set = &rs600_irq_set,
.irq_process = &rs600_irq_process,
.get_vblank_counter = &rs600_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -569,9 +604,14 @@ static struct radeon_asic rs690_asic = {
.irq_set = &rs600_irq_set,
.irq_process = &rs600_irq_process,
.get_vblank_counter = &rs600_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r200_copy_dma,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r200_copy_dma,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -629,9 +669,14 @@ static struct radeon_asic rv515_asic = {
.irq_set = &rs600_irq_set,
.irq_process = &rs600_irq_process,
.get_vblank_counter = &rs600_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -689,9 +734,14 @@ static struct radeon_asic r520_asic = {
.irq_set = &rs600_irq_set,
.irq_process = &rs600_irq_process,
.get_vblank_counter = &rs600_get_vblank_counter,
- .copy_blit = &r100_copy_blit,
- .copy_dma = &r200_copy_dma,
- .copy = &r100_copy_blit,
+ .copy = {
+ .blit = &r100_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = &r200_copy_dma,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r100_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -748,9 +798,14 @@ static struct radeon_asic r600_asic = {
.irq_set = &r600_irq_set,
.irq_process = &r600_irq_process,
.get_vblank_counter = &rs600_get_vblank_counter,
- .copy_blit = &r600_copy_blit,
- .copy_dma = NULL,
- .copy = &r600_copy_blit,
+ .copy = {
+ .blit = &r600_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r600_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -807,9 +862,14 @@ static struct radeon_asic rs780_asic = {
.irq_set = &r600_irq_set,
.irq_process = &r600_irq_process,
.get_vblank_counter = &rs600_get_vblank_counter,
- .copy_blit = &r600_copy_blit,
- .copy_dma = NULL,
- .copy = &r600_copy_blit,
+ .copy = {
+ .blit = &r600_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r600_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = NULL,
@@ -866,9 +926,14 @@ static struct radeon_asic rv770_asic = {
.irq_set = &r600_irq_set,
.irq_process = &r600_irq_process,
.get_vblank_counter = &rs600_get_vblank_counter,
- .copy_blit = &r600_copy_blit,
- .copy_dma = NULL,
- .copy = &r600_copy_blit,
+ .copy = {
+ .blit = &r600_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r600_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -925,9 +990,14 @@ static struct radeon_asic evergreen_asic = {
.irq_set = &evergreen_irq_set,
.irq_process = &evergreen_irq_process,
.get_vblank_counter = &evergreen_get_vblank_counter,
- .copy_blit = &r600_copy_blit,
- .copy_dma = NULL,
- .copy = &r600_copy_blit,
+ .copy = {
+ .blit = &r600_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r600_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -984,9 +1054,14 @@ static struct radeon_asic sumo_asic = {
.irq_set = &evergreen_irq_set,
.irq_process = &evergreen_irq_process,
.get_vblank_counter = &evergreen_get_vblank_counter,
- .copy_blit = &r600_copy_blit,
- .copy_dma = NULL,
- .copy = &r600_copy_blit,
+ .copy = {
+ .blit = &r600_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r600_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = NULL,
@@ -1043,9 +1118,14 @@ static struct radeon_asic btc_asic = {
.irq_set = &evergreen_irq_set,
.irq_process = &evergreen_irq_process,
.get_vblank_counter = &evergreen_get_vblank_counter,
- .copy_blit = &r600_copy_blit,
- .copy_dma = NULL,
- .copy = &r600_copy_blit,
+ .copy = {
+ .blit = &r600_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r600_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -1127,9 +1207,14 @@ static struct radeon_asic cayman_asic = {
.irq_set = &evergreen_irq_set,
.irq_process = &evergreen_irq_process,
.get_vblank_counter = &evergreen_get_vblank_counter,
- .copy_blit = &r600_copy_blit,
- .copy_dma = NULL,
- .copy = &r600_copy_blit,
+ .copy = {
+ .blit = &r600_copy_blit,
+ .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .dma = NULL,
+ .dma_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ .copy = &r600_copy_blit,
+ .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
+ },
.get_engine_clock = &radeon_atom_get_engine_clock,
.set_engine_clock = &radeon_atom_set_engine_clock,
.get_memory_clock = &radeon_atom_get_memory_clock,
@@ -1174,9 +1259,6 @@ int radeon_asic_init(struct radeon_device *rdev)
else
rdev->num_crtc = 2;
- /* set the ring used for bo copies */
- rdev->copy_ring = RADEON_RING_TYPE_GFX_INDEX;
-
switch (rdev->family) {
case CHIP_R100:
case CHIP_RV100:
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c
index 815f234..1c9f687 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -43,17 +43,19 @@ static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
start_jiffies = jiffies;
for (i = 0; i < n; i++) {
- r = radeon_fence_create(rdev, &fence, RADEON_RING_TYPE_GFX_INDEX);
- if (r)
- return r;
-
switch (flag) {
case RADEON_BENCHMARK_COPY_DMA:
+ r = radeon_fence_create(rdev, &fence, radeon_copy_dma_ring_index(rdev));
+ if (r)
+ return r;
r = radeon_copy_dma(rdev, saddr, daddr,
size / RADEON_GPU_PAGE_SIZE,
fence);
break;
case RADEON_BENCHMARK_COPY_BLIT:
+ r = radeon_fence_create(rdev, &fence, radeon_copy_blit_ring_index(rdev));
+ if (r)
+ return r;
r = radeon_copy_blit(rdev, saddr, daddr,
size / RADEON_GPU_PAGE_SIZE,
fence);
@@ -129,7 +131,7 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
/* r100 doesn't have dma engine so skip the test */
/* also, VRAM-to-VRAM test doesn't make much sense for DMA */
/* skip it as well if domains are the same */
- if ((rdev->asic->copy_dma) && (sdomain != ddomain)) {
+ if ((rdev->asic->copy.dma) && (sdomain != ddomain)) {
time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
RADEON_BENCHMARK_COPY_DMA, n);
if (time < 0)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index c421e77..f493c64 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -226,7 +226,7 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
int r, i;
rdev = radeon_get_rdev(bo->bdev);
- r = radeon_fence_create(rdev, &fence, rdev->copy_ring);
+ r = radeon_fence_create(rdev, &fence, radeon_copy_ring_index(rdev));
if (unlikely(r)) {
return r;
}
@@ -255,7 +255,7 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
return -EINVAL;
}
- if (!rdev->ring[rdev->copy_ring].ready) {
+ if (!rdev->ring[radeon_copy_ring_index(rdev)].ready) {
DRM_ERROR("Trying to move memory with ring turned off.\n");
return -EINVAL;
}
@@ -266,7 +266,7 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
if (rdev->family >= CHIP_R600) {
for (i = 0; i < RADEON_NUM_RINGS; ++i) {
/* no need to sync to our own or unused rings */
- if (i == rdev->copy_ring || !rdev->ring[i].ready)
+ if (i == radeon_copy_ring_index(rdev) || !rdev->ring[i].ready)
continue;
if (!fence->semaphore) {
@@ -283,12 +283,12 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
radeon_semaphore_emit_signal(rdev, i, fence->semaphore);
radeon_ring_unlock_commit(rdev, &rdev->ring[i]);
- r = radeon_ring_lock(rdev, &rdev->ring[rdev->copy_ring], 3);
+ r = radeon_ring_lock(rdev, &rdev->ring[radeon_copy_ring_index(rdev)], 3);
/* FIXME: handle ring lock error */
if (r)
continue;
- radeon_semaphore_emit_wait(rdev, rdev->copy_ring, fence->semaphore);
- radeon_ring_unlock_commit(rdev, &rdev->ring[rdev->copy_ring]);
+ radeon_semaphore_emit_wait(rdev, radeon_copy_ring_index(rdev), fence->semaphore);
+ radeon_ring_unlock_commit(rdev, &rdev->ring[radeon_copy_ring_index(rdev)]);
}
}
@@ -410,7 +410,8 @@ static int radeon_bo_move(struct ttm_buffer_object *bo,
radeon_move_null(bo, new_mem);
return 0;
}
- if (!rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready || rdev->asic->copy == NULL) {
+ if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
+ rdev->asic->copy.copy == NULL) {
/* use memcpy */
goto memcpy;
}
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index c049c0c..be245d2 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1074,7 +1074,7 @@ static int rv770_startup(struct radeon_device *rdev)
r = r600_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
- rdev->asic->copy = NULL;
+ rdev->asic->copy.copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 07/14] drm/radeon/kms: reorganize irq callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (5 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 06/14] drm/radeon/kms: reorganize copy callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 08/14] drm/radeon/kms: remove unused cp callbacks from radeon_asic alexdeucher
` (9 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 13 +++-
drivers/gpu/drm/radeon/radeon_asic.c | 102 ++++++++++++++++++++++-----------
2 files changed, 77 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d49d461..9fbeca4 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1149,8 +1149,12 @@ struct radeon_asic {
} ring[RADEON_NUM_RINGS];
int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
- int (*irq_set)(struct radeon_device *rdev);
- int (*irq_process)(struct radeon_device *rdev);
+
+ struct {
+ int (*set)(struct radeon_device *rdev);
+ int (*process)(struct radeon_device *rdev);
+ } irq;
+
u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);
struct {
@@ -1203,6 +1207,7 @@ struct radeon_asic {
* through ring.
*/
void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
+ /* check if 3D engine is idle */
bool (*gui_idle)(struct radeon_device *rdev);
/* power management */
struct {
@@ -1677,8 +1682,8 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_ring_test(rdev, cp) (rdev)->asic->ring_test((rdev), (cp))
#define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)].ib_execute((rdev), (ib))
#define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)].ib_parse((rdev), (ib))
-#define radeon_irq_set(rdev) (rdev)->asic->irq_set((rdev))
-#define radeon_irq_process(rdev) (rdev)->asic->irq_process((rdev))
+#define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev))
+#define radeon_irq_process(rdev) (rdev)->asic->irq.process((rdev))
#define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->get_vblank_counter((rdev), (crtc))
#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence))
#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 6bd1525..a7b6c37 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -148,8 +148,10 @@ static struct radeon_asic r100_asic = {
.cs_parse = &r100_cs_parse,
}
},
- .irq_set = &r100_irq_set,
- .irq_process = &r100_irq_process,
+ .irq = {
+ .set = &r100_irq_set,
+ .process = &r100_irq_process,
+ },
.get_vblank_counter = &r100_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -213,8 +215,10 @@ static struct radeon_asic r200_asic = {
.cs_parse = &r100_cs_parse,
}
},
- .irq_set = &r100_irq_set,
- .irq_process = &r100_irq_process,
+ .irq = {
+ .set = &r100_irq_set,
+ .process = &r100_irq_process,
+ },
.get_vblank_counter = &r100_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -277,8 +281,10 @@ static struct radeon_asic r300_asic = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &r100_irq_set,
- .irq_process = &r100_irq_process,
+ .irq = {
+ .set = &r100_irq_set,
+ .process = &r100_irq_process,
+ },
.get_vblank_counter = &r100_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -342,8 +348,10 @@ static struct radeon_asic r300_asic_pcie = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &r100_irq_set,
- .irq_process = &r100_irq_process,
+ .irq = {
+ .set = &r100_irq_set,
+ .process = &r100_irq_process,
+ },
.get_vblank_counter = &r100_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -406,8 +414,10 @@ static struct radeon_asic r420_asic = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &r100_irq_set,
- .irq_process = &r100_irq_process,
+ .irq = {
+ .set = &r100_irq_set,
+ .process = &r100_irq_process,
+ },
.get_vblank_counter = &r100_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -471,8 +481,10 @@ static struct radeon_asic rs400_asic = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &r100_irq_set,
- .irq_process = &r100_irq_process,
+ .irq = {
+ .set = &r100_irq_set,
+ .process = &r100_irq_process,
+ },
.get_vblank_counter = &r100_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -536,8 +548,10 @@ static struct radeon_asic rs600_asic = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &rs600_irq_set,
- .irq_process = &rs600_irq_process,
+ .irq = {
+ .set = &rs600_irq_set,
+ .process = &rs600_irq_process,
+ },
.get_vblank_counter = &rs600_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -601,8 +615,10 @@ static struct radeon_asic rs690_asic = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &rs600_irq_set,
- .irq_process = &rs600_irq_process,
+ .irq = {
+ .set = &rs600_irq_set,
+ .process = &rs600_irq_process,
+ },
.get_vblank_counter = &rs600_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -666,8 +682,10 @@ static struct radeon_asic rv515_asic = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &rs600_irq_set,
- .irq_process = &rs600_irq_process,
+ .irq = {
+ .set = &rs600_irq_set,
+ .process = &rs600_irq_process,
+ },
.get_vblank_counter = &rs600_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -731,8 +749,10 @@ static struct radeon_asic r520_asic = {
.cs_parse = &r300_cs_parse,
}
},
- .irq_set = &rs600_irq_set,
- .irq_process = &rs600_irq_process,
+ .irq = {
+ .set = &rs600_irq_set,
+ .process = &rs600_irq_process,
+ },
.get_vblank_counter = &rs600_get_vblank_counter,
.copy = {
.blit = &r100_copy_blit,
@@ -795,8 +815,10 @@ static struct radeon_asic r600_asic = {
.cs_parse = &r600_cs_parse,
}
},
- .irq_set = &r600_irq_set,
- .irq_process = &r600_irq_process,
+ .irq = {
+ .set = &r600_irq_set,
+ .process = &r600_irq_process,
+ },
.get_vblank_counter = &rs600_get_vblank_counter,
.copy = {
.blit = &r600_copy_blit,
@@ -859,8 +881,10 @@ static struct radeon_asic rs780_asic = {
.cs_parse = &r600_cs_parse,
}
},
- .irq_set = &r600_irq_set,
- .irq_process = &r600_irq_process,
+ .irq = {
+ .set = &r600_irq_set,
+ .process = &r600_irq_process,
+ },
.get_vblank_counter = &rs600_get_vblank_counter,
.copy = {
.blit = &r600_copy_blit,
@@ -923,8 +947,10 @@ static struct radeon_asic rv770_asic = {
.cs_parse = &r600_cs_parse,
}
},
- .irq_set = &r600_irq_set,
- .irq_process = &r600_irq_process,
+ .irq = {
+ .set = &r600_irq_set,
+ .process = &r600_irq_process,
+ },
.get_vblank_counter = &rs600_get_vblank_counter,
.copy = {
.blit = &r600_copy_blit,
@@ -987,8 +1013,10 @@ static struct radeon_asic evergreen_asic = {
.cs_parse = &evergreen_cs_parse,
}
},
- .irq_set = &evergreen_irq_set,
- .irq_process = &evergreen_irq_process,
+ .irq = {
+ .set = &evergreen_irq_set,
+ .process = &evergreen_irq_process,
+ },
.get_vblank_counter = &evergreen_get_vblank_counter,
.copy = {
.blit = &r600_copy_blit,
@@ -1051,8 +1079,10 @@ static struct radeon_asic sumo_asic = {
.cs_parse = &evergreen_cs_parse,
},
},
- .irq_set = &evergreen_irq_set,
- .irq_process = &evergreen_irq_process,
+ .irq = {
+ .set = &evergreen_irq_set,
+ .process = &evergreen_irq_process,
+ },
.get_vblank_counter = &evergreen_get_vblank_counter,
.copy = {
.blit = &r600_copy_blit,
@@ -1115,8 +1145,10 @@ static struct radeon_asic btc_asic = {
.cs_parse = &evergreen_cs_parse,
}
},
- .irq_set = &evergreen_irq_set,
- .irq_process = &evergreen_irq_process,
+ .irq = {
+ .set = &evergreen_irq_set,
+ .process = &evergreen_irq_process,
+ },
.get_vblank_counter = &evergreen_get_vblank_counter,
.copy = {
.blit = &r600_copy_blit,
@@ -1204,8 +1236,10 @@ static struct radeon_asic cayman_asic = {
.cs_parse = &evergreen_cs_parse,
}
},
- .irq_set = &evergreen_irq_set,
- .irq_process = &evergreen_irq_process,
+ .irq = {
+ .set = &evergreen_irq_set,
+ .process = &evergreen_irq_process,
+ },
.get_vblank_counter = &evergreen_get_vblank_counter,
.copy = {
.blit = &r600_copy_blit,
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 08/14] drm/radeon/kms: remove unused cp callbacks from radeon_asic
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (6 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 07/14] drm/radeon/kms: reorganize irq callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 09/14] drm/radeon/kms: make ring_start, ring_test, and ib_test per ring alexdeucher
` (8 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 9fbeca4..d2aa41f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1134,9 +1134,6 @@ struct radeon_asic {
int (*asic_reset)(struct radeon_device *rdev);
void (*gart_tlb_flush)(struct radeon_device *rdev);
int (*gart_set_page)(struct radeon_device *rdev, int i, uint64_t addr);
- int (*cp_init)(struct radeon_device *rdev, unsigned ring_size);
- void (*cp_fini)(struct radeon_device *rdev);
- void (*cp_disable)(struct radeon_device *rdev);
void (*ring_start)(struct radeon_device *rdev);
struct {
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 09/14] drm/radeon/kms: make ring_start, ring_test, and ib_test per ring
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (7 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 08/14] drm/radeon/kms: remove unused cp callbacks from radeon_asic alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 10/14] drm/radeon/kms: reorganize gart callbacks alexdeucher
` (7 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
Each ring type may need a different variant.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/evergreen.c | 4 +-
drivers/gpu/drm/radeon/ni.c | 4 +-
drivers/gpu/drm/radeon/r100.c | 11 ++---
drivers/gpu/drm/radeon/r300.c | 5 +-
drivers/gpu/drm/radeon/r420.c | 2 +-
drivers/gpu/drm/radeon/r520.c | 2 +-
drivers/gpu/drm/radeon/r600.c | 9 ++--
drivers/gpu/drm/radeon/radeon.h | 13 +++---
drivers/gpu/drm/radeon/radeon_asic.c | 75 +++++++++++++++++++++------------
drivers/gpu/drm/radeon/radeon_asic.h | 10 ++--
drivers/gpu/drm/radeon/rs400.c | 2 +-
drivers/gpu/drm/radeon/rs600.c | 2 +-
drivers/gpu/drm/radeon/rs690.c | 2 +-
drivers/gpu/drm/radeon/rv515.c | 5 +-
drivers/gpu/drm/radeon/rv770.c | 2 +-
15 files changed, 83 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index ab334e9..758f04b 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1508,7 +1508,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
evergreen_cp_start(rdev);
ring->ready = true;
- r = radeon_ring_test(rdev, ring);
+ r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);
if (r) {
ring->ready = false;
return r;
@@ -3206,7 +3206,7 @@ static int evergreen_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
DRM_ERROR("radeon: failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 2d9ee5d..160799c 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1318,7 +1318,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;
/* this only test cp0 */
- r = radeon_ring_test(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
+ r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;
rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
@@ -1518,7 +1518,7 @@ static int cayman_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
DRM_ERROR("radeon: failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index bff612a..e36b730 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -964,9 +964,8 @@ static int r100_cp_wait_for_idle(struct radeon_device *rdev)
return -1;
}
-void r100_ring_start(struct radeon_device *rdev)
+void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
{
- struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
int r;
r = radeon_ring_lock(rdev, ring, 2);
@@ -1177,8 +1176,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
WREG32(RADEON_CP_RB_WPTR_DELAY, 0);
WREG32(RADEON_CP_CSQ_MODE, 0x00004D4D);
WREG32(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIBM_INDBM);
- radeon_ring_start(rdev);
- r = radeon_ring_test(rdev, ring);
+ radeon_ring_start(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
+ r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);
if (r) {
DRM_ERROR("radeon: cp isn't working (%d).\n", r);
return r;
@@ -3725,7 +3724,7 @@ void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
radeon_ring_write(ring, ib->length_dw);
}
-int r100_ib_test(struct radeon_device *rdev)
+int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
{
struct radeon_ib *ib;
uint32_t scratch;
@@ -3950,7 +3949,7 @@ static int r100_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 6829638..0a17b1d 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -206,9 +206,8 @@ void r300_fence_ring_emit(struct radeon_device *rdev,
radeon_ring_write(ring, RADEON_SW_INT_FIRE);
}
-void r300_ring_start(struct radeon_device *rdev)
+void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
{
- struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
unsigned gb_tile_config;
int r;
@@ -1419,7 +1418,7 @@ static int r300_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index b143230..f3fcaac 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -279,7 +279,7 @@ static int r420_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 8a9dab0..ebcc15b 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -207,7 +207,7 @@ static int r520_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index e15a267..afb8665 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2226,7 +2226,7 @@ int r600_cp_resume(struct radeon_device *rdev)
r600_cp_start(rdev);
ring->ready = true;
- r = radeon_ring_test(rdev, ring);
+ r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);
if (r) {
ring->ready = false;
return r;
@@ -2490,7 +2490,7 @@ int r600_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
DRM_ERROR("radeon: failed testing IB (%d).\n", r);
rdev->accel_working = false;
@@ -2698,13 +2698,14 @@ void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
radeon_ring_write(ring, ib->length_dw);
}
-int r600_ib_test(struct radeon_device *rdev, int ring)
+int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
{
struct radeon_ib *ib;
uint32_t scratch;
uint32_t tmp = 0;
unsigned i;
int r;
+ int ring_index = radeon_ring_index(rdev, ring);
r = radeon_scratch_get(rdev, &scratch);
if (r) {
@@ -2712,7 +2713,7 @@ int r600_ib_test(struct radeon_device *rdev, int ring)
return r;
}
WREG32(scratch, 0xCAFEDEAD);
- r = radeon_ib_get(rdev, ring, &ib, 256);
+ r = radeon_ib_get(rdev, ring_index, &ib, 256);
if (r) {
DRM_ERROR("radeon: failed to get ib (%d).\n", r);
return r;
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d2aa41f..4559338 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -780,7 +780,6 @@ int radeon_ib_pool_init(struct radeon_device *rdev);
void radeon_ib_pool_fini(struct radeon_device *rdev);
int radeon_ib_pool_start(struct radeon_device *rdev);
int radeon_ib_pool_suspend(struct radeon_device *rdev);
-int radeon_ib_test(struct radeon_device *rdev);
/* Ring access between begin & end cannot sleep */
int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *cp);
void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *cp);
@@ -1134,8 +1133,6 @@ struct radeon_asic {
int (*asic_reset)(struct radeon_device *rdev);
void (*gart_tlb_flush)(struct radeon_device *rdev);
int (*gart_set_page)(struct radeon_device *rdev, int i, uint64_t addr);
- void (*ring_start)(struct radeon_device *rdev);
-
struct {
void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -1143,10 +1140,11 @@ struct radeon_asic {
void (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp,
struct radeon_semaphore *semaphore, bool emit_wait);
int (*cs_parse)(struct radeon_cs_parser *p);
+ void (*ring_start)(struct radeon_device *rdev, struct radeon_ring *cp);
+ int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
+ int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp);
} ring[RADEON_NUM_RINGS];
- int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
-
struct {
int (*set)(struct radeon_device *rdev);
int (*process)(struct radeon_device *rdev);
@@ -1675,8 +1673,9 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))
#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart_tlb_flush((rdev))
#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart_set_page((rdev), (i), (p))
-#define radeon_ring_start(rdev) (rdev)->asic->ring_start((rdev))
-#define radeon_ring_test(rdev, cp) (rdev)->asic->ring_test((rdev), (cp))
+#define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)].ring_start((rdev), (cp))
+#define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)].ring_test((rdev), (cp))
+#define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)].ib_test((rdev), (cp))
#define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)].ib_execute((rdev), (ib))
#define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)].ib_parse((rdev), (ib))
#define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index a7b6c37..85e1350 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -138,14 +138,15 @@ static struct radeon_asic r100_asic = {
.asic_reset = &r100_asic_reset,
.gart_tlb_flush = &r100_pci_gart_tlb_flush,
.gart_set_page = &r100_pci_gart_set_page,
- .ring_start = &r100_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r100_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r100_cs_parse,
+ .ring_start = &r100_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -205,14 +206,15 @@ static struct radeon_asic r200_asic = {
.asic_reset = &r100_asic_reset,
.gart_tlb_flush = &r100_pci_gart_tlb_flush,
.gart_set_page = &r100_pci_gart_set_page,
- .ring_start = &r100_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r100_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r100_cs_parse,
+ .ring_start = &r100_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -271,14 +273,15 @@ static struct radeon_asic r300_asic = {
.asic_reset = &r300_asic_reset,
.gart_tlb_flush = &r100_pci_gart_tlb_flush,
.gart_set_page = &r100_pci_gart_set_page,
- .ring_start = &r300_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &r300_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -338,14 +341,15 @@ static struct radeon_asic r300_asic_pcie = {
.asic_reset = &r300_asic_reset,
.gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
.gart_set_page = &rv370_pcie_gart_set_page,
- .ring_start = &r300_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &r300_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -404,14 +408,15 @@ static struct radeon_asic r420_asic = {
.asic_reset = &r300_asic_reset,
.gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
.gart_set_page = &rv370_pcie_gart_set_page,
- .ring_start = &r300_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &r300_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -471,14 +476,15 @@ static struct radeon_asic rs400_asic = {
.asic_reset = &r300_asic_reset,
.gart_tlb_flush = &rs400_gart_tlb_flush,
.gart_set_page = &rs400_gart_set_page,
- .ring_start = &r300_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &r300_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -538,14 +544,15 @@ static struct radeon_asic rs600_asic = {
.asic_reset = &rs600_asic_reset,
.gart_tlb_flush = &rs600_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_start = &r300_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &r300_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -605,14 +612,15 @@ static struct radeon_asic rs690_asic = {
.asic_reset = &rs600_asic_reset,
.gart_tlb_flush = &rs400_gart_tlb_flush,
.gart_set_page = &rs400_gart_set_page,
- .ring_start = &r300_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &r300_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -672,14 +680,15 @@ static struct radeon_asic rv515_asic = {
.asic_reset = &rs600_asic_reset,
.gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
.gart_set_page = &rv370_pcie_gart_set_page,
- .ring_start = &rv515_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &rv515_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -739,14 +748,15 @@ static struct radeon_asic r520_asic = {
.asic_reset = &rs600_asic_reset,
.gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
.gart_set_page = &rv370_pcie_gart_set_page,
- .ring_start = &rv515_ring_start,
- .ring_test = &r100_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
.emit_fence = &r300_fence_ring_emit,
.emit_semaphore = &r100_semaphore_ring_emit,
.cs_parse = &r300_cs_parse,
+ .ring_start = &rv515_ring_start,
+ .ring_test = &r100_ring_test,
+ .ib_test = &r100_ib_test,
}
},
.irq = {
@@ -806,13 +816,14 @@ static struct radeon_asic r600_asic = {
.asic_reset = &r600_asic_reset,
.gart_tlb_flush = &r600_pcie_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_test = &r600_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r600_ring_ib_execute,
.emit_fence = &r600_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &r600_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
}
},
.irq = {
@@ -872,13 +883,14 @@ static struct radeon_asic rs780_asic = {
.asic_reset = &r600_asic_reset,
.gart_tlb_flush = &r600_pcie_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_test = &r600_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r600_ring_ib_execute,
.emit_fence = &r600_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &r600_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
}
},
.irq = {
@@ -938,13 +950,14 @@ static struct radeon_asic rv770_asic = {
.vga_set_state = &r600_vga_set_state,
.gart_tlb_flush = &r600_pcie_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_test = &r600_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r600_ring_ib_execute,
.emit_fence = &r600_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &r600_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
}
},
.irq = {
@@ -1004,13 +1017,14 @@ static struct radeon_asic evergreen_asic = {
.vga_set_state = &r600_vga_set_state,
.gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_test = &r600_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &evergreen_ring_ib_execute,
.emit_fence = &r600_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &evergreen_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
}
},
.irq = {
@@ -1070,13 +1084,14 @@ static struct radeon_asic sumo_asic = {
.vga_set_state = &r600_vga_set_state,
.gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_test = &r600_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &evergreen_ring_ib_execute,
.emit_fence = &r600_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &evergreen_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
},
},
.irq = {
@@ -1136,13 +1151,14 @@ static struct radeon_asic btc_asic = {
.vga_set_state = &r600_vga_set_state,
.gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_test = &r600_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &evergreen_ring_ib_execute,
.emit_fence = &r600_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &evergreen_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
}
},
.irq = {
@@ -1212,7 +1228,6 @@ static struct radeon_asic cayman_asic = {
.vga_set_state = &r600_vga_set_state,
.gart_tlb_flush = &cayman_pcie_gart_tlb_flush,
.gart_set_page = &rs600_gart_set_page,
- .ring_test = &r600_ring_test,
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &cayman_ring_ib_execute,
@@ -1220,6 +1235,8 @@ static struct radeon_asic cayman_asic = {
.emit_fence = &cayman_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &evergreen_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
},
[CAYMAN_RING_TYPE_CP1_INDEX] = {
.ib_execute = &cayman_ring_ib_execute,
@@ -1227,6 +1244,8 @@ static struct radeon_asic cayman_asic = {
.emit_fence = &cayman_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &evergreen_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
},
[CAYMAN_RING_TYPE_CP2_INDEX] = {
.ib_execute = &cayman_ring_ib_execute,
@@ -1234,6 +1253,8 @@ static struct radeon_asic cayman_asic = {
.emit_fence = &cayman_fence_ring_emit,
.emit_semaphore = &r600_semaphore_ring_emit,
.cs_parse = &evergreen_cs_parse,
+ .ring_test = &r600_ring_test,
+ .ib_test = &r600_ib_test,
}
},
.irq = {
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index fd8d5da..b8f0a16 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -63,7 +63,7 @@ int r100_asic_reset(struct radeon_device *rdev);
u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
-void r100_ring_start(struct radeon_device *rdev);
+void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
int r100_irq_set(struct radeon_device *rdev);
int r100_irq_process(struct radeon_device *rdev);
void r100_fence_ring_emit(struct radeon_device *rdev,
@@ -109,7 +109,7 @@ bool r100_gpu_cp_is_lockup(struct radeon_device *rdev,
struct r100_gpu_lockup *lockup,
struct radeon_ring *cp);
void r100_ib_fini(struct radeon_device *rdev);
-int r100_ib_test(struct radeon_device *rdev);
+int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
void r100_irq_disable(struct radeon_device *rdev);
void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save);
void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save);
@@ -161,7 +161,7 @@ extern int r300_suspend(struct radeon_device *rdev);
extern int r300_resume(struct radeon_device *rdev);
extern bool r300_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
extern int r300_asic_reset(struct radeon_device *rdev);
-extern void r300_ring_start(struct radeon_device *rdev);
+extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
extern void r300_fence_ring_emit(struct radeon_device *rdev,
struct radeon_fence *fence);
extern int r300_cs_parse(struct radeon_cs_parser *p);
@@ -273,7 +273,7 @@ int rv515_init(struct radeon_device *rdev);
void rv515_fini(struct radeon_device *rdev);
uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg);
void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
-void rv515_ring_start(struct radeon_device *rdev);
+void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
void rv515_bandwidth_update(struct radeon_device *rdev);
int rv515_resume(struct radeon_device *rdev);
int rv515_suspend(struct radeon_device *rdev);
@@ -319,7 +319,7 @@ int r600_set_surface_reg(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
void r600_clear_surface_reg(struct radeon_device *rdev, int reg);
-int r600_ib_test(struct radeon_device *rdev, int ring);
+int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
int r600_copy_blit(struct radeon_device *rdev,
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 866a05b..4cf381b 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -430,7 +430,7 @@ static int rs400_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index ab1b6da..fcf3b34 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -883,7 +883,7 @@ static int rs600_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 6ce93b2..f2c3b9d 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -647,7 +647,7 @@ static int rs690_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 959bf44..c0549b1 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -53,9 +53,8 @@ void rv515_debugfs(struct radeon_device *rdev)
}
}
-void rv515_ring_start(struct radeon_device *rdev)
+void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
{
- struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
int r;
r = radeon_ring_lock(rdev, ring, 64);
@@ -413,7 +412,7 @@ static int rv515_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r100_ib_test(rdev);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "failed testing IB (%d).\n", r);
rdev->accel_working = false;
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index be245d2..c62ae4b 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1114,7 +1114,7 @@ static int rv770_startup(struct radeon_device *rdev)
if (r)
return r;
- r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+ r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
if (r) {
dev_err(rdev->dev, "IB test failed (%d).\n", r);
rdev->accel_working = false;
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 10/14] drm/radeon/kms: reorganize gart callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (8 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 09/14] drm/radeon/kms: make ring_start, ring_test, and ib_test per ring alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 11/14] drm/radeon/kms: reorganize display callbacks alexdeucher
` (6 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/r100.c | 4 +-
drivers/gpu/drm/radeon/r300.c | 4 +-
drivers/gpu/drm/radeon/radeon.h | 12 +++-
drivers/gpu/drm/radeon/radeon_asic.c | 110 ++++++++++++++++++++++------------
4 files changed, 84 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index e36b730..8eb1421 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -626,8 +626,8 @@ int r100_pci_gart_init(struct radeon_device *rdev)
if (r)
return r;
rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
- rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
- rdev->asic->gart_set_page = &r100_pci_gart_set_page;
+ rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush;
+ rdev->asic->gart.set_page = &r100_pci_gart_set_page;
return radeon_gart_table_ram_alloc(rdev);
}
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 0a17b1d..fa14383 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -105,8 +105,8 @@ int rv370_pcie_gart_init(struct radeon_device *rdev)
if (r)
DRM_ERROR("Failed to register debugfs file for PCIE gart !\n");
rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
- rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
- rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
+ rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
+ rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
return radeon_gart_table_vram_alloc(rdev);
}
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 4559338..732582f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1131,8 +1131,12 @@ struct radeon_asic {
void (*vga_set_state)(struct radeon_device *rdev, bool state);
bool (*gpu_is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp);
int (*asic_reset)(struct radeon_device *rdev);
- void (*gart_tlb_flush)(struct radeon_device *rdev);
- int (*gart_set_page)(struct radeon_device *rdev, int i, uint64_t addr);
+
+ struct {
+ void (*tlb_flush)(struct radeon_device *rdev);
+ int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr);
+ } gart;
+
struct {
void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -1671,8 +1675,8 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state))
#define radeon_gpu_is_lockup(rdev, cp) (rdev)->asic->gpu_is_lockup((rdev), (cp))
#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))
-#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart_tlb_flush((rdev))
-#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart_set_page((rdev), (i), (p))
+#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev))
+#define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart.set_page((rdev), (i), (p))
#define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)].ring_start((rdev), (cp))
#define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)].ring_test((rdev), (cp))
#define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)].ib_test((rdev), (cp))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 85e1350..1fd6e56 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -114,13 +114,13 @@ void radeon_agp_disable(struct radeon_device *rdev)
rdev->family == CHIP_R423) {
DRM_INFO("Forcing AGP to PCIE mode\n");
rdev->flags |= RADEON_IS_PCIE;
- rdev->asic->gart_tlb_flush = &rv370_pcie_gart_tlb_flush;
- rdev->asic->gart_set_page = &rv370_pcie_gart_set_page;
+ rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
+ rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
} else {
DRM_INFO("Forcing AGP to PCI mode\n");
rdev->flags |= RADEON_IS_PCI;
- rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
- rdev->asic->gart_set_page = &r100_pci_gart_set_page;
+ rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush;
+ rdev->asic->gart.set_page = &r100_pci_gart_set_page;
}
rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
}
@@ -136,8 +136,10 @@ static struct radeon_asic r100_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
- .gart_tlb_flush = &r100_pci_gart_tlb_flush,
- .gart_set_page = &r100_pci_gart_set_page,
+ .gart = {
+ .tlb_flush = &r100_pci_gart_tlb_flush,
+ .set_page = &r100_pci_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -204,8 +206,10 @@ static struct radeon_asic r200_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
- .gart_tlb_flush = &r100_pci_gart_tlb_flush,
- .gart_set_page = &r100_pci_gart_set_page,
+ .gart = {
+ .tlb_flush = &r100_pci_gart_tlb_flush,
+ .set_page = &r100_pci_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -271,8 +275,10 @@ static struct radeon_asic r300_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
- .gart_tlb_flush = &r100_pci_gart_tlb_flush,
- .gart_set_page = &r100_pci_gart_set_page,
+ .gart = {
+ .tlb_flush = &r100_pci_gart_tlb_flush,
+ .set_page = &r100_pci_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -339,8 +345,10 @@ static struct radeon_asic r300_asic_pcie = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
- .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
- .gart_set_page = &rv370_pcie_gart_set_page,
+ .gart = {
+ .tlb_flush = &rv370_pcie_gart_tlb_flush,
+ .set_page = &rv370_pcie_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -406,8 +414,10 @@ static struct radeon_asic r420_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
- .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
- .gart_set_page = &rv370_pcie_gart_set_page,
+ .gart = {
+ .tlb_flush = &rv370_pcie_gart_tlb_flush,
+ .set_page = &rv370_pcie_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -474,8 +484,10 @@ static struct radeon_asic rs400_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
- .gart_tlb_flush = &rs400_gart_tlb_flush,
- .gart_set_page = &rs400_gart_set_page,
+ .gart = {
+ .tlb_flush = &rs400_gart_tlb_flush,
+ .set_page = &rs400_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -542,8 +554,10 @@ static struct radeon_asic rs600_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
- .gart_tlb_flush = &rs600_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &rs600_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -610,8 +624,10 @@ static struct radeon_asic rs690_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
- .gart_tlb_flush = &rs400_gart_tlb_flush,
- .gart_set_page = &rs400_gart_set_page,
+ .gart = {
+ .tlb_flush = &rs400_gart_tlb_flush,
+ .set_page = &rs400_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -678,8 +694,10 @@ static struct radeon_asic rv515_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
- .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
- .gart_set_page = &rv370_pcie_gart_set_page,
+ .gart = {
+ .tlb_flush = &rv370_pcie_gart_tlb_flush,
+ .set_page = &rv370_pcie_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -746,8 +764,10 @@ static struct radeon_asic r520_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
- .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
- .gart_set_page = &rv370_pcie_gart_set_page,
+ .gart = {
+ .tlb_flush = &rv370_pcie_gart_tlb_flush,
+ .set_page = &rv370_pcie_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r100_ring_ib_execute,
@@ -814,8 +834,10 @@ static struct radeon_asic r600_asic = {
.vga_set_state = &r600_vga_set_state,
.gpu_is_lockup = &r600_gpu_is_lockup,
.asic_reset = &r600_asic_reset,
- .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &r600_pcie_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r600_ring_ib_execute,
@@ -881,8 +903,10 @@ static struct radeon_asic rs780_asic = {
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
.asic_reset = &r600_asic_reset,
- .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &r600_pcie_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r600_ring_ib_execute,
@@ -948,8 +972,10 @@ static struct radeon_asic rv770_asic = {
.asic_reset = &r600_asic_reset,
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
- .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &r600_pcie_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &r600_ring_ib_execute,
@@ -1015,8 +1041,10 @@ static struct radeon_asic evergreen_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
- .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &evergreen_pcie_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &evergreen_ring_ib_execute,
@@ -1082,8 +1110,10 @@ static struct radeon_asic sumo_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
- .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &evergreen_pcie_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &evergreen_ring_ib_execute,
@@ -1149,8 +1179,10 @@ static struct radeon_asic btc_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
- .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &evergreen_pcie_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &evergreen_ring_ib_execute,
@@ -1226,8 +1258,10 @@ static struct radeon_asic cayman_asic = {
.gpu_is_lockup = &cayman_gpu_is_lockup,
.asic_reset = &cayman_asic_reset,
.vga_set_state = &r600_vga_set_state,
- .gart_tlb_flush = &cayman_pcie_gart_tlb_flush,
- .gart_set_page = &rs600_gart_set_page,
+ .gart = {
+ .tlb_flush = &cayman_pcie_gart_tlb_flush,
+ .set_page = &rs600_gart_set_page,
+ },
.ring = {
[RADEON_RING_TYPE_GFX_INDEX] = {
.ib_execute = &cayman_ring_ib_execute,
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 11/14] drm/radeon/kms: reorganize display callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (9 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 10/14] drm/radeon/kms: reorganize gart callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 12/14] drm/radeon/kms: move clock/pcie setting callbacks into pm struct alexdeucher
` (5 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 19 +++--
drivers/gpu/drm/radeon/radeon_asic.c | 137 +++++++++++++++++++++-------------
2 files changed, 98 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 732582f..0e75a05 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1154,7 +1154,14 @@ struct radeon_asic {
int (*process)(struct radeon_device *rdev);
} irq;
- u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);
+ struct {
+ /* display watermarks */
+ void (*bandwidth_update)(struct radeon_device *rdev);
+ /* get frame count */
+ u32 (*get_vblank_counter)(struct radeon_device *rdev, int crtc);
+ /* wait for vblank */
+ void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
+ } display;
struct {
int (*blit)(struct radeon_device *rdev,
@@ -1190,7 +1197,6 @@ struct radeon_asic {
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
void (*clear_surface_reg)(struct radeon_device *rdev, int reg);
- void (*bandwidth_update)(struct radeon_device *rdev);
struct {
void (*init)(struct radeon_device *rdev);
@@ -1222,8 +1228,7 @@ struct radeon_asic {
u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
void (*post_page_flip)(struct radeon_device *rdev, int crtc);
} pflip;
- /* wait for vblank */
- void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
+
/* wait for mc_idle */
int (*mc_wait_for_idle)(struct radeon_device *rdev);
};
@@ -1684,7 +1689,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)].ib_parse((rdev), (ib))
#define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev))
#define radeon_irq_process(rdev) (rdev)->asic->irq.process((rdev))
-#define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->get_vblank_counter((rdev), (crtc))
+#define radeon_get_vblank_counter(rdev, crtc) (rdev)->asic->display.get_vblank_counter((rdev), (crtc))
#define radeon_fence_ring_emit(rdev, r, fence) (rdev)->asic->ring[(r)].emit_fence((rdev), (fence))
#define radeon_semaphore_ring_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)].emit_semaphore((rdev), (cp), (semaphore), (emit_wait))
#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy.blit((rdev), (s), (d), (np), (f))
@@ -1702,7 +1707,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))
#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
-#define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
+#define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev))
#define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev))
#define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev))
#define radeon_hpd_sense(rdev, h) (rdev)->asic->hpd.sense((rdev), (h))
@@ -1716,7 +1721,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pflip.pre_page_flip((rdev), (crtc))
#define radeon_page_flip(rdev, crtc, base) rdev->asic->pflip.page_flip((rdev), (crtc), (base))
#define radeon_post_page_flip(rdev, crtc) rdev->asic->pflip.post_page_flip((rdev), (crtc))
-#define radeon_wait_for_vblank(rdev, crtc) rdev->asic->wait_for_vblank((rdev), (crtc))
+#define radeon_wait_for_vblank(rdev, crtc) rdev->asic->display.wait_for_vblank((rdev), (crtc))
#define radeon_mc_wait_for_idle(rdev) rdev->asic->mc_wait_for_idle((rdev))
/* Common functions */
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 1fd6e56..01ea642 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -155,7 +155,11 @@ static struct radeon_asic r100_asic = {
.set = &r100_irq_set,
.process = &r100_irq_process,
},
- .get_vblank_counter = &r100_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &r100_bandwidth_update,
+ .get_vblank_counter = &r100_get_vblank_counter,
+ .wait_for_vblank = &r100_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -173,7 +177,6 @@ static struct radeon_asic r100_asic = {
.set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &r100_bandwidth_update,
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -194,7 +197,6 @@ static struct radeon_asic r100_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r100_mc_wait_for_idle,
};
@@ -225,7 +227,11 @@ static struct radeon_asic r200_asic = {
.set = &r100_irq_set,
.process = &r100_irq_process,
},
- .get_vblank_counter = &r100_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &r100_bandwidth_update,
+ .get_vblank_counter = &r100_get_vblank_counter,
+ .wait_for_vblank = &r100_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -242,7 +248,6 @@ static struct radeon_asic r200_asic = {
.set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &r100_bandwidth_update,
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -263,7 +268,6 @@ static struct radeon_asic r200_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r100_mc_wait_for_idle,
};
@@ -294,7 +298,11 @@ static struct radeon_asic r300_asic = {
.set = &r100_irq_set,
.process = &r100_irq_process,
},
- .get_vblank_counter = &r100_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &r100_bandwidth_update,
+ .get_vblank_counter = &r100_get_vblank_counter,
+ .wait_for_vblank = &r100_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -312,7 +320,6 @@ static struct radeon_asic r300_asic = {
.set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &r100_bandwidth_update,
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -333,7 +340,6 @@ static struct radeon_asic r300_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r300_mc_wait_for_idle,
};
@@ -364,7 +370,11 @@ static struct radeon_asic r300_asic_pcie = {
.set = &r100_irq_set,
.process = &r100_irq_process,
},
- .get_vblank_counter = &r100_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &r100_bandwidth_update,
+ .get_vblank_counter = &r100_get_vblank_counter,
+ .wait_for_vblank = &r100_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -381,7 +391,6 @@ static struct radeon_asic r300_asic_pcie = {
.set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &r100_bandwidth_update,
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -402,7 +411,6 @@ static struct radeon_asic r300_asic_pcie = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r300_mc_wait_for_idle,
};
@@ -433,7 +441,11 @@ static struct radeon_asic r420_asic = {
.set = &r100_irq_set,
.process = &r100_irq_process,
},
- .get_vblank_counter = &r100_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &r100_bandwidth_update,
+ .get_vblank_counter = &r100_get_vblank_counter,
+ .wait_for_vblank = &r100_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -451,7 +463,7 @@ static struct radeon_asic r420_asic = {
.set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &r100_bandwidth_update,
+
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -472,7 +484,6 @@ static struct radeon_asic r420_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &r300_mc_wait_for_idle,
};
@@ -503,7 +514,11 @@ static struct radeon_asic rs400_asic = {
.set = &r100_irq_set,
.process = &r100_irq_process,
},
- .get_vblank_counter = &r100_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &r100_bandwidth_update,
+ .get_vblank_counter = &r100_get_vblank_counter,
+ .wait_for_vblank = &r100_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -521,7 +536,6 @@ static struct radeon_asic rs400_asic = {
.set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &r100_bandwidth_update,
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -542,7 +556,6 @@ static struct radeon_asic rs400_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .wait_for_vblank = &r100_wait_for_vblank,
.mc_wait_for_idle = &rs400_mc_wait_for_idle,
};
@@ -573,7 +586,11 @@ static struct radeon_asic rs600_asic = {
.set = &rs600_irq_set,
.process = &rs600_irq_process,
},
- .get_vblank_counter = &rs600_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &rs600_bandwidth_update,
+ .get_vblank_counter = &rs600_get_vblank_counter,
+ .wait_for_vblank = &avivo_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -591,7 +608,6 @@ static struct radeon_asic rs600_asic = {
.set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &rs600_bandwidth_update,
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -612,7 +628,6 @@ static struct radeon_asic rs600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &rs600_mc_wait_for_idle,
};
@@ -643,7 +658,11 @@ static struct radeon_asic rs690_asic = {
.set = &rs600_irq_set,
.process = &rs600_irq_process,
},
- .get_vblank_counter = &rs600_get_vblank_counter,
+ .display = {
+ .get_vblank_counter = &rs600_get_vblank_counter,
+ .bandwidth_update = &rs690_bandwidth_update,
+ .wait_for_vblank = &avivo_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -661,7 +680,6 @@ static struct radeon_asic rs690_asic = {
.set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &rs690_bandwidth_update,
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -682,7 +700,6 @@ static struct radeon_asic rs690_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &rs690_mc_wait_for_idle,
};
@@ -713,7 +730,11 @@ static struct radeon_asic rv515_asic = {
.set = &rs600_irq_set,
.process = &rs600_irq_process,
},
- .get_vblank_counter = &rs600_get_vblank_counter,
+ .display = {
+ .get_vblank_counter = &rs600_get_vblank_counter,
+ .bandwidth_update = &rv515_bandwidth_update,
+ .wait_for_vblank = &avivo_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -731,7 +752,6 @@ static struct radeon_asic rv515_asic = {
.set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &rv515_bandwidth_update,
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -752,7 +772,6 @@ static struct radeon_asic rv515_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &rv515_mc_wait_for_idle,
};
@@ -783,7 +802,11 @@ static struct radeon_asic r520_asic = {
.set = &rs600_irq_set,
.process = &rs600_irq_process,
},
- .get_vblank_counter = &rs600_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &rv515_bandwidth_update,
+ .get_vblank_counter = &rs600_get_vblank_counter,
+ .wait_for_vblank = &avivo_wait_for_vblank,
+ },
.copy = {
.blit = &r100_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -801,7 +824,6 @@ static struct radeon_asic r520_asic = {
.set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
- .bandwidth_update = &rv515_bandwidth_update,
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -822,7 +844,6 @@ static struct radeon_asic r520_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r520_mc_wait_for_idle,
};
@@ -852,7 +873,11 @@ static struct radeon_asic r600_asic = {
.set = &r600_irq_set,
.process = &r600_irq_process,
},
- .get_vblank_counter = &rs600_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &rv515_bandwidth_update,
+ .get_vblank_counter = &rs600_get_vblank_counter,
+ .wait_for_vblank = &avivo_wait_for_vblank,
+ },
.copy = {
.blit = &r600_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -870,7 +895,6 @@ static struct radeon_asic r600_asic = {
.set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = &rv515_bandwidth_update,
.hpd = {
.init = &r600_hpd_init,
.fini = &r600_hpd_fini,
@@ -891,7 +915,6 @@ static struct radeon_asic r600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r600_mc_wait_for_idle,
};
@@ -921,7 +944,11 @@ static struct radeon_asic rs780_asic = {
.set = &r600_irq_set,
.process = &r600_irq_process,
},
- .get_vblank_counter = &rs600_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &rs690_bandwidth_update,
+ .get_vblank_counter = &rs600_get_vblank_counter,
+ .wait_for_vblank = &avivo_wait_for_vblank,
+ },
.copy = {
.blit = &r600_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -939,7 +966,6 @@ static struct radeon_asic rs780_asic = {
.set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = &rs690_bandwidth_update,
.hpd = {
.init = &r600_hpd_init,
.fini = &r600_hpd_fini,
@@ -960,7 +986,6 @@ static struct radeon_asic rs780_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r600_mc_wait_for_idle,
};
@@ -990,7 +1015,11 @@ static struct radeon_asic rv770_asic = {
.set = &r600_irq_set,
.process = &r600_irq_process,
},
- .get_vblank_counter = &rs600_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &rv515_bandwidth_update,
+ .get_vblank_counter = &rs600_get_vblank_counter,
+ .wait_for_vblank = &avivo_wait_for_vblank,
+ },
.copy = {
.blit = &r600_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -1008,7 +1037,6 @@ static struct radeon_asic rv770_asic = {
.set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = &rv515_bandwidth_update,
.hpd = {
.init = &r600_hpd_init,
.fini = &r600_hpd_fini,
@@ -1029,7 +1057,6 @@ static struct radeon_asic rv770_asic = {
.page_flip = &rv770_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .wait_for_vblank = &avivo_wait_for_vblank,
.mc_wait_for_idle = &r600_mc_wait_for_idle,
};
@@ -1059,7 +1086,11 @@ static struct radeon_asic evergreen_asic = {
.set = &evergreen_irq_set,
.process = &evergreen_irq_process,
},
- .get_vblank_counter = &evergreen_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &evergreen_bandwidth_update,
+ .get_vblank_counter = &evergreen_get_vblank_counter,
+ .wait_for_vblank = &dce4_wait_for_vblank,
+ },
.copy = {
.blit = &r600_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -1077,7 +1108,6 @@ static struct radeon_asic evergreen_asic = {
.set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = &evergreen_bandwidth_update,
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
@@ -1098,7 +1128,6 @@ static struct radeon_asic evergreen_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
@@ -1128,7 +1157,11 @@ static struct radeon_asic sumo_asic = {
.set = &evergreen_irq_set,
.process = &evergreen_irq_process,
},
- .get_vblank_counter = &evergreen_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &evergreen_bandwidth_update,
+ .get_vblank_counter = &evergreen_get_vblank_counter,
+ .wait_for_vblank = &dce4_wait_for_vblank,
+ },
.copy = {
.blit = &r600_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -1146,7 +1179,6 @@ static struct radeon_asic sumo_asic = {
.set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = &evergreen_bandwidth_update,
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
@@ -1167,7 +1199,6 @@ static struct radeon_asic sumo_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
@@ -1197,7 +1228,11 @@ static struct radeon_asic btc_asic = {
.set = &evergreen_irq_set,
.process = &evergreen_irq_process,
},
- .get_vblank_counter = &evergreen_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &evergreen_bandwidth_update,
+ .get_vblank_counter = &evergreen_get_vblank_counter,
+ .wait_for_vblank = &dce4_wait_for_vblank,
+ },
.copy = {
.blit = &r600_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -1215,7 +1250,6 @@ static struct radeon_asic btc_asic = {
.set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = &evergreen_bandwidth_update,
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
@@ -1236,7 +1270,6 @@ static struct radeon_asic btc_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
@@ -1295,7 +1328,11 @@ static struct radeon_asic cayman_asic = {
.set = &evergreen_irq_set,
.process = &evergreen_irq_process,
},
- .get_vblank_counter = &evergreen_get_vblank_counter,
+ .display = {
+ .bandwidth_update = &evergreen_bandwidth_update,
+ .get_vblank_counter = &evergreen_get_vblank_counter,
+ .wait_for_vblank = &dce4_wait_for_vblank,
+ },
.copy = {
.blit = &r600_copy_blit,
.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
@@ -1313,7 +1350,6 @@ static struct radeon_asic cayman_asic = {
.set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
- .bandwidth_update = &evergreen_bandwidth_update,
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
@@ -1334,7 +1370,6 @@ static struct radeon_asic cayman_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .wait_for_vblank = &dce4_wait_for_vblank,
.mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 12/14] drm/radeon/kms: move clock/pcie setting callbacks into pm struct
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (10 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 11/14] drm/radeon/kms: reorganize display callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 13/14] drm/radeon/kms: reorganize surface callbacks alexdeucher
` (4 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/r100.c | 2 +-
drivers/gpu/drm/radeon/radeon.h | 28 ++--
drivers/gpu/drm/radeon/radeon_asic.c | 248 ++++++++++++++++----------------
drivers/gpu/drm/radeon/radeon_clocks.c | 2 +-
drivers/gpu/drm/radeon/radeon_pm.c | 6 +-
drivers/gpu/drm/radeon/rs600.c | 2 +-
6 files changed, 145 insertions(+), 143 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 8eb1421..42ae955 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -446,7 +446,7 @@ void r100_pm_misc(struct radeon_device *rdev)
/* set pcie lanes */
if ((rdev->flags & RADEON_IS_PCIE) &&
!(rdev->flags & RADEON_IS_IGP) &&
- rdev->asic->set_pcie_lanes &&
+ rdev->asic->pm.set_pcie_lanes &&
(ps->pcie_lanes !=
rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
radeon_set_pcie_lanes(rdev,
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 0e75a05..88dacc5 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1186,13 +1186,6 @@ struct radeon_asic {
u32 copy_ring_index;
} copy;
- uint32_t (*get_engine_clock)(struct radeon_device *rdev);
- void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock);
- uint32_t (*get_memory_clock)(struct radeon_device *rdev);
- void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock);
- int (*get_pcie_lanes)(struct radeon_device *rdev);
- void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes);
- void (*set_clock_gating)(struct radeon_device *rdev, int enable);
int (*set_surface_reg)(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
@@ -1221,6 +1214,13 @@ struct radeon_asic {
void (*finish)(struct radeon_device *rdev);
void (*init_profile)(struct radeon_device *rdev);
void (*get_dynpm_state)(struct radeon_device *rdev);
+ uint32_t (*get_engine_clock)(struct radeon_device *rdev);
+ void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock);
+ uint32_t (*get_memory_clock)(struct radeon_device *rdev);
+ void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock);
+ int (*get_pcie_lanes)(struct radeon_device *rdev);
+ void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes);
+ void (*set_clock_gating)(struct radeon_device *rdev, int enable);
} pm;
/* pageflipping */
struct {
@@ -1698,13 +1698,13 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_copy_blit_ring_index(rdev) (rdev)->asic->copy.blit_ring_index
#define radeon_copy_dma_ring_index(rdev) (rdev)->asic->copy.dma_ring_index
#define radeon_copy_ring_index(rdev) (rdev)->asic->copy.copy_ring_index
-#define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev))
-#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
-#define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev))
-#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_memory_clock((rdev), (e))
-#define radeon_get_pcie_lanes(rdev) (rdev)->asic->get_pcie_lanes((rdev))
-#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l))
-#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))
+#define radeon_get_engine_clock(rdev) (rdev)->asic->pm.get_engine_clock((rdev))
+#define radeon_set_engine_clock(rdev, e) (rdev)->asic->pm.set_engine_clock((rdev), (e))
+#define radeon_get_memory_clock(rdev) (rdev)->asic->pm.get_memory_clock((rdev))
+#define radeon_set_memory_clock(rdev, e) (rdev)->asic->pm.set_memory_clock((rdev), (e))
+#define radeon_get_pcie_lanes(rdev) (rdev)->asic->pm.get_pcie_lanes((rdev))
+#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l))
+#define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e))
#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
#define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 01ea642..4eaa5f1 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -168,13 +168,6 @@ static struct radeon_asic r100_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_legacy_get_engine_clock,
- .set_engine_clock = &radeon_legacy_set_engine_clock,
- .get_memory_clock = &radeon_legacy_get_memory_clock,
- .set_memory_clock = NULL,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -191,6 +184,13 @@ static struct radeon_asic r100_asic = {
.finish = &r100_pm_finish,
.init_profile = &r100_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_legacy_get_engine_clock,
+ .set_engine_clock = &radeon_legacy_set_engine_clock,
+ .get_memory_clock = &radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = &radeon_legacy_set_clock_gating,
},
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
@@ -240,12 +240,6 @@ static struct radeon_asic r200_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_legacy_get_engine_clock,
- .set_engine_clock = &radeon_legacy_set_engine_clock,
- .get_memory_clock = &radeon_legacy_get_memory_clock,
- .set_memory_clock = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -262,6 +256,13 @@ static struct radeon_asic r200_asic = {
.finish = &r100_pm_finish,
.init_profile = &r100_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_legacy_get_engine_clock,
+ .set_engine_clock = &radeon_legacy_set_engine_clock,
+ .get_memory_clock = &radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = &radeon_legacy_set_clock_gating,
},
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
@@ -311,13 +312,6 @@ static struct radeon_asic r300_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_legacy_get_engine_clock,
- .set_engine_clock = &radeon_legacy_set_engine_clock,
- .get_memory_clock = &radeon_legacy_get_memory_clock,
- .set_memory_clock = NULL,
- .get_pcie_lanes = &rv370_get_pcie_lanes,
- .set_pcie_lanes = &rv370_set_pcie_lanes,
- .set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -334,6 +328,13 @@ static struct radeon_asic r300_asic = {
.finish = &r100_pm_finish,
.init_profile = &r100_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_legacy_get_engine_clock,
+ .set_engine_clock = &radeon_legacy_set_engine_clock,
+ .get_memory_clock = &radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = &rv370_get_pcie_lanes,
+ .set_pcie_lanes = &rv370_set_pcie_lanes,
+ .set_clock_gating = &radeon_legacy_set_clock_gating,
},
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
@@ -383,12 +384,6 @@ static struct radeon_asic r300_asic_pcie = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_legacy_get_engine_clock,
- .set_engine_clock = &radeon_legacy_set_engine_clock,
- .get_memory_clock = &radeon_legacy_get_memory_clock,
- .set_memory_clock = NULL,
- .set_pcie_lanes = &rv370_set_pcie_lanes,
- .set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -405,6 +400,13 @@ static struct radeon_asic r300_asic_pcie = {
.finish = &r100_pm_finish,
.init_profile = &r100_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_legacy_get_engine_clock,
+ .set_engine_clock = &radeon_legacy_set_engine_clock,
+ .get_memory_clock = &radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = &rv370_get_pcie_lanes,
+ .set_pcie_lanes = &rv370_set_pcie_lanes,
+ .set_clock_gating = &radeon_legacy_set_clock_gating,
},
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
@@ -454,13 +456,6 @@ static struct radeon_asic r420_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = &rv370_get_pcie_lanes,
- .set_pcie_lanes = &rv370_set_pcie_lanes,
- .set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
@@ -478,6 +473,13 @@ static struct radeon_asic r420_asic = {
.finish = &r100_pm_finish,
.init_profile = &r420_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = &rv370_get_pcie_lanes,
+ .set_pcie_lanes = &rv370_set_pcie_lanes,
+ .set_clock_gating = &radeon_atom_set_clock_gating,
},
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
@@ -527,13 +529,6 @@ static struct radeon_asic rs400_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_legacy_get_engine_clock,
- .set_engine_clock = &radeon_legacy_set_engine_clock,
- .get_memory_clock = &radeon_legacy_get_memory_clock,
- .set_memory_clock = NULL,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = &radeon_legacy_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -550,6 +545,13 @@ static struct radeon_asic rs400_asic = {
.finish = &r100_pm_finish,
.init_profile = &r100_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_legacy_get_engine_clock,
+ .set_engine_clock = &radeon_legacy_set_engine_clock,
+ .get_memory_clock = &radeon_legacy_get_memory_clock,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = &radeon_legacy_set_clock_gating,
},
.pflip = {
.pre_page_flip = &r100_pre_page_flip,
@@ -599,13 +601,6 @@ static struct radeon_asic rs600_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -622,6 +617,13 @@ static struct radeon_asic rs600_asic = {
.finish = &rs600_pm_finish,
.init_profile = &r420_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = &radeon_atom_set_clock_gating,
},
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
@@ -671,13 +673,6 @@ static struct radeon_asic rs690_asic = {
.copy = &r200_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -694,6 +689,13 @@ static struct radeon_asic rs690_asic = {
.finish = &rs600_pm_finish,
.init_profile = &r420_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = &radeon_atom_set_clock_gating,
},
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
@@ -743,13 +745,6 @@ static struct radeon_asic rv515_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = &rv370_get_pcie_lanes,
- .set_pcie_lanes = &rv370_set_pcie_lanes,
- .set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -766,6 +761,13 @@ static struct radeon_asic rv515_asic = {
.finish = &rs600_pm_finish,
.init_profile = &r420_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = &rv370_get_pcie_lanes,
+ .set_pcie_lanes = &rv370_set_pcie_lanes,
+ .set_clock_gating = &radeon_atom_set_clock_gating,
},
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
@@ -815,13 +817,6 @@ static struct radeon_asic r520_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = &rv370_get_pcie_lanes,
- .set_pcie_lanes = &rv370_set_pcie_lanes,
- .set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r100_set_surface_reg,
.clear_surface_reg = r100_clear_surface_reg,
.hpd = {
@@ -838,6 +833,13 @@ static struct radeon_asic r520_asic = {
.finish = &rs600_pm_finish,
.init_profile = &r420_pm_init_profile,
.get_dynpm_state = &r100_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = &rv370_get_pcie_lanes,
+ .set_pcie_lanes = &rv370_set_pcie_lanes,
+ .set_clock_gating = &radeon_atom_set_clock_gating,
},
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
@@ -886,13 +888,6 @@ static struct radeon_asic r600_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = &r600_get_pcie_lanes,
- .set_pcie_lanes = &r600_set_pcie_lanes,
- .set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.hpd = {
@@ -909,6 +904,13 @@ static struct radeon_asic r600_asic = {
.finish = &rs600_pm_finish,
.init_profile = &r600_pm_init_profile,
.get_dynpm_state = &r600_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = &r600_get_pcie_lanes,
+ .set_pcie_lanes = &r600_set_pcie_lanes,
+ .set_clock_gating = NULL,
},
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
@@ -957,13 +959,6 @@ static struct radeon_asic rs780_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = NULL,
- .set_memory_clock = NULL,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.hpd = {
@@ -980,6 +975,13 @@ static struct radeon_asic rs780_asic = {
.finish = &rs600_pm_finish,
.init_profile = &rs780_pm_init_profile,
.get_dynpm_state = &r600_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = NULL,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = NULL,
},
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
@@ -1028,13 +1030,6 @@ static struct radeon_asic rv770_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = &r600_get_pcie_lanes,
- .set_pcie_lanes = &r600_set_pcie_lanes,
- .set_clock_gating = &radeon_atom_set_clock_gating,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.hpd = {
@@ -1051,6 +1046,13 @@ static struct radeon_asic rv770_asic = {
.finish = &rs600_pm_finish,
.init_profile = &r600_pm_init_profile,
.get_dynpm_state = &r600_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = &r600_get_pcie_lanes,
+ .set_pcie_lanes = &r600_set_pcie_lanes,
+ .set_clock_gating = &radeon_atom_set_clock_gating,
},
.pflip = {
.pre_page_flip = &rs600_pre_page_flip,
@@ -1099,13 +1101,6 @@ static struct radeon_asic evergreen_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = &r600_get_pcie_lanes,
- .set_pcie_lanes = &r600_set_pcie_lanes,
- .set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.hpd = {
@@ -1122,6 +1117,13 @@ static struct radeon_asic evergreen_asic = {
.finish = &evergreen_pm_finish,
.init_profile = &r600_pm_init_profile,
.get_dynpm_state = &r600_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = &r600_get_pcie_lanes,
+ .set_pcie_lanes = &r600_set_pcie_lanes,
+ .set_clock_gating = NULL,
},
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
@@ -1170,13 +1172,6 @@ static struct radeon_asic sumo_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = NULL,
- .set_memory_clock = NULL,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.hpd = {
@@ -1193,6 +1188,13 @@ static struct radeon_asic sumo_asic = {
.finish = &evergreen_pm_finish,
.init_profile = &sumo_pm_init_profile,
.get_dynpm_state = &r600_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = NULL,
+ .set_memory_clock = NULL,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = NULL,
},
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
@@ -1241,13 +1243,6 @@ static struct radeon_asic btc_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.hpd = {
@@ -1264,6 +1259,13 @@ static struct radeon_asic btc_asic = {
.finish = &evergreen_pm_finish,
.init_profile = &r600_pm_init_profile,
.get_dynpm_state = &r600_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = NULL,
},
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
@@ -1341,13 +1343,6 @@ static struct radeon_asic cayman_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .get_engine_clock = &radeon_atom_get_engine_clock,
- .set_engine_clock = &radeon_atom_set_engine_clock,
- .get_memory_clock = &radeon_atom_get_memory_clock,
- .set_memory_clock = &radeon_atom_set_memory_clock,
- .get_pcie_lanes = NULL,
- .set_pcie_lanes = NULL,
- .set_clock_gating = NULL,
.set_surface_reg = r600_set_surface_reg,
.clear_surface_reg = r600_clear_surface_reg,
.hpd = {
@@ -1364,6 +1359,13 @@ static struct radeon_asic cayman_asic = {
.finish = &evergreen_pm_finish,
.init_profile = &r600_pm_init_profile,
.get_dynpm_state = &r600_pm_get_dynpm_state,
+ .get_engine_clock = &radeon_atom_get_engine_clock,
+ .set_engine_clock = &radeon_atom_set_engine_clock,
+ .get_memory_clock = &radeon_atom_get_memory_clock,
+ .set_memory_clock = &radeon_atom_set_memory_clock,
+ .get_pcie_lanes = NULL,
+ .set_pcie_lanes = NULL,
+ .set_clock_gating = NULL,
},
.pflip = {
.pre_page_flip = &evergreen_pre_page_flip,
@@ -1412,10 +1414,10 @@ int radeon_asic_init(struct radeon_device *rdev)
rdev->asic = &r420_asic;
/* handle macs */
if (rdev->bios == NULL) {
- rdev->asic->get_engine_clock = &radeon_legacy_get_engine_clock;
- rdev->asic->set_engine_clock = &radeon_legacy_set_engine_clock;
- rdev->asic->get_memory_clock = &radeon_legacy_get_memory_clock;
- rdev->asic->set_memory_clock = NULL;
+ rdev->asic->pm.get_engine_clock = &radeon_legacy_get_engine_clock;
+ rdev->asic->pm.set_engine_clock = &radeon_legacy_set_engine_clock;
+ rdev->asic->pm.get_memory_clock = &radeon_legacy_get_memory_clock;
+ rdev->asic->pm.set_memory_clock = NULL;
}
break;
case CHIP_RS400:
@@ -1496,8 +1498,8 @@ int radeon_asic_init(struct radeon_device *rdev)
}
if (rdev->flags & RADEON_IS_IGP) {
- rdev->asic->get_memory_clock = NULL;
- rdev->asic->set_memory_clock = NULL;
+ rdev->asic->pm.get_memory_clock = NULL;
+ rdev->asic->pm.set_memory_clock = NULL;
}
return 0;
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index b6e18c8..6ae0c75 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -334,7 +334,7 @@ void radeon_get_clock_info(struct drm_device *dev)
if (!rdev->clock.default_sclk)
rdev->clock.default_sclk = radeon_get_engine_clock(rdev);
- if ((!rdev->clock.default_mclk) && rdev->asic->get_memory_clock)
+ if ((!rdev->clock.default_mclk) && rdev->asic->pm.get_memory_clock)
rdev->clock.default_mclk = radeon_get_memory_clock(rdev);
rdev->pm.current_sclk = rdev->clock.default_sclk;
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 095148e..3575129 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -221,7 +221,7 @@ static void radeon_set_power_state(struct radeon_device *rdev)
}
/* set memory clock */
- if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) {
+ if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) {
radeon_pm_debug_check_in_vbl(rdev, false);
radeon_set_memory_clock(rdev, mclk);
radeon_pm_debug_check_in_vbl(rdev, true);
@@ -863,11 +863,11 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);
seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);
- if (rdev->asic->get_memory_clock)
+ if (rdev->asic->pm.get_memory_clock)
seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
if (rdev->pm.current_vddc)
seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);
- if (rdev->asic->get_pcie_lanes)
+ if (rdev->asic->pm.get_pcie_lanes)
seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
return 0;
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index fcf3b34..d25cf86 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -194,7 +194,7 @@ void rs600_pm_misc(struct radeon_device *rdev)
/* set pcie lanes */
if ((rdev->flags & RADEON_IS_PCIE) &&
!(rdev->flags & RADEON_IS_IGP) &&
- rdev->asic->set_pcie_lanes &&
+ rdev->asic->pm.set_pcie_lanes &&
(ps->pcie_lanes !=
rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) {
radeon_set_pcie_lanes(rdev,
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 13/14] drm/radeon/kms: reorganize surface callbacks
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (11 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 12/14] drm/radeon/kms: move clock/pcie setting callbacks into pm struct alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 22:53 ` [drm-next 14/14] drm/radeon/kms: clean up radeon_asic struct alexdeucher
` (3 subsequent siblings)
16 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
tidy up the radeon_asic struct.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 14 +++--
drivers/gpu/drm/radeon/radeon_asic.c | 103 ++++++++++++++++++++++------------
2 files changed, 76 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 88dacc5..5077478 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1186,10 +1186,12 @@ struct radeon_asic {
u32 copy_ring_index;
} copy;
- int (*set_surface_reg)(struct radeon_device *rdev, int reg,
- uint32_t tiling_flags, uint32_t pitch,
- uint32_t offset, uint32_t obj_size);
- void (*clear_surface_reg)(struct radeon_device *rdev, int reg);
+ struct {
+ int (*set_reg)(struct radeon_device *rdev, int reg,
+ uint32_t tiling_flags, uint32_t pitch,
+ uint32_t offset, uint32_t obj_size);
+ void (*clear_reg)(struct radeon_device *rdev, int reg);
+ } surface;
struct {
void (*init)(struct radeon_device *rdev);
@@ -1705,8 +1707,8 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_get_pcie_lanes(rdev) (rdev)->asic->pm.get_pcie_lanes((rdev))
#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->pm.set_pcie_lanes((rdev), (l))
#define radeon_set_clock_gating(rdev, e) (rdev)->asic->pm.set_clock_gating((rdev), (e))
-#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
-#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
+#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->surface.set_reg((rdev), (r), (f), (p), (o), (s)))
+#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->surface.clear_reg((rdev), (r)))
#define radeon_bandwidth_update(rdev) (rdev)->asic->display.bandwidth_update((rdev))
#define radeon_hpd_init(rdev) (rdev)->asic->hpd.init((rdev))
#define radeon_hpd_fini(rdev) (rdev)->asic->hpd.fini((rdev))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 4eaa5f1..0a59f48 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -168,8 +168,10 @@ static struct radeon_asic r100_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -240,8 +242,10 @@ static struct radeon_asic r200_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -312,8 +316,10 @@ static struct radeon_asic r300_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -384,8 +390,10 @@ static struct radeon_asic r300_asic_pcie = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -456,9 +464,10 @@ static struct radeon_asic r420_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
-
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -529,8 +538,10 @@ static struct radeon_asic rs400_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &r100_hpd_init,
.fini = &r100_hpd_fini,
@@ -601,8 +612,10 @@ static struct radeon_asic rs600_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -673,8 +686,10 @@ static struct radeon_asic rs690_asic = {
.copy = &r200_copy_dma,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -745,8 +760,10 @@ static struct radeon_asic rv515_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -817,8 +834,10 @@ static struct radeon_asic r520_asic = {
.copy = &r100_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r100_set_surface_reg,
- .clear_surface_reg = r100_clear_surface_reg,
+ .surface = {
+ .set_reg = r100_set_surface_reg,
+ .clear_reg = r100_clear_surface_reg,
+ },
.hpd = {
.init = &rs600_hpd_init,
.fini = &rs600_hpd_fini,
@@ -888,8 +907,10 @@ static struct radeon_asic r600_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
+ .surface = {
+ .set_reg = r600_set_surface_reg,
+ .clear_reg = r600_clear_surface_reg,
+ },
.hpd = {
.init = &r600_hpd_init,
.fini = &r600_hpd_fini,
@@ -959,8 +980,10 @@ static struct radeon_asic rs780_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
+ .surface = {
+ .set_reg = r600_set_surface_reg,
+ .clear_reg = r600_clear_surface_reg,
+ },
.hpd = {
.init = &r600_hpd_init,
.fini = &r600_hpd_fini,
@@ -1030,8 +1053,10 @@ static struct radeon_asic rv770_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
+ .surface = {
+ .set_reg = r600_set_surface_reg,
+ .clear_reg = r600_clear_surface_reg,
+ },
.hpd = {
.init = &r600_hpd_init,
.fini = &r600_hpd_fini,
@@ -1101,8 +1126,10 @@ static struct radeon_asic evergreen_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
+ .surface = {
+ .set_reg = r600_set_surface_reg,
+ .clear_reg = r600_clear_surface_reg,
+ },
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
@@ -1172,8 +1199,10 @@ static struct radeon_asic sumo_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
+ .surface = {
+ .set_reg = r600_set_surface_reg,
+ .clear_reg = r600_clear_surface_reg,
+ },
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
@@ -1243,8 +1272,10 @@ static struct radeon_asic btc_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
+ .surface = {
+ .set_reg = r600_set_surface_reg,
+ .clear_reg = r600_clear_surface_reg,
+ },
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
@@ -1343,8 +1374,10 @@ static struct radeon_asic cayman_asic = {
.copy = &r600_copy_blit,
.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
},
- .set_surface_reg = r600_set_surface_reg,
- .clear_surface_reg = r600_clear_surface_reg,
+ .surface = {
+ .set_reg = r600_set_surface_reg,
+ .clear_reg = r600_clear_surface_reg,
+ },
.hpd = {
.init = &evergreen_hpd_init,
.fini = &evergreen_hpd_fini,
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 14/14] drm/radeon/kms: clean up radeon_asic struct
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (12 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 13/14] drm/radeon/kms: reorganize surface callbacks alexdeucher
@ 2012-02-23 22:53 ` alexdeucher
2012-02-23 23:10 ` [drm-next 14/14] drm/radeon/kms: clean up radeon_asic struct (v2) alexdeucher
2012-02-24 9:45 ` [drm-next 00/14] radeon_asic cleanups for drm-next Michel Dänzer
` (2 subsequent siblings)
16 siblings, 1 reply; 22+ messages in thread
From: alexdeucher @ 2012-02-23 22:53 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 38 ++++++-------
drivers/gpu/drm/radeon/radeon_asic.c | 100 +++++++++++++++++-----------------
2 files changed, 68 insertions(+), 70 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5077478..be3683f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1131,12 +1131,23 @@ struct radeon_asic {
void (*vga_set_state)(struct radeon_device *rdev, bool state);
bool (*gpu_is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp);
int (*asic_reset)(struct radeon_device *rdev);
-
+ /* ioctl hw specific callback. Some hw might want to perform special
+ * operation on specific ioctl. For instance on wait idle some hw
+ * might want to perform and HDP flush through MMIO as it seems that
+ * some R6XX/R7XX hw doesn't take HDP flush into account if programmed
+ * through ring.
+ */
+ void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
+ /* check if 3D engine is idle */
+ bool (*gui_idle)(struct radeon_device *rdev);
+ /* wait for mc_idle */
+ int (*mc_wait_for_idle)(struct radeon_device *rdev);
+ /* gart */
struct {
void (*tlb_flush)(struct radeon_device *rdev);
int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr);
} gart;
-
+ /* ring specific callbacks */
struct {
void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -1148,12 +1159,12 @@ struct radeon_asic {
int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp);
} ring[RADEON_NUM_RINGS];
-
+ /* irqs */
struct {
int (*set)(struct radeon_device *rdev);
int (*process)(struct radeon_device *rdev);
} irq;
-
+ /* displays */
struct {
/* display watermarks */
void (*bandwidth_update)(struct radeon_device *rdev);
@@ -1162,7 +1173,7 @@ struct radeon_asic {
/* wait for vblank */
void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
} display;
-
+ /* copy functions for bo handling */
struct {
int (*blit)(struct radeon_device *rdev,
uint64_t src_offset,
@@ -1185,30 +1196,20 @@ struct radeon_asic {
/* ring used for bo copies */
u32 copy_ring_index;
} copy;
-
+ /* surfaces */
struct {
int (*set_reg)(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
void (*clear_reg)(struct radeon_device *rdev, int reg);
} surface;
-
+ /* hotplug detect */
struct {
void (*init)(struct radeon_device *rdev);
void (*fini)(struct radeon_device *rdev);
bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
} hpd;
-
- /* ioctl hw specific callback. Some hw might want to perform special
- * operation on specific ioctl. For instance on wait idle some hw
- * might want to perform and HDP flush through MMIO as it seems that
- * some R6XX/R7XX hw doesn't take HDP flush into account if programmed
- * through ring.
- */
- void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
- /* check if 3D engine is idle */
- bool (*gui_idle)(struct radeon_device *rdev);
/* power management */
struct {
void (*misc)(struct radeon_device *rdev);
@@ -1230,9 +1231,6 @@ struct radeon_asic {
u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
void (*post_page_flip)(struct radeon_device *rdev, int crtc);
} pflip;
-
- /* wait for mc_idle */
- int (*mc_wait_for_idle)(struct radeon_device *rdev);
};
/*
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 0a59f48..a592ca5 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -136,6 +136,9 @@ static struct radeon_asic r100_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
@@ -178,8 +181,6 @@ static struct radeon_asic r100_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -199,7 +200,6 @@ static struct radeon_asic r100_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r200_asic = {
@@ -210,6 +210,9 @@ static struct radeon_asic r200_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
@@ -252,8 +255,6 @@ static struct radeon_asic r200_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -273,7 +274,6 @@ static struct radeon_asic r200_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r300_asic = {
@@ -284,6 +284,9 @@ static struct radeon_asic r300_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
@@ -326,8 +329,6 @@ static struct radeon_asic r300_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -347,7 +348,6 @@ static struct radeon_asic r300_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic r300_asic_pcie = {
@@ -358,6 +358,8 @@ static struct radeon_asic r300_asic_pcie = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -400,8 +402,6 @@ static struct radeon_asic r300_asic_pcie = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -432,6 +432,9 @@ static struct radeon_asic r420_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -474,8 +477,6 @@ static struct radeon_asic r420_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -495,7 +496,6 @@ static struct radeon_asic r420_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic rs400_asic = {
@@ -506,6 +506,9 @@ static struct radeon_asic rs400_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs400_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs400_gart_tlb_flush,
.set_page = &rs400_gart_set_page,
@@ -548,8 +551,6 @@ static struct radeon_asic rs400_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -569,7 +570,6 @@ static struct radeon_asic rs400_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &rs400_mc_wait_for_idle,
};
static struct radeon_asic rs600_asic = {
@@ -580,6 +580,9 @@ static struct radeon_asic rs600_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs600_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs600_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -622,8 +625,6 @@ static struct radeon_asic rs600_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -643,7 +644,6 @@ static struct radeon_asic rs600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rs600_mc_wait_for_idle,
};
static struct radeon_asic rs690_asic = {
@@ -654,6 +654,9 @@ static struct radeon_asic rs690_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs690_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs400_gart_tlb_flush,
.set_page = &rs400_gart_set_page,
@@ -696,8 +699,6 @@ static struct radeon_asic rs690_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -717,7 +718,6 @@ static struct radeon_asic rs690_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rs690_mc_wait_for_idle,
};
static struct radeon_asic rv515_asic = {
@@ -728,6 +728,9 @@ static struct radeon_asic rv515_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rv515_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -770,8 +773,6 @@ static struct radeon_asic rv515_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -791,7 +792,6 @@ static struct radeon_asic rv515_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rv515_mc_wait_for_idle,
};
static struct radeon_asic r520_asic = {
@@ -802,6 +802,9 @@ static struct radeon_asic r520_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r520_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -844,8 +847,6 @@ static struct radeon_asic r520_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -865,7 +866,6 @@ static struct radeon_asic r520_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r520_mc_wait_for_idle,
};
static struct radeon_asic r600_asic = {
@@ -876,6 +876,9 @@ static struct radeon_asic r600_asic = {
.vga_set_state = &r600_vga_set_state,
.gpu_is_lockup = &r600_gpu_is_lockup,
.asic_reset = &r600_asic_reset,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -917,8 +920,6 @@ static struct radeon_asic r600_asic = {
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &r600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -938,7 +939,6 @@ static struct radeon_asic r600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rs780_asic = {
@@ -949,6 +949,9 @@ static struct radeon_asic rs780_asic = {
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
.asic_reset = &r600_asic_reset,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -990,8 +993,6 @@ static struct radeon_asic rs780_asic = {
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &r600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -1011,7 +1012,6 @@ static struct radeon_asic rs780_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rv770_asic = {
@@ -1022,6 +1022,9 @@ static struct radeon_asic rv770_asic = {
.asic_reset = &r600_asic_reset,
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1063,8 +1066,6 @@ static struct radeon_asic rv770_asic = {
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &rv770_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -1084,7 +1085,6 @@ static struct radeon_asic rv770_asic = {
.page_flip = &rv770_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic evergreen_asic = {
@@ -1095,6 +1095,9 @@ static struct radeon_asic evergreen_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1136,8 +1139,6 @@ static struct radeon_asic evergreen_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1157,7 +1158,6 @@ static struct radeon_asic evergreen_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic sumo_asic = {
@@ -1168,6 +1168,9 @@ static struct radeon_asic sumo_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1209,8 +1212,6 @@ static struct radeon_asic sumo_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1230,7 +1231,6 @@ static struct radeon_asic sumo_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic btc_asic = {
@@ -1241,6 +1241,9 @@ static struct radeon_asic btc_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1282,8 +1285,6 @@ static struct radeon_asic btc_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1303,7 +1304,6 @@ static struct radeon_asic btc_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static const struct radeon_vm_funcs cayman_vm_funcs = {
@@ -1324,6 +1324,9 @@ static struct radeon_asic cayman_asic = {
.gpu_is_lockup = &cayman_gpu_is_lockup,
.asic_reset = &cayman_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &cayman_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1384,8 +1387,6 @@ static struct radeon_asic cayman_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1405,7 +1406,6 @@ static struct radeon_asic cayman_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
int radeon_asic_init(struct radeon_device *rdev)
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread* [drm-next 14/14] drm/radeon/kms: clean up radeon_asic struct (v2)
2012-02-23 22:53 ` [drm-next 14/14] drm/radeon/kms: clean up radeon_asic struct alexdeucher
@ 2012-02-23 23:10 ` alexdeucher
0 siblings, 0 replies; 22+ messages in thread
From: alexdeucher @ 2012-02-23 23:10 UTC (permalink / raw)
To: airlied, dri-devel; +Cc: Alex Deucher
From: Alex Deucher <alexander.deucher@amd.com>
v2: fix typo.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/radeon.h | 38 ++++++-------
drivers/gpu/drm/radeon/radeon_asic.c | 102 +++++++++++++++++-----------------
2 files changed, 69 insertions(+), 71 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5077478..be3683f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1131,12 +1131,23 @@ struct radeon_asic {
void (*vga_set_state)(struct radeon_device *rdev, bool state);
bool (*gpu_is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp);
int (*asic_reset)(struct radeon_device *rdev);
-
+ /* ioctl hw specific callback. Some hw might want to perform special
+ * operation on specific ioctl. For instance on wait idle some hw
+ * might want to perform and HDP flush through MMIO as it seems that
+ * some R6XX/R7XX hw doesn't take HDP flush into account if programmed
+ * through ring.
+ */
+ void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
+ /* check if 3D engine is idle */
+ bool (*gui_idle)(struct radeon_device *rdev);
+ /* wait for mc_idle */
+ int (*mc_wait_for_idle)(struct radeon_device *rdev);
+ /* gart */
struct {
void (*tlb_flush)(struct radeon_device *rdev);
int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr);
} gart;
-
+ /* ring specific callbacks */
struct {
void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -1148,12 +1159,12 @@ struct radeon_asic {
int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp);
} ring[RADEON_NUM_RINGS];
-
+ /* irqs */
struct {
int (*set)(struct radeon_device *rdev);
int (*process)(struct radeon_device *rdev);
} irq;
-
+ /* displays */
struct {
/* display watermarks */
void (*bandwidth_update)(struct radeon_device *rdev);
@@ -1162,7 +1173,7 @@ struct radeon_asic {
/* wait for vblank */
void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
} display;
-
+ /* copy functions for bo handling */
struct {
int (*blit)(struct radeon_device *rdev,
uint64_t src_offset,
@@ -1185,30 +1196,20 @@ struct radeon_asic {
/* ring used for bo copies */
u32 copy_ring_index;
} copy;
-
+ /* surfaces */
struct {
int (*set_reg)(struct radeon_device *rdev, int reg,
uint32_t tiling_flags, uint32_t pitch,
uint32_t offset, uint32_t obj_size);
void (*clear_reg)(struct radeon_device *rdev, int reg);
} surface;
-
+ /* hotplug detect */
struct {
void (*init)(struct radeon_device *rdev);
void (*fini)(struct radeon_device *rdev);
bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
} hpd;
-
- /* ioctl hw specific callback. Some hw might want to perform special
- * operation on specific ioctl. For instance on wait idle some hw
- * might want to perform and HDP flush through MMIO as it seems that
- * some R6XX/R7XX hw doesn't take HDP flush into account if programmed
- * through ring.
- */
- void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
- /* check if 3D engine is idle */
- bool (*gui_idle)(struct radeon_device *rdev);
/* power management */
struct {
void (*misc)(struct radeon_device *rdev);
@@ -1230,9 +1231,6 @@ struct radeon_asic {
u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
void (*post_page_flip)(struct radeon_device *rdev, int crtc);
} pflip;
-
- /* wait for mc_idle */
- int (*mc_wait_for_idle)(struct radeon_device *rdev);
};
/*
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 0a59f48..479c89e 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -136,6 +136,9 @@ static struct radeon_asic r100_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
@@ -178,8 +181,6 @@ static struct radeon_asic r100_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -199,7 +200,6 @@ static struct radeon_asic r100_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r200_asic = {
@@ -210,6 +210,9 @@ static struct radeon_asic r200_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
@@ -252,8 +255,6 @@ static struct radeon_asic r200_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -273,7 +274,6 @@ static struct radeon_asic r200_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r300_asic = {
@@ -284,6 +284,9 @@ static struct radeon_asic r300_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
@@ -326,8 +329,6 @@ static struct radeon_asic r300_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -347,7 +348,6 @@ static struct radeon_asic r300_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic r300_asic_pcie = {
@@ -358,6 +358,9 @@ static struct radeon_asic r300_asic_pcie = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -400,8 +403,6 @@ static struct radeon_asic r300_asic_pcie = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -421,7 +422,6 @@ static struct radeon_asic r300_asic_pcie = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic r420_asic = {
@@ -432,6 +432,9 @@ static struct radeon_asic r420_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -474,8 +477,6 @@ static struct radeon_asic r420_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -495,7 +496,6 @@ static struct radeon_asic r420_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic rs400_asic = {
@@ -506,6 +506,9 @@ static struct radeon_asic rs400_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs400_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs400_gart_tlb_flush,
.set_page = &rs400_gart_set_page,
@@ -548,8 +551,6 @@ static struct radeon_asic rs400_asic = {
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
@@ -569,7 +570,6 @@ static struct radeon_asic rs400_asic = {
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &rs400_mc_wait_for_idle,
};
static struct radeon_asic rs600_asic = {
@@ -580,6 +580,9 @@ static struct radeon_asic rs600_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs600_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs600_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -622,8 +625,6 @@ static struct radeon_asic rs600_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -643,7 +644,6 @@ static struct radeon_asic rs600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rs600_mc_wait_for_idle,
};
static struct radeon_asic rs690_asic = {
@@ -654,6 +654,9 @@ static struct radeon_asic rs690_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs690_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs400_gart_tlb_flush,
.set_page = &rs400_gart_set_page,
@@ -696,8 +699,6 @@ static struct radeon_asic rs690_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -717,7 +718,6 @@ static struct radeon_asic rs690_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rs690_mc_wait_for_idle,
};
static struct radeon_asic rv515_asic = {
@@ -728,6 +728,9 @@ static struct radeon_asic rv515_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rv515_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -770,8 +773,6 @@ static struct radeon_asic rv515_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -791,7 +792,6 @@ static struct radeon_asic rv515_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rv515_mc_wait_for_idle,
};
static struct radeon_asic r520_asic = {
@@ -802,6 +802,9 @@ static struct radeon_asic r520_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r520_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
@@ -844,8 +847,6 @@ static struct radeon_asic r520_asic = {
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -865,7 +866,6 @@ static struct radeon_asic r520_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r520_mc_wait_for_idle,
};
static struct radeon_asic r600_asic = {
@@ -876,6 +876,9 @@ static struct radeon_asic r600_asic = {
.vga_set_state = &r600_vga_set_state,
.gpu_is_lockup = &r600_gpu_is_lockup,
.asic_reset = &r600_asic_reset,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -917,8 +920,6 @@ static struct radeon_asic r600_asic = {
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &r600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -938,7 +939,6 @@ static struct radeon_asic r600_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rs780_asic = {
@@ -949,6 +949,9 @@ static struct radeon_asic rs780_asic = {
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
.asic_reset = &r600_asic_reset,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -990,8 +993,6 @@ static struct radeon_asic rs780_asic = {
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &r600_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -1011,7 +1012,6 @@ static struct radeon_asic rs780_asic = {
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rv770_asic = {
@@ -1022,6 +1022,9 @@ static struct radeon_asic rv770_asic = {
.asic_reset = &r600_asic_reset,
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1063,8 +1066,6 @@ static struct radeon_asic rv770_asic = {
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &rv770_pm_misc,
.prepare = &rs600_pm_prepare,
@@ -1084,7 +1085,6 @@ static struct radeon_asic rv770_asic = {
.page_flip = &rv770_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic evergreen_asic = {
@@ -1095,6 +1095,9 @@ static struct radeon_asic evergreen_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1136,8 +1139,6 @@ static struct radeon_asic evergreen_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1157,7 +1158,6 @@ static struct radeon_asic evergreen_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic sumo_asic = {
@@ -1168,6 +1168,9 @@ static struct radeon_asic sumo_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1209,8 +1212,6 @@ static struct radeon_asic sumo_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1230,7 +1231,6 @@ static struct radeon_asic sumo_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic btc_asic = {
@@ -1241,6 +1241,9 @@ static struct radeon_asic btc_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1282,8 +1285,6 @@ static struct radeon_asic btc_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1303,7 +1304,6 @@ static struct radeon_asic btc_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static const struct radeon_vm_funcs cayman_vm_funcs = {
@@ -1324,6 +1324,9 @@ static struct radeon_asic cayman_asic = {
.gpu_is_lockup = &cayman_gpu_is_lockup,
.asic_reset = &cayman_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &cayman_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
@@ -1384,8 +1387,6 @@ static struct radeon_asic cayman_asic = {
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
@@ -1405,7 +1406,6 @@ static struct radeon_asic cayman_asic = {
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
int radeon_asic_init(struct radeon_device *rdev)
--
1.7.7.5
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [drm-next 00/14] radeon_asic cleanups for drm-next
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (13 preceding siblings ...)
2012-02-23 22:53 ` [drm-next 14/14] drm/radeon/kms: clean up radeon_asic struct alexdeucher
@ 2012-02-24 9:45 ` Michel Dänzer
2012-02-24 10:15 ` Christian König
2012-02-24 17:03 ` Jerome Glisse
16 siblings, 0 replies; 22+ messages in thread
From: Michel Dänzer @ 2012-02-24 9:45 UTC (permalink / raw)
To: alexdeucher; +Cc: dri-devel
On Don, 2012-02-23 at 17:53 -0500, alexdeucher@gmail.com wrote:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch set cleans up radeon_asic and organizes the asic
> specific callbacks based on their function. Not change in
> functionality. It requires Christian's patch:
> "drm/radeon: also make the cs_parse function per ring"
>
> Alex Deucher (14):
> drm/radeon/kms: add wait_for_vblank asic callback
> drm/radeon/kms: add a radeon asic callback for mc idle
> drm/radeon/kms: reorganize hpd callbacks
> drm/radeon/kms: reorganize page flip callbacks
> drm/radeon/kms: reorganize pm callbacks
> drm/radeon/kms: reorganize copy callbacks
> drm/radeon/kms: reorganize irq callbacks
> drm/radeon/kms: remove unused cp callbacks from radeon_asic
> drm/radeon/kms: make ring_start, ring_test, and ib_test per ring
> drm/radeon/kms: reorganize gart callbacks
> drm/radeon/kms: reorganize display callbacks
> drm/radeon/kms: move clock/pcie setting callbacks into pm struct
> drm/radeon/kms: reorganize surface callbacks
> drm/radeon/kms: clean up radeon_asic struct
Patches 2-14 are
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Debian, X and DRI developer
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [drm-next 00/14] radeon_asic cleanups for drm-next
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (14 preceding siblings ...)
2012-02-24 9:45 ` [drm-next 00/14] radeon_asic cleanups for drm-next Michel Dänzer
@ 2012-02-24 10:15 ` Christian König
2012-02-24 17:03 ` Jerome Glisse
16 siblings, 0 replies; 22+ messages in thread
From: Christian König @ 2012-02-24 10:15 UTC (permalink / raw)
To: alexdeucher; +Cc: Alex Deucher, dri-devel
On 23.02.2012 23:53, alexdeucher@gmail.com wrote:
> From: Alex Deucher<alexander.deucher@amd.com>
>
> This patch set cleans up radeon_asic and organizes the asic
> specific callbacks based on their function. Not change in
> functionality. It requires Christian's patch:
> "drm/radeon: also make the cs_parse function per ring"
>
> Alex Deucher (14):
> drm/radeon/kms: add wait_for_vblank asic callback
> drm/radeon/kms: add a radeon asic callback for mc idle
> drm/radeon/kms: reorganize hpd callbacks
> drm/radeon/kms: reorganize page flip callbacks
> drm/radeon/kms: reorganize pm callbacks
> drm/radeon/kms: reorganize copy callbacks
> drm/radeon/kms: reorganize irq callbacks
> drm/radeon/kms: remove unused cp callbacks from radeon_asic
> drm/radeon/kms: make ring_start, ring_test, and ib_test per ring
> drm/radeon/kms: reorganize gart callbacks
> drm/radeon/kms: reorganize display callbacks
> drm/radeon/kms: move clock/pcie setting callbacks into pm struct
> drm/radeon/kms: reorganize surface callbacks
> drm/radeon/kms: clean up radeon_asic struct
Well, that was long needed, so for the whole series:
Reviewed-by: Christian König<christian.koenig@amd.com>
>
> drivers/gpu/drm/radeon/evergreen.c | 25 +-
> drivers/gpu/drm/radeon/evergreen_reg.h | 1 +
> drivers/gpu/drm/radeon/ni.c | 6 +-
> drivers/gpu/drm/radeon/r100.c | 51 +-
> drivers/gpu/drm/radeon/r300.c | 9 +-
> drivers/gpu/drm/radeon/r420.c | 2 +-
> drivers/gpu/drm/radeon/r500_reg.h | 2 +
> drivers/gpu/drm/radeon/r520.c | 4 +-
> drivers/gpu/drm/radeon/r600.c | 11 +-
> drivers/gpu/drm/radeon/radeon.h | 222 +++--
> drivers/gpu/drm/radeon/radeon_asic.c | 1541 ++++++++++++++++++-----------
> drivers/gpu/drm/radeon/radeon_asic.h | 24 +-
> drivers/gpu/drm/radeon/radeon_benchmark.c | 12 +-
> drivers/gpu/drm/radeon/radeon_clocks.c | 2 +-
> drivers/gpu/drm/radeon/radeon_pm.c | 6 +-
> drivers/gpu/drm/radeon/radeon_reg.h | 2 +
> drivers/gpu/drm/radeon/radeon_ttm.c | 15 +-
> drivers/gpu/drm/radeon/rs400.c | 2 +-
> drivers/gpu/drm/radeon/rs600.c | 23 +-
> drivers/gpu/drm/radeon/rs690.c | 4 +-
> drivers/gpu/drm/radeon/rv515.c | 5 +-
> drivers/gpu/drm/radeon/rv770.c | 4 +-
> 22 files changed, 1236 insertions(+), 737 deletions(-)
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [drm-next 00/14] radeon_asic cleanups for drm-next
2012-02-23 22:53 [drm-next 00/14] radeon_asic cleanups for drm-next alexdeucher
` (15 preceding siblings ...)
2012-02-24 10:15 ` Christian König
@ 2012-02-24 17:03 ` Jerome Glisse
16 siblings, 0 replies; 22+ messages in thread
From: Jerome Glisse @ 2012-02-24 17:03 UTC (permalink / raw)
To: alexdeucher; +Cc: Alex Deucher, dri-devel
On Thu, 2012-02-23 at 17:53 -0500, alexdeucher@gmail.com wrote:
> From: Alex Deucher <alexander.deucher@amd.com>
>
> This patch set cleans up radeon_asic and organizes the asic
> specific callbacks based on their function. Not change in
> functionality. It requires Christian's patch:
> "drm/radeon: also make the cs_parse function per ring"
>
> Alex Deucher (14):
> drm/radeon/kms: add wait_for_vblank asic callback
> drm/radeon/kms: add a radeon asic callback for mc idle
> drm/radeon/kms: reorganize hpd callbacks
> drm/radeon/kms: reorganize page flip callbacks
> drm/radeon/kms: reorganize pm callbacks
> drm/radeon/kms: reorganize copy callbacks
> drm/radeon/kms: reorganize irq callbacks
> drm/radeon/kms: remove unused cp callbacks from radeon_asic
> drm/radeon/kms: make ring_start, ring_test, and ib_test per ring
> drm/radeon/kms: reorganize gart callbacks
> drm/radeon/kms: reorganize display callbacks
> drm/radeon/kms: move clock/pcie setting callbacks into pm struct
> drm/radeon/kms: reorganize surface callbacks
> drm/radeon/kms: clean up radeon_asic struct
>
> drivers/gpu/drm/radeon/evergreen.c | 25 +-
> drivers/gpu/drm/radeon/evergreen_reg.h | 1 +
> drivers/gpu/drm/radeon/ni.c | 6 +-
> drivers/gpu/drm/radeon/r100.c | 51 +-
> drivers/gpu/drm/radeon/r300.c | 9 +-
> drivers/gpu/drm/radeon/r420.c | 2 +-
> drivers/gpu/drm/radeon/r500_reg.h | 2 +
> drivers/gpu/drm/radeon/r520.c | 4 +-
> drivers/gpu/drm/radeon/r600.c | 11 +-
> drivers/gpu/drm/radeon/radeon.h | 222 +++--
> drivers/gpu/drm/radeon/radeon_asic.c | 1541 ++++++++++++++++++-----------
> drivers/gpu/drm/radeon/radeon_asic.h | 24 +-
> drivers/gpu/drm/radeon/radeon_benchmark.c | 12 +-
> drivers/gpu/drm/radeon/radeon_clocks.c | 2 +-
> drivers/gpu/drm/radeon/radeon_pm.c | 6 +-
> drivers/gpu/drm/radeon/radeon_reg.h | 2 +
> drivers/gpu/drm/radeon/radeon_ttm.c | 15 +-
> drivers/gpu/drm/radeon/rs400.c | 2 +-
> drivers/gpu/drm/radeon/rs600.c | 23 +-
> drivers/gpu/drm/radeon/rs690.c | 4 +-
> drivers/gpu/drm/radeon/rv515.c | 5 +-
> drivers/gpu/drm/radeon/rv770.c | 4 +-
> 22 files changed, 1236 insertions(+), 737 deletions(-)
>
All patch:
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Cheers,
Jerome
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