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From: stigge@antcom.de (Roland Stigge)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4] lpc32xx: Added ethernet driver: smp_wmb()
Date: Tue, 06 Mar 2012 11:43:57 +0100	[thread overview]
Message-ID: <4F55EA6D.3070602@antcom.de> (raw)
In-Reply-To: <1330987524.2538.61.camel@bwh-desktop>

On 03/05/2012 11:45 PM, Ben Hutchings wrote:
>> +	/* Clear and enable interrupts */
>> +	writel(0xFFFF, LPC_ENET_INTCLEAR(pldat->net_base));
>> +	lpc_eth_enable_int(pldat->net_base);
>> +
>> +	/* Get the next TX buffer output index */
>> +	pldat->num_used_tx_buffs = 0;
>> +	pldat->last_tx_idx =
>> +		readl(LPC_ENET_TXCONSUMEINDEX(pldat->net_base));
> 
> Doesn't this need to be done *before* enabling interrupts?  Also, I
> think you need an smp_wmb() so that the interrupt handler is guaranteed
> to see all these writes.

Do you mean _one_ smp_wmb() directly after lpc_eth_enable_int() (which
I'm moving behind the above code?

Note that there is no SMP in LPCs and NXP is not planning to build one
AFAIK. However, I'm fine with including smp_wmb() anyway for completeness.

Thanks in advance,

Roland

WARNING: multiple messages have this Message-ID (diff)
From: Roland Stigge <stigge@antcom.de>
To: Ben Hutchings <bhutchings@solarflare.com>
Cc: davem@davemloft.net, jeffrey.t.kirsher@intel.com,
	alexander.h.duyck@intel.com, eilong@broadcom.com,
	ian.campbell@citrix.com, netdev@vger.kernel.org,
	w.sang@pengutronix.de, linux-kernel@vger.kernel.org,
	kevin.wells@nxp.com, linux-arm-kernel@lists.infradead.org,
	arnd@arndb.de, baruch@tkos.co.il, joe@perches.com
Subject: Re: [PATCH v4] lpc32xx: Added ethernet driver: smp_wmb()
Date: Tue, 06 Mar 2012 11:43:57 +0100	[thread overview]
Message-ID: <4F55EA6D.3070602@antcom.de> (raw)
In-Reply-To: <1330987524.2538.61.camel@bwh-desktop>

On 03/05/2012 11:45 PM, Ben Hutchings wrote:
>> +	/* Clear and enable interrupts */
>> +	writel(0xFFFF, LPC_ENET_INTCLEAR(pldat->net_base));
>> +	lpc_eth_enable_int(pldat->net_base);
>> +
>> +	/* Get the next TX buffer output index */
>> +	pldat->num_used_tx_buffs = 0;
>> +	pldat->last_tx_idx =
>> +		readl(LPC_ENET_TXCONSUMEINDEX(pldat->net_base));
> 
> Doesn't this need to be done *before* enabling interrupts?  Also, I
> think you need an smp_wmb() so that the interrupt handler is guaranteed
> to see all these writes.

Do you mean _one_ smp_wmb() directly after lpc_eth_enable_int() (which
I'm moving behind the above code?

Note that there is no SMP in LPCs and NXP is not planning to build one
AFAIK. However, I'm fine with including smp_wmb() anyway for completeness.

Thanks in advance,

Roland

  parent reply	other threads:[~2012-03-06 10:43 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-05 21:40 [PATCH v4] lpc32xx: Added ethernet driver Roland Stigge
2012-03-05 21:40 ` Roland Stigge
2012-03-05 22:45 ` Ben Hutchings
2012-03-05 22:45   ` Ben Hutchings
2012-03-06  0:49   ` Eric Dumazet
2012-03-06  0:49     ` Eric Dumazet
2012-03-06  1:26     ` Ben Hutchings
2012-03-06  1:26       ` Ben Hutchings
2012-03-06  8:53   ` Roland Stigge
2012-03-06  8:53     ` Roland Stigge
2012-03-06 12:13     ` Eric Dumazet
2012-03-06 12:13       ` Eric Dumazet
2012-03-06 10:43   ` Roland Stigge [this message]
2012-03-06 10:43     ` [PATCH v4] lpc32xx: Added ethernet driver: smp_wmb() Roland Stigge
2012-03-06 14:03     ` Ben Hutchings
2012-03-06 14:03       ` Ben Hutchings
2012-03-06 14:17       ` Russell King - ARM Linux
2012-03-06 14:17         ` Russell King - ARM Linux
2012-03-06 15:37         ` Ben Hutchings
2012-03-06 15:37           ` Ben Hutchings

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