From: Jeremy Fitzhardinge <jeremy@goop.org>
To: the arch/x86 maintainers <x86@kernel.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Thomas Reitmayr <treitmayr@devbase.at>,
leigh123linux@googlemail.com, Dave Jones <davej@redhat.com>
Subject: [PATCH] Use correct byte-sized register constraint in __xchg_op()
Date: Mon, 02 Apr 2012 16:15:33 -0700 [thread overview]
Message-ID: <4F7A3315.501@goop.org> (raw)
x86-64 can access the low half of any register, but i386 can only do
it with a subset of registers. 'r' causes compilation failures on i386,
but 'q' expresses the constraint properly.
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Reported-by: Leigh Scott <leigh123linux@googlemail.com>
Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index b3b7332..bc18d0e 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
switch (sizeof(*(ptr))) { \
case __X86_CASE_B: \
asm volatile (lock #op "b %b0, %1\n" \
- : "+r" (__ret), "+m" (*(ptr)) \
+ : "+q" (__ret), "+m" (*(ptr)) \
: : "memory", "cc"); \
break; \
case __X86_CASE_W: \
next reply other threads:[~2012-04-02 23:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-02 23:15 Jeremy Fitzhardinge [this message]
2012-04-04 0:37 ` [PATCH] Use correct byte-sized register constraint in __xchg_op() Josh Boyer
2012-04-05 20:27 ` Josh Boyer
2012-04-05 21:16 ` Thomas Reitmayr
2012-04-06 7:46 ` Jeremy Fitzhardinge
2012-04-06 16:52 ` [tip:x86/urgent] x86: " tip-bot for Jeremy Fitzhardinge
2012-04-06 16:53 ` [tip:x86/urgent] x86: Use correct byte-sized register constraint in __add() tip-bot for H. Peter Anvin
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