From: Leonid Yegoshin <yegoshin@mips.com>
To: Kevin Cernekee <cernekee@gmail.com>
Cc: "Steven J. Hill" <sjhill@mips.com>, <linux-mips@linux-mips.org>,
<ralf@linux-mips.org>
Subject: Re: [PATCH] Revert "MIPS: cache: Provide cache flush operations for XFS"
Date: Tue, 10 Apr 2012 11:03:35 -0700 [thread overview]
Message-ID: <4F8475F7.9060809@mips.com> (raw)
In-Reply-To: <CAJiQ=7AjtSB8KQ9+edUOvW+70nAWzh6c8B26ehnEpuud6QeMJA@mail.gmail.com>
On 04/09/2012 07:44 PM, Kevin Cernekee wrote:
> On Mon,Is there a reason why Ralf's original approach was not workable?
It doesn't work with HIGHMEM + cache aliasing. It also uses cache flush
(blast_dcache) to buffer instead of cache invalidate after read I/O is
completed.
> I suspect that reimplementing the *_kernel_vmap_range functions using
> _dma_cache_* would result in a double L2 flush on the same memory
> regions on systems with cache aliases, and an unnecessary L1+L2 flush
> on systems without aliases.
Good point. I put that to set it working. Now, after your comment, I
think it has sense to try with L1 only.
- Leonid.
WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <yegoshin@mips.com>
To: Kevin Cernekee <cernekee@gmail.com>
Cc: "Steven J. Hill" <sjhill@mips.com>,
linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: [PATCH] Revert "MIPS: cache: Provide cache flush operations for XFS"
Date: Tue, 10 Apr 2012 11:03:35 -0700 [thread overview]
Message-ID: <4F8475F7.9060809@mips.com> (raw)
Message-ID: <20120410180335.rIlSdI460FSKcZPTXfzEOPXQNFeto0W3r2tHIw3SSuE@z> (raw)
In-Reply-To: <CAJiQ=7AjtSB8KQ9+edUOvW+70nAWzh6c8B26ehnEpuud6QeMJA@mail.gmail.com>
On 04/09/2012 07:44 PM, Kevin Cernekee wrote:
> On Mon,Is there a reason why Ralf's original approach was not workable?
It doesn't work with HIGHMEM + cache aliasing. It also uses cache flush
(blast_dcache) to buffer instead of cache invalidate after read I/O is
completed.
> I suspect that reimplementing the *_kernel_vmap_range functions using
> _dma_cache_* would result in a double L2 flush on the same memory
> regions on systems with cache aliases, and an unnecessary L1+L2 flush
> on systems without aliases.
Good point. I put that to set it working. Now, after your comment, I
think it has sense to try with L1 only.
- Leonid.
next prev parent reply other threads:[~2012-04-10 18:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-09 16:13 [PATCH] Revert "MIPS: cache: Provide cache flush operations for XFS" Steven J. Hill
2012-04-10 2:44 ` Kevin Cernekee
2012-04-10 18:03 ` Leonid Yegoshin [this message]
2012-04-10 18:03 ` Leonid Yegoshin
2012-05-07 19:21 ` Hill, Steven
2012-05-07 19:28 ` Leonid Yegoshin
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