From: "Yan, Zheng" <zheng.z.yan@intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
"Yan, Zheng" <zheng.z.yan@linux.intel.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] perf: Fix intel shared extra msr allocation
Date: Thu, 07 Jun 2012 09:25:35 +0800 [thread overview]
Message-ID: <4FD0030F.4040205@intel.com> (raw)
In-Reply-To: <CABPqkBRe_+AAFTtuQuA-WKoFx1x3CkSbFBx+yikZqgaYSAG9kw@mail.gmail.com>
On 06/06/2012 06:12 PM, Stephane Eranian wrote:
> There is something wrong with this patch, I instrumented the code
> and I can see:
> [ 1377.324575] 1. idx=1 reg_idx=1 ref=-1 config=0xff01 era->config=0xff01
> ^^^^^^
> The test case on WSM (RSP0, RSP1):
>
> $ perf stat -a -C13 -e
> offcore_response_1:dmnd_data_rd,offcore_response_1:dmnd_data_rd sleep
> 100 &
> $ perf stat -a -C1 -e offcore_response_1:dmnd_rfo sleep 1
>
> I think this happens during scheduling of the events, i.e., during the
> run and not on initial
> programming. That could happen with cgroups, for instance.
>
Maybe we need adjust shared MSRs' reference counts in intel_fixup_er() ?
next prev parent reply other threads:[~2012-06-07 1:25 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-01 3:20 [PATCH] perf: Fix intel shared extra msr allocation Yan, Zheng
2012-06-01 9:35 ` Stephane Eranian
2012-06-01 14:11 ` Yan, Zheng
2012-06-04 13:12 ` Stephane Eranian
2012-06-05 2:18 ` Yan, Zheng
2012-06-05 10:14 ` Peter Zijlstra
2012-06-05 10:21 ` Stephane Eranian
2012-06-05 10:27 ` Peter Zijlstra
2012-06-05 10:38 ` Stephane Eranian
2012-06-05 12:07 ` Peter Zijlstra
2012-06-05 12:39 ` Peter Zijlstra
2012-06-05 12:51 ` Stephane Eranian
2012-06-05 13:04 ` Peter Zijlstra
2012-06-05 13:30 ` [PATCH] perf, x86: Fix Intel shared extra MSR allocation Peter Zijlstra
2012-06-05 13:56 ` Peter Zijlstra
2012-06-05 21:26 ` Stephane Eranian
2012-06-06 1:00 ` Yan, Zheng
2012-06-06 15:57 ` [tip:perf/core] perf/x86: " tip-bot for Peter Zijlstra
2012-06-06 16:11 ` tip-bot for Peter Zijlstra
2012-06-05 13:31 ` [PATCH] perf: Fix intel shared extra msr allocation Stephane Eranian
2012-06-05 13:32 ` Peter Zijlstra
2012-06-05 13:38 ` Stephane Eranian
2012-06-05 13:47 ` Peter Zijlstra
2012-06-05 13:51 ` Stephane Eranian
2012-06-06 10:12 ` Stephane Eranian
2012-06-07 1:25 ` Yan, Zheng [this message]
2012-06-07 4:01 ` Yan, Zheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4FD0030F.4040205@intel.com \
--to=zheng.z.yan@intel.com \
--cc=eranian@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=peterz@infradead.org \
--cc=zheng.z.yan@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.