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From: Wei Wang <wei.wang2@amd.com>
To: Jan Beulich <JBeulich@suse.com>, Keir Fraser <keir@xen.org>,
	"xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: [PATCH] amd iommu: re-enable iommu msi if dom0 disabled it
Date: Fri, 8 Jun 2012 15:28:02 +0200	[thread overview]
Message-ID: <4FD1FDE2.5010907@amd.com> (raw)

[-- Attachment #1: Type: text/plain, Size: 422 bytes --]

Hi Jan,
I found that recent dom0 (e.g 3.4 pv_ops) disables iommu msi capability 
for some reasons and iommu cannot generate any interrupts in this case.
Attached patch re-enables it in device assignment.

Thanks,
Wei

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[-- Attachment #2: iommu-msi.patch --]
[-- Type: text/x-patch, Size: 1785 bytes --]

# HG changeset patch
# Parent f6bfaf9daa508c31b2bca0e461202db2759426fc
# User Wei Wang <wei.wang2@amd.com>
Re-enable iommu msi capability block if it is disabled by dom0

Signed-off-by: Wei Wang <wei.wang2@amd.com>

diff -r f6bfaf9daa50 xen/drivers/passthrough/amd/pci_amd_iommu.c
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c	Wed Jun 06 16:37:05 2012 +0100
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c	Fri Jun 08 15:13:11 2012 +0200
@@ -81,6 +81,30 @@ static void disable_translation(u32 *dte
     dte[0] = entry;
 }
 
+static void iommu_msi_check_enable(struct amd_iommu *iommu)
+{
+    unsigned long flags;
+    uint16_t control;
+    uint8_t bus = PCI_BUS(iommu->bdf);
+    uint8_t dev = PCI_SLOT(iommu->bdf);
+    uint8_t func = PCI_FUNC(iommu->bdf);
+
+    ASSERT( iommu->msi_cap );
+    
+    spin_lock_irqsave(&iommu->lock, flags);
+
+    control = pci_conf_read16(iommu->seg, bus, dev, func,
+                              iommu->msi_cap + PCI_MSI_FLAGS);
+    if ( !(control & IOMMU_CONTROL_ENABLED) )
+    {    
+        control |= IOMMU_CONTROL_ENABLED;
+        pci_conf_write16(iommu->seg, bus, dev, func,
+                         iommu->msi_cap + PCI_MSI_FLAGS, control);
+    }
+
+    spin_unlock_irqrestore(&iommu->lock, flags);
+}
+
 static void amd_iommu_setup_domain_device(
     struct domain *domain, struct amd_iommu *iommu, int bdf)
 {
@@ -101,6 +125,12 @@ static void amd_iommu_setup_domain_devic
     if ( ats_enabled )
         dte_i = 1;
 
+    /* 
+     * In some cases, dom0 disables iommu msi capability, 
+     * re-enable it here.
+     */
+    iommu_msi_check_enable(iommu); 
+
     /* get device-table entry */
     req_id = get_dma_requestor_id(iommu->seg, bdf);
     dte = iommu->dev_table.buffer + (req_id * IOMMU_DEV_TABLE_ENTRY_SIZE);

[-- Attachment #3: Type: text/plain, Size: 126 bytes --]

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             reply	other threads:[~2012-06-08 13:28 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-08 13:28 Wei Wang [this message]
2012-06-08 13:31 ` [PATCH] amd iommu: re-enable iommu msi if dom0 disabled it Andrew Cooper
2012-06-08 13:41   ` Wei Wang
2012-06-08 14:08     ` Jan Beulich
2012-06-08 14:16       ` Wei Wang
2012-06-08 13:47 ` Jan Beulich

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