[PATCH 1/2] omap4: control: Add the CONTROL_SMART2IO_PADCONF_2 register definition

[PATCH 1/2] omap4: control: Add the CONTROL_SMART2IO_PADCONF_2 register definition

[Ruslan Bilovol]

This patch adds missing CONTROL_SMART2IO_PADCONF_2 register
definition

Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>
---
 .../include/mach/ctrl_module_pad_core_44xx.h       |   45 ++++++++++++++++++++
 1 files changed, 45 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
index c88420d..d512ade 100644
--- a/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
+++ b/arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
@@ -46,6 +46,7 @@
 #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_2	0x05c0
 #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC		0x05c4
 #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SLIMBUS		0x05c8
+#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2	0x05cc
 #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE		0x0600
 #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0		0x0604
 #define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_CAMERA_RX		0x0608
@@ -764,6 +765,50 @@
 #define OMAP4_HSI_DR0_LB_SHIFT					10
 #define OMAP4_HSI_DR0_LB_MASK					(1 << 10)
 
+/* CONTROL_SMART2IO_PADCONF_2 */
+#define OMAP4_DPM_DR1_DS_SHIFT					31
+#define OMAP4_DPM_DR1_DS_MASK					(1 << 31)
+#define OMAP4_DPM_DR2_DS_SHIFT					30
+#define OMAP4_DPM_DR2_DS_MASK					(1 << 30)
+#define OMAP4_DPM_DR3_DS_SHIFT					29
+#define OMAP4_DPM_DR3_DS_MASK					(1 << 29)
+#define OMAP4_GPIO_DR10_DS_SHIFT				28
+#define OMAP4_GPIO_DR10_DS_MASK					(1 << 28)
+#define OMAP4_HSI2_DR0_DS_SHIFT					27
+#define OMAP4_HSI2_DR0_DS_MASK					(1 << 27)
+#define OMAP4_HSI2_DR1_DS_SHIFT					26
+#define OMAP4_HSI2_DR1_DS_MASK					(1 << 26)
+#define OMAP4_HSI2_DR2_DS_SHIFT					25
+#define OMAP4_HSI2_DR2_DS_MASK					(1 << 25)
+#define OMAP4_SDMMC3_DR0_DS_SHIFT				24
+#define OMAP4_SDMMC3_DR0_DS_MASK				(1 << 24)
+#define OMAP4_SDMMC4_DR0_DS_SHIFT				23
+#define OMAP4_SDMMC4_DR0_DS_MASK				(1 << 23)
+#define OMAP4_SDMMC4_DR1_DS_SHIFT				22
+#define OMAP4_SDMMC4_DR1_DS_MASK				(1 << 22)
+#define OMAP4_SPI3_DR0_DS_SHIFT					21
+#define OMAP4_SPI3_DR0_DS_MASK					(1 << 21)
+#define OMAP4_SPI3_DR1_DS_SHIFT					20
+#define OMAP4_SPI3_DR1_DS_MASK					(1 << 20)
+#define OMAP4_UART3_DR2_DS_SHIFT				19
+#define OMAP4_UART3_DR2_DS_MASK					(1 << 19)
+#define OMAP4_UART3_DR3_DS_SHIFT				18
+#define OMAP4_UART3_DR3_DS_MASK					(1 << 18)
+#define OMAP4_UART3_DR4_DS_SHIFT				17
+#define OMAP4_UART3_DR4_DS_MASK					(1 << 17)
+#define OMAP4_UART3_DR5_DS_SHIFT				16
+#define OMAP4_UART3_DR5_DS_MASK					(1 << 16)
+#define OMAP4_USBA0_DR0_DS_SHIFT				15
+#define OMAP4_USBA0_DR0_DS_MASK					(1 << 15)
+#define OMAP4_USBA0_DR1_DS_SHIFT				14
+#define OMAP4_USBA0_DR1_DS_MASK					(1 << 14)
+#define OMAP4_USBA_DR2_DS_SHIFT					13
+#define OMAP4_USBA_DR2_DS_MASK					(1 << 13)
+#define OMAP4_USBB2_DR0_DS_SHIFT				12
+#define OMAP4_USBB2_DR0_DS_MASK					(1 << 12)
+#define OMAP4_USBB1_DR0_DS_SHIFT				11
+#define OMAP4_USBB1_DR0_DS_MASK					(1 << 11)
+
 /* CONTROL_USBB_HSIC */
 #define OMAP4_USBB2_DR1_SR_SHIFT				30
 #define OMAP4_USBB2_DR1_SR_MASK					(0x3 << 30)
-- 
1.7.1

[PATCH 2/2] OMAP4430: USB Host: Implement workaround for Errata i687

[Ruslan Bilovol]

The OMAP4 EHCI controller has the following defect (errata ID i687):

Title:
	USB TLL Hold Timing Violation

Description:
	There is a timing hold violation on an internal logic on
	the clock USB TLL path resulting in a systematic connection
	failure on the TLL link

WORKAROUND:
	As part of workaround, next should be done:
	Set the I/O drive strength to 1.
	Depending which USB host subsystem is used,
	• Port B1 used: Set CONTROL.CONTROL_SMART2IO_PADCONF_2[11] USBB1_DR0_DS = 0x1
	• Port B2 used: Set CONTROL.CONTROL_SMART2IO_PADCONF_2[12] USBB2_DR0_DS = 0x1

All OMAP4430 devices are impacted.

Signed-off-by: Ruslan Bilovol <ruslan.bilovol-l0cyMroinI0@public.gmane.org>
---
 arch/arm/mach-omap2/usb-host.c |   17 +++++++++++++++++
 1 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index dde8a11..3a6f2a2 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -30,6 +30,7 @@
 #include <plat/usb.h>
 #include <plat/omap_device.h>
 
+#include "control.h"
 #include "mux.h"
 
 #ifdef CONFIG_MFD_OMAP_USB_HOST
@@ -252,6 +253,14 @@ void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 			OMAP_PIN_INPUT_PULLDOWN);
 		omap_mux_init_signal("usbb1_ulpitll_dat7",
 			OMAP_PIN_INPUT_PULLDOWN);
+
+		/* Errata i687: set I/O drive strength to 1 */
+		if (cpu_is_omap443x()) {
+			u32 val;
+			val = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+			val |= OMAP4_USBB1_DR0_DS_MASK;
+			omap4_ctrl_pad_writel(val, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+		}
 			break;
 	case OMAP_USBHS_PORT_MODE_UNUSED:
 	default:
@@ -309,6 +318,14 @@ void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
 			OMAP_PIN_INPUT_PULLDOWN);
 		omap_mux_init_signal("usbb2_ulpitll_dat7",
 			OMAP_PIN_INPUT_PULLDOWN);
+
+		/* Errata i687: set I/O drive strength to 1 */
+		if (cpu_is_omap443x()) {
+			u32 val;
+			val = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+			val |= OMAP4_USBB2_DR0_DS_MASK;
+			omap4_ctrl_pad_writel(val, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
+		}
 			break;
 	case OMAP_USBHS_PORT_MODE_UNUSED:
 	default:
-- 
1.7.1

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Re: [PATCH 2/2] OMAP4430: USB Host: Implement workaround for Errata i687

[Sergei Shtylyov]

Hello.

On 29-06-2012 13:11, Ruslan Bilovol wrote:

> The OMAP4 EHCI controller has the following defect (errata ID i687):

> Title:
> 	USB TLL Hold Timing Violation

> Description:
> 	There is a timing hold violation on an internal logic on
> 	the clock USB TLL path resulting in a systematic connection
> 	failure on the TLL link

> WORKAROUND:
> 	As part of workaround, next should be done:
> 	Set the I/O drive strength to 1.
> 	Depending which USB host subsystem is used,
> 	• Port B1 used: Set CONTROL.CONTROL_SMART2IO_PADCONF_2[11] USBB1_DR0_DS = 0x1
> 	• Port B2 used: Set CONTROL.CONTROL_SMART2IO_PADCONF_2[12] USBB2_DR0_DS = 0x1

> All OMAP4430 devices are impacted.

> Signed-off-by: Ruslan Bilovol<ruslan.bilovol@ti.com>
> ---
>   arch/arm/mach-omap2/usb-host.c |   17 +++++++++++++++++
>   1 files changed, 17 insertions(+), 0 deletions(-)

> diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
> index dde8a11..3a6f2a2 100644
> --- a/arch/arm/mach-omap2/usb-host.c
> +++ b/arch/arm/mach-omap2/usb-host.c
[...]
> @@ -252,6 +253,14 @@ void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
>   			OMAP_PIN_INPUT_PULLDOWN);
>   		omap_mux_init_signal("usbb1_ulpitll_dat7",
>   			OMAP_PIN_INPUT_PULLDOWN);
> +
> +		/* Errata i687: set I/O drive strength to 1 */
> +		if (cpu_is_omap443x()) {
> +			u32 val;

    Empty line after the declaration block wouldn't hurt...

> +			val = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
> +			val |= OMAP4_USBB1_DR0_DS_MASK;
> +			omap4_ctrl_pad_writel(val, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
> +		}
>   			break;
>   	case OMAP_USBHS_PORT_MODE_UNUSED:
>   	default:
> @@ -309,6 +318,14 @@ void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
>   			OMAP_PIN_INPUT_PULLDOWN);
>   		omap_mux_init_signal("usbb2_ulpitll_dat7",
>   			OMAP_PIN_INPUT_PULLDOWN);
> +
> +		/* Errata i687: set I/O drive strength to 1 */
> +		if (cpu_is_omap443x()) {
> +			u32 val;

    Same here...

> +			val = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
> +			val |= OMAP4_USBB2_DR0_DS_MASK;
> +			omap4_ctrl_pad_writel(val, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_2);
> +		}
>   			break;
>   	case OMAP_USBHS_PORT_MODE_UNUSED:
>   	default:

WBR, Sergei
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