Re: [PATCH 1/8] perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities

["Mi, Dapeng" <dapeng1.mi@linux.intel.com>]

On 6/6/2026 1:04 AM, Falcon, Thomas wrote:
> On Fri, 2026-06-05 at 09:11 +0800, Dapeng Mi wrote:
>> AnyThread mode deprecation is enumerated by CPUID.0AH:EDX[15] instead
>> of
>> PERF_CAPABILITIES MSR. It's not a good practice to define a bit to
>> represent "anythread deprecation" in perf_capabilities. It leads to
>> the
>> anythread_deprecated bit could be overwritten by the real value of
>> PERF_CAPABILITIES MSR, just like the below code in update_pmu_cap()
>> does.
>>
>> ```
>> if (!intel_pmu_broken_perf_cap()) {
>> 	/* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid
>> enumeration */
>> 	rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu,
>> intel_cap).capabilities);
>> }
>> ```
>>
>> It leads to the anythread_deprecated bit is cleared to 0 and the
>> "any"
>> attribute is incorrectly shown in the /sys/devices/cpu/format/ folder
>> on
>> these support Perfmon v6 platforms, like Clearwater Forest.
>>
>> ```
>> $grep . /sys/devices/cpu/format/*
>> /sys/devices/cpu/format/acr_mask:config2:0-63
>> /sys/devices/cpu/format/any:config:21
>> /sys/devices/cpu/format/cmask:config:24-31
>> ```
>>
>> So remove the anythread_deprecated bit from perf_capabilities
>> structure
>> and directly depends on CPUID.0AH:EDX[15] to judge if anythread is
>> deprecated.
>>
>> Cc: stable@vger.kernel.org
>> Reported-by: Namhyung Kim <namhyung@kernel.org>
>> Fixes: cadbaa039b99 ("perf/x86/intel: Make anythread filter support
>> conditional")
>> Acked-by: Namhyung Kim <namhyung@kernel.org>
>> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
>> Reviewed-by: Zide Chen <zide.chen@intel.com>
>> ---
>>
>> Original patch link:
>> https://lore.kernel.org/all/20260423053306.3033331-1-dapeng1.mi@linux.intel.com/
>>
>>  arch/x86/events/intel/core.c | 10 +++-------
>>  arch/x86/events/perf_event.h |  2 +-
>>  2 files changed, 4 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/x86/events/intel/core.c
>> b/arch/x86/events/intel/core.c
>> index 0217e701aeeb..ea3ab3050a3b 100644
>> --- a/arch/x86/events/intel/core.c
>> +++ b/arch/x86/events/intel/core.c
>> @@ -7946,12 +7946,6 @@ __init int intel_pmu_init(void)
>>  
>>  	x86_add_quirk(intel_arch_events_quirk); /* Install first, so
>> it runs last */
>>  
>> -	if (version >= 5) {
>> -		x86_pmu.intel_cap.anythread_deprecated =
>> edx.split.anythread_deprecated;
>> -		if (x86_pmu.intel_cap.anythread_deprecated)
>> -			pr_cont(" AnyThread deprecated, ");
>> -	}
>> -
>>  	/* The perf side of core PMU is ready to support the
>> mediated vPMU. */
>>  	x86_get_pmu(smp_processor_id())->capabilities |=
>> PERF_PMU_CAP_MEDIATED_VPMU;
>>  
>> @@ -8828,8 +8822,10 @@ __init int intel_pmu_init(void)
>>  				      &x86_pmu.intel_ctrl);
>>  
>>  	/* AnyThread may be deprecated on arch perfmon v5 or later
>> */
>> -	if (x86_pmu.intel_cap.anythread_deprecated)
>> +	if (version >= 5 && edx.split.anythread_deprecated) {
>>  		x86_pmu.format_attrs = intel_arch_formats_attr;
>> +		pr_cont("AnyThread deprecated, ");
> Is there a reason the leading space is missing here? Other than that,
> LGTM.

It's removed intentionally. The leading space is unnecessary and seems to
be long-term typo.

Thanks.


>
> Reviewed-by: Thomas Falcon <thomas.falcon@intel.com>
>
>> +	}
>>  
>>  	intel_pmu_check_event_constraints_all(NULL);
>>  
>> diff --git a/arch/x86/events/perf_event.h
>> b/arch/x86/events/perf_event.h
>> index eae24bb35dc1..5902a297daa1 100644
>> --- a/arch/x86/events/perf_event.h
>> +++ b/arch/x86/events/perf_event.h
>> @@ -668,7 +668,7 @@ union perf_capabilities {
>>  		u64	perf_metrics:1;
>>  		u64	pebs_output_pt_available:1;
>>  		u64	pebs_timing_info:1;
>> -		u64	anythread_deprecated:1;
>> +		u64	__reserved:1;
>>  		u64	rdpmc_metrics_clear:1;
>>  	};
>>  	u64	capabilities;