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From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: James Morse <james.morse@arm.com>
Cc: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, Borislav Petkov <bp@alien8.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Tony Luck <tony.luck@intel.com>,
	Robert Richter <rrichter@marvell.com>,
	linux-edac@vger.kernel.org, tsoni@codeaurora.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>,
	Stephen Boyd <swboyd@chromium.org>,
	psodagud@codeaurora.org, linux-arm-kernel@lists.infradead.org,
	baicar@os.amperecomputing.com
Subject: Re: [PATCH 0/2] Add EDAC support for Kryo CPU core caches
Date: Fri, 24 Jan 2020 19:34:51 +0530	[thread overview]
Message-ID: <4bd9d0f34ff06aa0185616066158349a@codeaurora.org> (raw)
In-Reply-To: <0769b7cb-4e01-eb83-8ad4-b29b4fafafd4@arm.com>

Hello James,

On 2020-01-16 00:16, James Morse wrote:
> Hi Sai,
> 
> (CC: +Tyler)
> 
> On 05/12/2019 09:52, Sai Prakash Ranjan wrote:
>> This series implements EDAC support for error reporting on
>> Kryo{3,4}XX CPU caches L1,L2, L3-SCU. All the cores(big.LITTLE)
>> in Kryo{3,4}XX CPUs implement RAS extensions and use interrupt
>> based ECC mechanism to report errors.
>> 
>> This series has been tested on SC7180, SDM845, SM8150 SoCs with
>> Kryo{3,4}XX CPU cores based on ARM Cortex-A55, Cortex-A75 and
>> Cortex-A76.
>> 
>> This implementation is platform specific in contrast to the
>> patch posted last time for generic error reporting on arm cortex
>> implementations with RAS extensions by Kyle Yan.
>>  - https://patchwork.kernel.org/patch/10161955/
> 
> I think that series was dropped because it was too soc-specific and
> overlaps with the v8.2
> kernel first support. That series was superseded by:
> lore.kernel.org/r/1562086280-5351-1-git-send-email-baicar@os.amperecomputing.com
> 
> Can you work with Tyler on a combined series? The combined support may
> need to look quite
> different. (DT and big/little being the obvious differences).
> 
> I'm afraid this is the tip of the kernel-first-RAS iceberg.
> 

Sorry for the delayed response. Sure, I will take a look at the series 
posted by Tyler.
It might take some time to come up with that but should be doable with 
your review :)

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To: James Morse <james.morse@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Tony Luck <tony.luck@intel.com>,
	psodagud@codeaurora.org, linux-arm-msm@vger.kernel.org,
	Stephen Boyd <swboyd@chromium.org>,
	tsoni@codeaurora.org, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Andy Gross <agross@kernel.org>, Borislav Petkov <bp@alien8.de>,
	Evan Green <evgreen@chromium.org>,
	Robert Richter <rrichter@marvell.com>,
	baicar@os.amperecomputing.com,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org
Subject: Re: [PATCH 0/2] Add EDAC support for Kryo CPU core caches
Date: Fri, 24 Jan 2020 19:34:51 +0530	[thread overview]
Message-ID: <4bd9d0f34ff06aa0185616066158349a@codeaurora.org> (raw)
In-Reply-To: <0769b7cb-4e01-eb83-8ad4-b29b4fafafd4@arm.com>

Hello James,

On 2020-01-16 00:16, James Morse wrote:
> Hi Sai,
> 
> (CC: +Tyler)
> 
> On 05/12/2019 09:52, Sai Prakash Ranjan wrote:
>> This series implements EDAC support for error reporting on
>> Kryo{3,4}XX CPU caches L1,L2, L3-SCU. All the cores(big.LITTLE)
>> in Kryo{3,4}XX CPUs implement RAS extensions and use interrupt
>> based ECC mechanism to report errors.
>> 
>> This series has been tested on SC7180, SDM845, SM8150 SoCs with
>> Kryo{3,4}XX CPU cores based on ARM Cortex-A55, Cortex-A75 and
>> Cortex-A76.
>> 
>> This implementation is platform specific in contrast to the
>> patch posted last time for generic error reporting on arm cortex
>> implementations with RAS extensions by Kyle Yan.
>>  - https://patchwork.kernel.org/patch/10161955/
> 
> I think that series was dropped because it was too soc-specific and
> overlaps with the v8.2
> kernel first support. That series was superseded by:
> lore.kernel.org/r/1562086280-5351-1-git-send-email-baicar@os.amperecomputing.com
> 
> Can you work with Tyler on a combined series? The combined support may
> need to look quite
> different. (DT and big/little being the obvious differences).
> 
> I'm afraid this is the tip of the kernel-first-RAS iceberg.
> 

Sorry for the delayed response. Sure, I will take a look at the series 
posted by Tyler.
It might take some time to come up with that but should be doable with 
your review :)

Thanks,
Sai

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a 
member
of Code Aurora Forum, hosted by The Linux Foundation

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  reply	other threads:[~2020-01-24 14:04 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-05  9:52 [PATCH 0/2] Add EDAC support for Kryo CPU core caches Sai Prakash Ranjan
2020-01-15 18:46 ` James Morse
2020-01-15 18:46   ` James Morse
2020-01-24 14:04   ` Sai Prakash Ranjan [this message]
2020-01-24 14:04     ` Sai Prakash Ranjan
  -- strict thread matches above, loose matches on Subject: below --
2019-12-05  9:52 Sai Prakash Ranjan

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