[PATCH] perf_events: fix BTS interrupt handling to avoid being dazed by NMI

[PATCH] perf_events: fix BTS interrupt handling to avoid being dazed by NMI

[Stephane Eranian]

Fix a bug introduced with commit de725de and the change in the meaning of the
return value of intel_pmu_handle_irq(). With the current code, when you are
using the BTS, you get 'dazed by NMI' each time the BTS buffer fills up.

BTS does interrupt on the PMU vector, thus NMI. You need to take this
into account in the return value of the function.

Signed-off-by: Stephane Eranian <eranian@google.com>
--

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index ee05c90..b4d2e1c 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -713,18 +713,18 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
 	struct cpu_hw_events *cpuc;
 	int bit, loops;
 	u64 status;
-	int handled = 0;
+	int handled;
 
 	perf_sample_data_init(&data, 0);
 
 	cpuc = &__get_cpu_var(cpu_hw_events);
 
 	intel_pmu_disable_all();
-	intel_pmu_drain_bts_buffer();
+	handled = intel_pmu_drain_bts_buffer();
 	status = intel_pmu_get_status();
 	if (!status) {
 		intel_pmu_enable_all(0);
-		return 0;
+		return handled;
 	}
 
 	loops = 0;

Re: [PATCH] perf_events: fix BTS interrupt handling to avoid being dazed by NMI

[Stephane Eranian]

Sorry, my patch is missing one piece. I will repost.


On Fri, Sep 10, 2010 at 1:09 PM, Stephane Eranian <eranian@google.com> wrote:
> Fix a bug introduced with commit de725de and the change in the meaning of the
> return value of intel_pmu_handle_irq(). With the current code, when you are
> using the BTS, you get 'dazed by NMI' each time the BTS buffer fills up.
>
> BTS does interrupt on the PMU vector, thus NMI. You need to take this
> into account in the return value of the function.
>
> Signed-off-by: Stephane Eranian <eranian@google.com>
> --
>
> diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
> index ee05c90..b4d2e1c 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> @@ -713,18 +713,18 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
>        struct cpu_hw_events *cpuc;
>        int bit, loops;
>        u64 status;
> -       int handled = 0;
> +       int handled;
>
>        perf_sample_data_init(&data, 0);
>
>        cpuc = &__get_cpu_var(cpu_hw_events);
>
>        intel_pmu_disable_all();
> -       intel_pmu_drain_bts_buffer();
> +       handled = intel_pmu_drain_bts_buffer();
>        status = intel_pmu_get_status();
>        if (!status) {
>                intel_pmu_enable_all(0);
> -               return 0;
> +               return handled;
>        }
>
>        loops = 0;
>