[PATCH 0/7] Enable eQEP DT support for Sitara K3 platforms

[PATCH 0/7] Enable eQEP DT support for Sitara K3 platforms

[Judith Mendez]

This patch series adds eQEP DT nodes for K3 Sitara devices:
- AM62x
- AM62ax
- AM62px
- AM64x

Also enable eQEP to be built as a module for ARCH_k3.

Judith Mendez (7):
  arm64: dts: ti: k3-am62-main: Add eQEP nodes
  arm64: dts: ti: k3-am62a-main: Add eQEP nodes
  arm64: dts: ti: k3-am62p-main: Add eQEP nodes
  arm64: dts: ti: k3-am64-main: Add eQEP nodes
  dt-bindings: counter: Update TI eQEP binding
  counter: ti-eqep: Allow eQEP driver to be built for K3 devices
  arm64: defconfig: Enable TI eQEP Driver

 .../devicetree/bindings/counter/ti-eqep.yaml  | 10 +++++--
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi      | 30 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi     | 30 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi     | 30 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi      | 30 +++++++++++++++++++
 arch/arm64/configs/defconfig                  |  1 +
 drivers/counter/Kconfig                       |  2 +-
 7 files changed, 129 insertions(+), 4 deletions(-)


base-commit: 534ad093bb80f19c20b251a89f09ce1a0e3d4f2d
-- 
2.43.2

[PATCH 0/7] Enable eQEP DT support for Sitara K3 platforms

[Judith Mendez]

This patch series adds eQEP DT nodes for K3 Sitara devices:
- AM62x
- AM62ax
- AM62px
- AM64x

Also enable eQEP to be built as a module for ARCH_k3.

Judith Mendez (7):
  arm64: dts: ti: k3-am62-main: Add eQEP nodes
  arm64: dts: ti: k3-am62a-main: Add eQEP nodes
  arm64: dts: ti: k3-am62p-main: Add eQEP nodes
  arm64: dts: ti: k3-am64-main: Add eQEP nodes
  dt-bindings: counter: Update TI eQEP binding
  counter: ti-eqep: Allow eQEP driver to be built for K3 devices
  arm64: defconfig: Enable TI eQEP Driver

 .../devicetree/bindings/counter/ti-eqep.yaml  | 10 +++++--
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi      | 30 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi     | 30 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi     | 30 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi      | 30 +++++++++++++++++++
 arch/arm64/configs/defconfig                  |  1 +
 drivers/counter/Kconfig                       |  2 +-
 7 files changed, 129 insertions(+), 4 deletions(-)


base-commit: 534ad093bb80f19c20b251a89f09ce1a0e3d4f2d
-- 
2.43.2


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[PATCH 1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM625 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am62-main.dtsi.

Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index e9cffca073efc..0877899b90667 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_mcan0: can@20701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x20701000 0x00 0x200>,
-- 
2.43.2

[PATCH 1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM625 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am62-main.dtsi.

Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index e9cffca073efc..0877899b90667 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_mcan0: can@20701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x20701000 0x00 0x200>,
-- 
2.43.2


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Re: [PATCH 1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes

[Krzysztof Kozlowski]

On 19/04/2024 00:14, Judith Mendez wrote:
> Add eQEP DT nodes 0-2 for AM625 SoC.
> 
> Since external hardware was needed to test eQEP, the DT nodes
> for eQEP were not included in the introductory commit. Now that
> eQEP has been validated, add nodes to k3-am62-main.dtsi.
> 
> Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index e9cffca073efc..0877899b90667 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
>  		status = "disabled";
>  	};
>  
> +	eqep0: counter@23200000 {
> +		compatible = "ti,am3352-eqep";

That's k3-am62, not am3352. See writing-bindings (and numerous
presentations telling you how to do it, e.g. from two previous EOSS/ELCE).

Best regards,
Krzysztof

Re: [PATCH 1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes

[Krzysztof Kozlowski]

On 19/04/2024 00:14, Judith Mendez wrote:
> Add eQEP DT nodes 0-2 for AM625 SoC.
> 
> Since external hardware was needed to test eQEP, the DT nodes
> for eQEP were not included in the introductory commit. Now that
> eQEP has been validated, add nodes to k3-am62-main.dtsi.
> 
> Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index e9cffca073efc..0877899b90667 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
>  		status = "disabled";
>  	};
>  
> +	eqep0: counter@23200000 {
> +		compatible = "ti,am3352-eqep";

That's k3-am62, not am3352. See writing-bindings (and numerous
presentations telling you how to do it, e.g. from two previous EOSS/ELCE).

Best regards,
Krzysztof


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Re: [PATCH 1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes

[Judith Mendez]

Hi,

On 4/19/24 8:56 AM, Krzysztof Kozlowski wrote:
> On 19/04/2024 00:14, Judith Mendez wrote:
>> Add eQEP DT nodes 0-2 for AM625 SoC.
>>
>> Since external hardware was needed to test eQEP, the DT nodes
>> for eQEP were not included in the introductory commit. Now that
>> eQEP has been validated, add nodes to k3-am62-main.dtsi.
>>
>> Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
>>   1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> index e9cffca073efc..0877899b90667 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> @@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
>>   		status = "disabled";
>>   	};
>>   
>> +	eqep0: counter@23200000 {
>> +		compatible = "ti,am3352-eqep";
> 
> That's k3-am62, not am3352. See writing-bindings (and numerous
> presentations telling you how to do it, e.g. from two previous EOSS/ELCE).
> 

Thanks, will fix and send v2.

~ Judith

> Best regards,
> Krzysztof
> 

Re: [PATCH 1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes

[Judith Mendez]

Hi,

On 4/19/24 8:56 AM, Krzysztof Kozlowski wrote:
> On 19/04/2024 00:14, Judith Mendez wrote:
>> Add eQEP DT nodes 0-2 for AM625 SoC.
>>
>> Since external hardware was needed to test eQEP, the DT nodes
>> for eQEP were not included in the introductory commit. Now that
>> eQEP has been validated, add nodes to k3-am62-main.dtsi.
>>
>> Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
>>   1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> index e9cffca073efc..0877899b90667 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> @@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
>>   		status = "disabled";
>>   	};
>>   
>> +	eqep0: counter@23200000 {
>> +		compatible = "ti,am3352-eqep";
> 
> That's k3-am62, not am3352. See writing-bindings (and numerous
> presentations telling you how to do it, e.g. from two previous EOSS/ELCE).
> 

Thanks, will fix and send v2.

~ Judith

> Best regards,
> Krzysztof
> 


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[PATCH 2/7] arm64: dts: ti: k3-am62a-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM62A7 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am62a-main.dtsi.

Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index aa1e057082f08..5b06cdf1c3436 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -905,6 +905,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	mcasp0: audio-controller@2b00000 {
 		compatible = "ti,am33xx-mcasp-audio";
 		reg = <0x00 0x02b00000 0x00 0x2000>,
-- 
2.43.2

[PATCH 2/7] arm64: dts: ti: k3-am62a-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM62A7 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am62a-main.dtsi.

Fixes: 5fc6b1b62639 ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index aa1e057082f08..5b06cdf1c3436 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -905,6 +905,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	mcasp0: audio-controller@2b00000 {
 		compatible = "ti,am33xx-mcasp-audio";
 		reg = <0x00 0x02b00000 0x00 0x2000>,
-- 
2.43.2


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[PATCH 3/7] arm64: dts: ti: k3-am62p-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM62P5 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am62p-main.dtsi.

Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 88bc64111234b..22f02b5bc8d4f 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -805,6 +805,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_mcan0: can@20701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x20701000 0x00 0x200>,
-- 
2.43.2

[PATCH 3/7] arm64: dts: ti: k3-am62p-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM62P5 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am62p-main.dtsi.

Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 30 +++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 88bc64111234b..22f02b5bc8d4f 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -805,6 +805,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_mcan0: can@20701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x20701000 0x00 0x200>,
-- 
2.43.2


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[PATCH 4/7] arm64: dts: ti: k3-am64-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM642 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am64-main.dtsi.

Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 30 ++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 6f9aa5e02138f..e7d31d7e0426c 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1171,6 +1171,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_rti0: watchdog@e000000 {
 		compatible = "ti,j7-rti-wdt";
 		reg = <0x00 0xe000000 0x00 0x100>;
-- 
2.43.2

[PATCH 4/7] arm64: dts: ti: k3-am64-main: Add eQEP nodes

[Judith Mendez]

Add eQEP DT nodes 0-2 for AM642 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am64-main.dtsi.

Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 30 ++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 6f9aa5e02138f..e7d31d7e0426c 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1171,6 +1171,36 @@ ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_rti0: watchdog@e000000 {
 		compatible = "ti,j7-rti-wdt";
 		reg = <0x00 0xe000000 0x00 0x100>;
-- 
2.43.2


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[PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Judith Mendez]

Update eQEP binding for TI K3 devices.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
index 85f1ff83afe72..11755074c8a91 100644
--- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
+++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
@@ -14,19 +14,23 @@ properties:
     const: ti,am3352-eqep
 
   reg:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
 
   interrupts:
     description: The eQEP event interrupt
     maxItems: 1
 
   clocks:
-    description: The clock that determines the SYSCLKOUT rate for the eQEP
+    description: The clock that determines the clock rate for the eQEP
       peripheral.
     maxItems: 1
 
   clock-names:
-    const: sysclkout
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
 
 required:
   - compatible
-- 
2.43.2

[PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Judith Mendez]

Update eQEP binding for TI K3 devices.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
index 85f1ff83afe72..11755074c8a91 100644
--- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
+++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
@@ -14,19 +14,23 @@ properties:
     const: ti,am3352-eqep
 
   reg:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
 
   interrupts:
     description: The eQEP event interrupt
     maxItems: 1
 
   clocks:
-    description: The clock that determines the SYSCLKOUT rate for the eQEP
+    description: The clock that determines the clock rate for the eQEP
       peripheral.
     maxItems: 1
 
   clock-names:
-    const: sysclkout
+    maxItems: 1
+
+  power-domains:
+    maxItems: 1
 
 required:
   - compatible
-- 
2.43.2


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Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Krzysztof Kozlowski]

On 19/04/2024 00:14, Judith Mendez wrote:
> Update eQEP binding for TI K3 devices.

Here and in subject: everything is an update. Be specific.

A nit, subject: drop second/last, redundant "binding". The "dt-bindings"
prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18

> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> index 85f1ff83afe72..11755074c8a91 100644
> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> @@ -14,19 +14,23 @@ properties:
>      const: ti,am3352-eqep
>  
>    reg:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2

Why? This must be constrained. Devices either have 1 or 2, no both at
the same time.

>  
>    interrupts:
>      description: The eQEP event interrupt
>      maxItems: 1
>  
>    clocks:
> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
> +    description: The clock that determines the clock rate for the eQEP
>        peripheral.
>      maxItems: 1
>  
>    clock-names:
> -    const: sysclkout
> +    maxItems: 1

NAK. That's just wrong, not explained at all either.


Best regards,
Krzysztof

Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Krzysztof Kozlowski]

On 19/04/2024 00:14, Judith Mendez wrote:
> Update eQEP binding for TI K3 devices.

Here and in subject: everything is an update. Be specific.

A nit, subject: drop second/last, redundant "binding". The "dt-bindings"
prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18

> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> index 85f1ff83afe72..11755074c8a91 100644
> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> @@ -14,19 +14,23 @@ properties:
>      const: ti,am3352-eqep
>  
>    reg:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2

Why? This must be constrained. Devices either have 1 or 2, no both at
the same time.

>  
>    interrupts:
>      description: The eQEP event interrupt
>      maxItems: 1
>  
>    clocks:
> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
> +    description: The clock that determines the clock rate for the eQEP
>        peripheral.
>      maxItems: 1
>  
>    clock-names:
> -    const: sysclkout
> +    maxItems: 1

NAK. That's just wrong, not explained at all either.


Best regards,
Krzysztof


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Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Judith Mendez]

On 4/19/24 8:55 AM, Krzysztof Kozlowski wrote:
> On 19/04/2024 00:14, Judith Mendez wrote:
>> Update eQEP binding for TI K3 devices.
> 
> Here and in subject: everything is an update. Be specific.
> 
> A nit, subject: drop second/last, redundant "binding". The "dt-bindings"
> prefix is already stating that these are bindings.
> See also:
> https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18

Will fix, thanks.

> 
>>
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>>   1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> index 85f1ff83afe72..11755074c8a91 100644
>> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> @@ -14,19 +14,23 @@ properties:
>>       const: ti,am3352-eqep
>>   
>>     reg:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
> 
> Why? This must be constrained. Devices either have 1 or 2, no both at
> the same time.

Will fix for v2.

> 
>>   
>>     interrupts:
>>       description: The eQEP event interrupt
>>       maxItems: 1
>>   
>>     clocks:
>> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
>> +    description: The clock that determines the clock rate for the eQEP
>>         peripheral.
>>       maxItems: 1
>>   
>>     clock-names:
>> -    const: sysclkout
>> +    maxItems: 1
> 
> NAK. That's just wrong, not explained at all either.
> 

The intention was to make the binding a bit more generic, but I see
that is not the correct direction to go, thanks for the feedback.

~ Judith

> 
> Best regards,
> Krzysztof
> 
> 

Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Judith Mendez]

On 4/19/24 8:55 AM, Krzysztof Kozlowski wrote:
> On 19/04/2024 00:14, Judith Mendez wrote:
>> Update eQEP binding for TI K3 devices.
> 
> Here and in subject: everything is an update. Be specific.
> 
> A nit, subject: drop second/last, redundant "binding". The "dt-bindings"
> prefix is already stating that these are bindings.
> See also:
> https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18

Will fix, thanks.

> 
>>
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>>   1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> index 85f1ff83afe72..11755074c8a91 100644
>> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> @@ -14,19 +14,23 @@ properties:
>>       const: ti,am3352-eqep
>>   
>>     reg:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
> 
> Why? This must be constrained. Devices either have 1 or 2, no both at
> the same time.

Will fix for v2.

> 
>>   
>>     interrupts:
>>       description: The eQEP event interrupt
>>       maxItems: 1
>>   
>>     clocks:
>> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
>> +    description: The clock that determines the clock rate for the eQEP
>>         peripheral.
>>       maxItems: 1
>>   
>>     clock-names:
>> -    const: sysclkout
>> +    maxItems: 1
> 
> NAK. That's just wrong, not explained at all either.
> 

The intention was to make the binding a bit more generic, but I see
that is not the correct direction to go, thanks for the feedback.

~ Judith

> 
> Best regards,
> Krzysztof
> 
> 


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Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Krzysztof Kozlowski]

On 23/04/2024 00:11, Judith Mendez wrote:
>>>   
>>>     interrupts:
>>>       description: The eQEP event interrupt
>>>       maxItems: 1
>>>   
>>>     clocks:
>>> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
>>> +    description: The clock that determines the clock rate for the eQEP
>>>         peripheral.
>>>       maxItems: 1
>>>   
>>>     clock-names:
>>> -    const: sysclkout
>>> +    maxItems: 1
>>
>> NAK. That's just wrong, not explained at all either.
>>
> 
> The intention was to make the binding a bit more generic, but I see
> that is not the correct direction to go, thanks for the feedback.

Bindings must be specific, because they describe the hardware. Your
hardware has exactly one clock input pin, not some superposition of pins
which change depending on photon stream.

Best regards,
Krzysztof

Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Krzysztof Kozlowski]

On 23/04/2024 00:11, Judith Mendez wrote:
>>>   
>>>     interrupts:
>>>       description: The eQEP event interrupt
>>>       maxItems: 1
>>>   
>>>     clocks:
>>> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
>>> +    description: The clock that determines the clock rate for the eQEP
>>>         peripheral.
>>>       maxItems: 1
>>>   
>>>     clock-names:
>>> -    const: sysclkout
>>> +    maxItems: 1
>>
>> NAK. That's just wrong, not explained at all either.
>>
> 
> The intention was to make the binding a bit more generic, but I see
> that is not the correct direction to go, thanks for the feedback.

Bindings must be specific, because they describe the hardware. Your
hardware has exactly one clock input pin, not some superposition of pins
which change depending on photon stream.

Best regards,
Krzysztof


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Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[David Lechner]

On 4/18/24 5:14 PM, Judith Mendez wrote:
> Update eQEP binding for TI K3 devices.


It would make more sense to have this patch first in the series
before the dts changes.

> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> index 85f1ff83afe72..11755074c8a91 100644
> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> @@ -14,19 +14,23 @@ properties:
>      const: ti,am3352-eqep
>  

As Krzysztof hinted, it sounds like we need to add new compatibles
here and have some -if: statements to account for the differences
in SoCs rather than making the bindings less strict.

>    reg:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
>  
>    interrupts:
>      description: The eQEP event interrupt
>      maxItems: 1
>  
>    clocks:
> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
> +    description: The clock that determines the clock rate for the eQEP
>        peripheral.
>      maxItems: 1
>  
>    clock-names:
> -    const: sysclkout
> +    maxItems: 1

In hindsight, this is not the best name. Since we only have one clock
we don't really need the name anyway, so for the new compatibles, we
could set clock-names: false.

> +
> +  power-domains:
> +    maxItems: 1
>  
>  required:
>    - compatible


I see that the CFG0 syscon register on AM62x has some control knobs for
the EQEP so it would be good to add this to the bindings now too to try
to make the bindings as complete as possible. (I didn't look at other
chips so the same may apply to others as well.)

Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[David Lechner]

On 4/18/24 5:14 PM, Judith Mendez wrote:
> Update eQEP binding for TI K3 devices.


It would make more sense to have this patch first in the series
before the dts changes.

> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> index 85f1ff83afe72..11755074c8a91 100644
> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
> @@ -14,19 +14,23 @@ properties:
>      const: ti,am3352-eqep
>  

As Krzysztof hinted, it sounds like we need to add new compatibles
here and have some -if: statements to account for the differences
in SoCs rather than making the bindings less strict.

>    reg:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2
>  
>    interrupts:
>      description: The eQEP event interrupt
>      maxItems: 1
>  
>    clocks:
> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
> +    description: The clock that determines the clock rate for the eQEP
>        peripheral.
>      maxItems: 1
>  
>    clock-names:
> -    const: sysclkout
> +    maxItems: 1

In hindsight, this is not the best name. Since we only have one clock
we don't really need the name anyway, so for the new compatibles, we
could set clock-names: false.

> +
> +  power-domains:
> +    maxItems: 1
>  
>  required:
>    - compatible


I see that the CFG0 syscon register on AM62x has some control knobs for
the EQEP so it would be good to add this to the bindings now too to try
to make the bindings as complete as possible. (I didn't look at other
chips so the same may apply to others as well.)


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Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Judith Mendez]

On 4/22/24 1:25 PM, David Lechner wrote:
> On 4/18/24 5:14 PM, Judith Mendez wrote:
>> Update eQEP binding for TI K3 devices.
> 
> 
> It would make more sense to have this patch first in the series
> before the dts changes.

Got it.

> 
>>
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>>   1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> index 85f1ff83afe72..11755074c8a91 100644
>> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> @@ -14,19 +14,23 @@ properties:
>>       const: ti,am3352-eqep
>>   
> 
> As Krzysztof hinted, it sounds like we need to add new compatibles
> here and have some -if: statements to account for the differences
> in SoCs rather than making the bindings less strict.

Yes, I see this is the correct action. Thanks.

> 
>>     reg:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
>>   
>>     interrupts:
>>       description: The eQEP event interrupt
>>       maxItems: 1
>>   
>>     clocks:
>> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
>> +    description: The clock that determines the clock rate for the eQEP
>>         peripheral.
>>       maxItems: 1
>>   
>>     clock-names:
>> -    const: sysclkout
>> +    maxItems: 1
> 
> In hindsight, this is not the best name. Since we only have one clock
> we don't really need the name anyway, so for the new compatibles, we
> could set clock-names: false.

Ok, will add this to new compatible.

> 
>> +
>> +  power-domains:
>> +    maxItems: 1
>>   
>>   required:
>>     - compatible
> 
> 
> I see that the CFG0 syscon register on AM62x has some control knobs for
> the EQEP so it would be good to add this to the bindings now too to try
> to make the bindings as complete as possible. (I didn't look at other
> chips so the same may apply to others as well.)

Got it (:

~ Judith

> 

Re: [PATCH 5/7] dt-bindings: counter: Update TI eQEP binding

[Judith Mendez]

On 4/22/24 1:25 PM, David Lechner wrote:
> On 4/18/24 5:14 PM, Judith Mendez wrote:
>> Update eQEP binding for TI K3 devices.
> 
> 
> It would make more sense to have this patch first in the series
> before the dts changes.

Got it.

> 
>>
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   Documentation/devicetree/bindings/counter/ti-eqep.yaml | 10 +++++++---
>>   1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/counter/ti-eqep.yaml b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> index 85f1ff83afe72..11755074c8a91 100644
>> --- a/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> +++ b/Documentation/devicetree/bindings/counter/ti-eqep.yaml
>> @@ -14,19 +14,23 @@ properties:
>>       const: ti,am3352-eqep
>>   
> 
> As Krzysztof hinted, it sounds like we need to add new compatibles
> here and have some -if: statements to account for the differences
> in SoCs rather than making the bindings less strict.

Yes, I see this is the correct action. Thanks.

> 
>>     reg:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 2
>>   
>>     interrupts:
>>       description: The eQEP event interrupt
>>       maxItems: 1
>>   
>>     clocks:
>> -    description: The clock that determines the SYSCLKOUT rate for the eQEP
>> +    description: The clock that determines the clock rate for the eQEP
>>         peripheral.
>>       maxItems: 1
>>   
>>     clock-names:
>> -    const: sysclkout
>> +    maxItems: 1
> 
> In hindsight, this is not the best name. Since we only have one clock
> we don't really need the name anyway, so for the new compatibles, we
> could set clock-names: false.

Ok, will add this to new compatible.

> 
>> +
>> +  power-domains:
>> +    maxItems: 1
>>   
>>   required:
>>     - compatible
> 
> 
> I see that the CFG0 syscon register on AM62x has some control knobs for
> the EQEP so it would be good to add this to the bindings now too to try
> to make the bindings as complete as possible. (I didn't look at other
> chips so the same may apply to others as well.)

Got it (:

~ Judith

> 


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[PATCH 6/7] counter: ti-eqep: Allow eQEP driver to be built for K3 devices

[Judith Mendez]

TI K3 SoC's support eQEP hardware, so add ARCH_K3 to the depends
so the TI eQEP driver can be built for K3 devices.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 drivers/counter/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig
index 497bc05dca4df..d30d22dfe5774 100644
--- a/drivers/counter/Kconfig
+++ b/drivers/counter/Kconfig
@@ -138,7 +138,7 @@ config TI_ECAP_CAPTURE
 
 config TI_EQEP
 	tristate "TI eQEP counter driver"
-	depends on (SOC_AM33XX || COMPILE_TEST)
+	depends on SOC_AM33XX || ARCH_K3 || COMPILE_TEST
 	select REGMAP_MMIO
 	help
 	  Select this option to enable the Texas Instruments Enhanced Quadrature
-- 
2.43.2

[PATCH 6/7] counter: ti-eqep: Allow eQEP driver to be built for K3 devices

[Judith Mendez]

TI K3 SoC's support eQEP hardware, so add ARCH_K3 to the depends
so the TI eQEP driver can be built for K3 devices.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 drivers/counter/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig
index 497bc05dca4df..d30d22dfe5774 100644
--- a/drivers/counter/Kconfig
+++ b/drivers/counter/Kconfig
@@ -138,7 +138,7 @@ config TI_ECAP_CAPTURE
 
 config TI_EQEP
 	tristate "TI eQEP counter driver"
-	depends on (SOC_AM33XX || COMPILE_TEST)
+	depends on SOC_AM33XX || ARCH_K3 || COMPILE_TEST
 	select REGMAP_MMIO
 	help
 	  Select this option to enable the Texas Instruments Enhanced Quadrature
-- 
2.43.2


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[PATCH 7/7] arm64: defconfig: Enable TI eQEP Driver

[Judith Mendez]

TI K3 SoC's support eQEP hardware, so enable TI eQEP driver
to be built as a module.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e1802..23d11a1b20195 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1593,6 +1593,7 @@ CONFIG_INTERCONNECT_QCOM_SM8550=y
 CONFIG_INTERCONNECT_QCOM_SM8650=y
 CONFIG_INTERCONNECT_QCOM_X1E80100=y
 CONFIG_COUNTER=m
+CONFIG_TI_EQEP=m
 CONFIG_RZ_MTU3_CNT=m
 CONFIG_HTE=y
 CONFIG_HTE_TEGRA194=y
-- 
2.43.2

[PATCH 7/7] arm64: defconfig: Enable TI eQEP Driver

[Judith Mendez]

TI K3 SoC's support eQEP hardware, so enable TI eQEP driver
to be built as a module.

Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2c30d617e1802..23d11a1b20195 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1593,6 +1593,7 @@ CONFIG_INTERCONNECT_QCOM_SM8550=y
 CONFIG_INTERCONNECT_QCOM_SM8650=y
 CONFIG_INTERCONNECT_QCOM_X1E80100=y
 CONFIG_COUNTER=m
+CONFIG_TI_EQEP=m
 CONFIG_RZ_MTU3_CNT=m
 CONFIG_HTE=y
 CONFIG_HTE_TEGRA194=y
-- 
2.43.2


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