From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: Max Chou <max.chou@sifive.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Weiwei Li <liweiwei@iscas.ac.cn>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Andrew Jones <ajones@ventanamicro.com>
Subject: Re: [PATCH v2 06/14] target/riscv: Add cfg properties for Zvkn[c|g] extensions
Date: Mon, 30 Oct 2023 14:28:07 -0300 [thread overview]
Message-ID: <4eef627e-49ee-4d54-97c6-ea89eb772047@ventanamicro.com> (raw)
In-Reply-To: <20231026151828.754279-7-max.chou@sifive.com>
On 10/26/23 12:18, Max Chou wrote:
> Vector crypto spec defines the NIST algorithm suite related extensions
> (Zvkn, Zvknc, Zvkng) combined by several vector crypto extensions.
>
> Signed-off-by: Max Chou <max.chou@sifive.com>
> ---
> target/riscv/cpu_cfg.h | 3 +++
> target/riscv/tcg/tcg-cpu.c | 20 ++++++++++++++++++++
> 2 files changed, 23 insertions(+)
>
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index 935335e5721..fd07aa96a27 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -96,6 +96,9 @@ struct RISCVCPUConfig {
> bool ext_zvksed;
> bool ext_zvksh;
> bool ext_zvkt;
> + bool ext_zvkn;
> + bool ext_zvknc;
> + bool ext_zvkng;
> bool ext_zmmul;
> bool ext_zvfbfmin;
> bool ext_zvfbfwma;
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 1b08f27eee4..e460701a13c 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -499,6 +499,26 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
> return;
> }
>
> + /*
> + * Shorthand vector crypto extensions
> + */
> + if (cpu->cfg.ext_zvknc) {
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkn), true);
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true);
> + }
> +
> + if (cpu->cfg.ext_zvkng) {
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkn), true);
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkg), true);
> + }
> +
> + if (cpu->cfg.ext_zvkn) {
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkned), true);
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvknhb), true);
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkb), true);
> + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true);
> + }
> +
As a follow-up, we should move these vector validations to its own helper.
We already have riscv_cpu_validate_v(), making it a good place to center
all RVV related validations.
For now:
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> if (cpu->cfg.ext_zvkt) {
> cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbb), true);
> cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true);
next prev parent reply other threads:[~2023-10-30 17:28 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-26 15:18 [PATCH v2 00/14] Update RISC-V vector crypto to ratified v1.0.0 Max Chou
2023-10-26 15:18 ` [PATCH v2 01/14] target/riscv: Add cfg property for Zvkt extension Max Chou
2023-10-30 14:34 ` Daniel Henrique Barboza
2023-11-02 0:44 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 02/14] target/riscv: Expose Zvkt extension property Max Chou
2023-10-30 14:35 ` Daniel Henrique Barboza
2023-11-02 0:44 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 03/14] target/riscv: Add cfg property for Zvkb extension Max Chou
2023-10-30 14:49 ` Daniel Henrique Barboza
2023-11-02 0:45 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 04/14] target/riscv: Replace Zvbb checking by Zvkb Max Chou
2023-10-30 17:23 ` Daniel Henrique Barboza
2023-11-02 0:46 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 05/14] target/riscv: Expose Zvkb extension property Max Chou
2023-10-30 17:24 ` Daniel Henrique Barboza
2023-11-02 0:47 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 06/14] target/riscv: Add cfg properties for Zvkn[c|g] extensions Max Chou
2023-10-30 17:28 ` Daniel Henrique Barboza [this message]
2023-11-02 0:49 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 07/14] target/riscv: Expose Zvkn[c|g] extnesion properties Max Chou
2023-10-30 17:29 ` Daniel Henrique Barboza
2023-11-02 0:49 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 08/14] target/riscv: Add cfg properties for Zvks[c|g] extensions Max Chou
2023-10-30 17:30 ` Daniel Henrique Barboza
2023-11-02 0:50 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 09/14] target/riscv: Expose Zvks[c|g] extnesion properties Max Chou
2023-10-30 17:30 ` Daniel Henrique Barboza
2023-11-02 0:50 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 10/14] target/riscv: Move vector crypto extensions to riscv_cpu_extensions Max Chou
2023-10-30 17:33 ` Daniel Henrique Barboza
2023-11-02 0:51 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 11/14] disas/riscv: Add rv_fmt_vd_vs2_uimm format Max Chou
2023-11-02 0:52 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 12/14] disas/riscv: Add rv_codec_vror_vi for vror.vi Max Chou
2023-11-02 0:57 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 13/14] disas/riscv: Add support for vector crypto extensions Max Chou
2023-11-02 0:59 ` Alistair Francis
2023-10-26 15:18 ` [PATCH v2 14/14] disas/riscv: Replace TABs with space Max Chou
2023-11-02 1:00 ` Alistair Francis
2023-11-02 1:38 ` [PATCH v2 00/14] Update RISC-V vector crypto to ratified v1.0.0 Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4eef627e-49ee-4d54-97c6-ea89eb772047@ventanamicro.com \
--to=dbarboza@ventanamicro.com \
--cc=ajones@ventanamicro.com \
--cc=alistair.francis@wdc.com \
--cc=bin.meng@windriver.com \
--cc=liweiwei@iscas.ac.cn \
--cc=max.chou@sifive.com \
--cc=palmer@dabbelt.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.