From: "Cédric Le Goater" <clg@kaod.org>
To: Kane Chen <kane_chen@aspeedtech.com>,
Peter Maydell <peter.maydell@linaro.org>,
Steven Lee <steven_lee@aspeedtech.com>,
Troy Lee <leetroy@gmail.com>,
Jamin Lin <jamin_lin@aspeedtech.com>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Joel Stanley <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Troy Lee <troy_lee@aspeedtech.com>
Subject: Re: [PATCH v1 1/2] hw/misc/aspeed_sbc: Derive ABR state from OTP config straps
Date: Thu, 3 Sep 2026 09:22:30 +0200 [thread overview]
Message-ID: <4fcbb217-596f-4a9a-8b2a-ca7fb1de7743@kaod.org> (raw)
In-Reply-To: <SI6PR06MB76318928B02F6147B1DEC82DF7A82@SI6PR06MB7631.apcprd06.prod.outlook.com>
Hello,
> However, the OTP configuration can also be programmed at runtime.
> Therefore, reading the OTP configuration only once at realize/reset time
> may leave the SBC STATUS register out of sync if the OTP
> configuration is changed afterward.
>
> I see two possible approaches to keep the SBC STATUS register
> synchronized with the OTP configuration:
>
> Update the SBC STATUS register at reset and whenever the relevant
> OTP configuration is programmed. This would keep the cached STATUS
> value synchronized with the latest OTP configuration.
Caching values is always a problem. Unless performance is impacted,
computing is better.
> Derive the relevant SBC STATUS bits directly from the OTP
> configuration whenever the STATUS register is read. This avoids
> maintaining a cached copy of the OTP-derived state.
yes something like :
static uint32_t aspeed_otp_read_cfg0(AspeedSBCState *s)
{
@@ -110,6 +111,23 @@ static uint64_t aspeed_sbc_read(void *op
}
switch (addr) {
+ case R_STATUS: {
+ uint32_t val = s->regs[R_STATUS];
+
+ if (aspeed_get_abr_state(s)) {
+ val |= ABR_EN;
+ } else {
+ val &= ~ABR_EN;
+ }
is better IMO. The SBC status register is a reflection of the OTP
fuse state. You could ask he HW designers for info on how the state
is maintained.
Thanks,
C.
next prev parent reply other threads:[~2026-09-03 7:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 5:36 [PATCH v1 0/2] hw/misc/aspeed_sbc: Fix ABR and secure boot state reporting Kane Chen
2026-08-31 5:37 ` [PATCH v1 1/2] hw/misc/aspeed_sbc: Derive ABR state from OTP config straps Kane Chen
2026-08-31 5:40 ` Jamin Lin
2026-08-31 11:10 ` Cédric Le Goater
2026-09-01 9:25 ` Kane Chen
2026-09-03 7:22 ` Cédric Le Goater [this message]
2026-09-03 7:35 ` Kane Chen
2026-08-31 5:37 ` [PATCH v1 2/2] hw/misc/aspeed_sbc: Derive secure boot " Kane Chen
2026-08-31 5:41 ` Jamin Lin
2026-08-31 11:14 ` Cédric Le Goater
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