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From: clemens@ladisch.de (Clemens Ladisch)
To: linux-arm-kernel@lists.infradead.org
Subject: About dma_sync_single_for_{cpu,device}
Date: Tue, 31 Jul 2012 09:34:01 +0200	[thread overview]
Message-ID: <50178A69.8050906@ladisch.de> (raw)
In-Reply-To: <CACYmx9O_TJoSmhiai_Mv09JE3HZ+-V=w8KobTn3zPXtkWbojkw@mail.gmail.com>

Karl Beldan wrote:
> On 7/31/12, Clemens Ladisch <clemens@ladisch.de> wrote:
>> Karl Beldan wrote:
>>> To tx a chunk of data from the SoC => network device, we :
>>> - prepare a buffer with a leading header embedding a pattern,
>>> - trigger the xfer and wait for an irq
>>> // The device updates the pattern and then triggers an irq
>>> - upon irq we check the pattern for the xfer completion
>>>
>>> I was expecting the following to work:
>>> 	addr = dma_map_single(dev, buffer, size, DMA_TO_DEVICE);
>>
>> Of both the CPU and the device write to the buffer, you must use
>> DMA_BIDIRECTIONAL.
>
> This does not work (tested) :  seems to me BIDIRECTIONAL would just
> add invalidate, and invalidate before the ram has been updated, as
> stated, does not work.

Please show the exact sequence of dma_* calls, and also show when and
how the CPU and the device access the buffer.


Regards,
Clemens

WARNING: multiple messages have this Message-ID (diff)
From: Clemens Ladisch <clemens@ladisch.de>
To: Karl Beldan <karl.beldan@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: About dma_sync_single_for_{cpu,device}
Date: Tue, 31 Jul 2012 09:34:01 +0200	[thread overview]
Message-ID: <50178A69.8050906@ladisch.de> (raw)
In-Reply-To: <CACYmx9O_TJoSmhiai_Mv09JE3HZ+-V=w8KobTn3zPXtkWbojkw@mail.gmail.com>

Karl Beldan wrote:
> On 7/31/12, Clemens Ladisch <clemens@ladisch.de> wrote:
>> Karl Beldan wrote:
>>> To tx a chunk of data from the SoC => network device, we :
>>> - prepare a buffer with a leading header embedding a pattern,
>>> - trigger the xfer and wait for an irq
>>> // The device updates the pattern and then triggers an irq
>>> - upon irq we check the pattern for the xfer completion
>>>
>>> I was expecting the following to work:
>>> 	addr = dma_map_single(dev, buffer, size, DMA_TO_DEVICE);
>>
>> Of both the CPU and the device write to the buffer, you must use
>> DMA_BIDIRECTIONAL.
>
> This does not work (tested) :  seems to me BIDIRECTIONAL would just
> add invalidate, and invalidate before the ram has been updated, as
> stated, does not work.

Please show the exact sequence of dma_* calls, and also show when and
how the CPU and the device access the buffer.


Regards,
Clemens

  reply	other threads:[~2012-07-31  7:34 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-30 20:24 About dma_sync_single_for_{cpu,device} karl.beldan
2012-07-30 20:34 ` karl.beldan
2012-07-31  6:45 ` Karl Beldan
2012-07-31  6:45   ` Karl Beldan
2012-07-31  6:59   ` Clemens Ladisch
2012-07-31  6:59     ` Clemens Ladisch
2012-07-31  7:27     ` Karl Beldan
2012-07-31  7:27       ` Karl Beldan
2012-07-31  7:34       ` Clemens Ladisch [this message]
2012-07-31  7:34         ` Clemens Ladisch
2012-07-31  8:30         ` Karl Beldan
2012-07-31  8:30           ` Karl Beldan
2012-07-31  9:09   ` Russell King - ARM Linux
2012-07-31  9:09     ` Russell King - ARM Linux
2012-07-31 19:31     ` Karl Beldan
2012-07-31 19:31       ` Karl Beldan
2012-07-31 20:08       ` Russell King - ARM Linux
2012-07-31 20:08         ` Russell King - ARM Linux
2012-08-01  6:50         ` Karl Beldan
2012-08-01  6:50           ` Karl Beldan

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