* [U-Boot] [PATCH v1 2/6] mxs: prefix register acessor macros with 'mxs' prefix
2012-08-05 19:05 [U-Boot] [PATCH v1 0/6] Rework for mxs SoC family support Otavio Salvador
2012-08-05 19:05 ` [U-Boot] [PATCH v1 1/6] mxs: reorganize source directory for easy sharing of code in i.MXS SoCs Otavio Salvador
@ 2012-08-05 19:05 ` Otavio Salvador
2012-08-05 19:05 ` [U-Boot] [PATCH v1 3/6] mxs: prefix register structs " Otavio Salvador
` (3 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Otavio Salvador @ 2012-08-05 19:05 UTC (permalink / raw)
To: u-boot
As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---
Changes in v1:
- rebase against imx/master
arch/arm/cpu/arm926ejs/mxs/clock.c | 4 +-
arch/arm/cpu/arm926ejs/mxs/iomux.c | 6 +-
arch/arm/cpu/arm926ejs/mxs/mx28.c | 6 +-
arch/arm/include/asm/arch-mxs/regs-apbh.h | 254 +++++++++++++-------------
arch/arm/include/asm/arch-mxs/regs-bch.h | 42 ++---
arch/arm/include/asm/arch-mxs/regs-clkctrl.h | 58 +++---
arch/arm/include/asm/arch-mxs/regs-common.h | 34 ++--
arch/arm/include/asm/arch-mxs/regs-digctl.h | 50 ++---
arch/arm/include/asm/arch-mxs/regs-gpmi.h | 26 +--
arch/arm/include/asm/arch-mxs/regs-i2c.h | 28 +--
arch/arm/include/asm/arch-mxs/regs-lcdif.h | 64 +++----
arch/arm/include/asm/arch-mxs/regs-lradc.h | 48 ++---
arch/arm/include/asm/arch-mxs/regs-ocotp.h | 86 ++++-----
arch/arm/include/asm/arch-mxs/regs-pinctrl.h | 168 ++++++++---------
arch/arm/include/asm/arch-mxs/regs-power.h | 28 +--
arch/arm/include/asm/arch-mxs/regs-rtc.h | 28 +--
arch/arm/include/asm/arch-mxs/regs-ssp.h | 40 ++--
arch/arm/include/asm/arch-mxs/regs-timrot.h | 38 ++--
arch/arm/include/asm/arch-mxs/regs-usbphy.h | 20 +-
arch/arm/include/asm/arch-mxs/sys_proto.h | 6 +-
drivers/gpio/mxs_gpio.c | 16 +-
drivers/usb/host/ehci-mxs.c | 8 +-
22 files changed, 529 insertions(+), 529 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 0439f9c..3e29c56 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -207,7 +207,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
return;
clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register_32));
+ (ssp * sizeof(struct mxs_register_32));
clrbits_le32(clkreg, CLKCTRL_SSP_CLKGATE);
while (readl(clkreg) & CLKCTRL_SSP_CLKGATE)
@@ -256,7 +256,7 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
return XTAL_FREQ_KHZ;
clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
- (ssp * sizeof(struct mx28_register_32));
+ (ssp * sizeof(struct mxs_register_32));
tmp = readl(clkreg) & CLKCTRL_SSP_DIV_MASK;
diff --git a/arch/arm/cpu/arm926ejs/mxs/iomux.c b/arch/arm/cpu/arm926ejs/mxs/iomux.c
index 12916b6..73f1446 100644
--- a/arch/arm/cpu/arm926ejs/mxs/iomux.c
+++ b/arch/arm/cpu/arm926ejs/mxs/iomux.c
@@ -43,7 +43,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
{
u32 reg, ofs, bp, bm;
void *iomux_base = (void *)MXS_PINCTRL_BASE;
- struct mx28_register_32 *mxs_reg;
+ struct mxs_register_32 *mxs_reg;
/* muxsel */
ofs = 0x100;
@@ -70,7 +70,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
/* vol */
if (PAD_VOL_VALID(pad)) {
bp = PAD_PIN(pad) % 8 * 4 + 2;
- mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
+ mxs_reg = (struct mxs_register_32 *)(iomux_base + ofs);
if (PAD_VOL(pad))
writel(1 << bp, &mxs_reg->reg_set);
else
@@ -82,7 +82,7 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad)
ofs = PULL_OFFSET;
ofs += PAD_BANK(pad) * 0x10;
bp = PAD_PIN(pad);
- mxs_reg = (struct mx28_register_32 *)(iomux_base + ofs);
+ mxs_reg = (struct mxs_register_32 *)(iomux_base + ofs);
if (PAD_PULL(pad))
writel(1 << bp, &mxs_reg->reg_set);
else
diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28.c b/arch/arm/cpu/arm926ejs/mxs/mx28.c
index cf7a50f..65fcd75 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mx28.c
@@ -81,7 +81,7 @@ void enable_caches(void)
#endif
}
-int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, int timeout)
{
while (--timeout) {
if ((readl(®->reg) & mask) == mask)
@@ -92,7 +92,7 @@ int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout)
return !timeout;
}
-int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int timeout)
+int mx28_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, int timeout)
{
while (--timeout) {
if ((readl(®->reg) & mask) == 0)
@@ -103,7 +103,7 @@ int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int timeout)
return !timeout;
}
-int mx28_reset_block(struct mx28_register_32 *reg)
+int mx28_reset_block(struct mxs_register_32 *reg)
{
/* Clear SFTRST */
writel(MX28_BLOCK_SFTRST, ®->reg_clr);
diff --git a/arch/arm/include/asm/arch-mxs/regs-apbh.h b/arch/arm/include/asm/arch-mxs/regs-apbh.h
index 91d7bc8..7c6bd04 100644
--- a/arch/arm/include/asm/arch-mxs/regs-apbh.h
+++ b/arch/arm/include/asm/arch-mxs/regs-apbh.h
@@ -30,142 +30,142 @@
#ifndef __ASSEMBLY__
struct mx28_apbh_regs {
- mx28_reg_32(hw_apbh_ctrl0)
- mx28_reg_32(hw_apbh_ctrl1)
- mx28_reg_32(hw_apbh_ctrl2)
- mx28_reg_32(hw_apbh_channel_ctrl)
- mx28_reg_32(hw_apbh_devsel)
- mx28_reg_32(hw_apbh_dma_burst_size)
- mx28_reg_32(hw_apbh_debug)
+ mxs_reg_32(hw_apbh_ctrl0)
+ mxs_reg_32(hw_apbh_ctrl1)
+ mxs_reg_32(hw_apbh_ctrl2)
+ mxs_reg_32(hw_apbh_channel_ctrl)
+ mxs_reg_32(hw_apbh_devsel)
+ mxs_reg_32(hw_apbh_dma_burst_size)
+ mxs_reg_32(hw_apbh_debug)
uint32_t reserved[36];
union {
struct {
- mx28_reg_32(hw_apbh_ch_curcmdar)
- mx28_reg_32(hw_apbh_ch_nxtcmdar)
- mx28_reg_32(hw_apbh_ch_cmd)
- mx28_reg_32(hw_apbh_ch_bar)
- mx28_reg_32(hw_apbh_ch_sema)
- mx28_reg_32(hw_apbh_ch_debug1)
- mx28_reg_32(hw_apbh_ch_debug2)
+ mxs_reg_32(hw_apbh_ch_curcmdar)
+ mxs_reg_32(hw_apbh_ch_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch_cmd)
+ mxs_reg_32(hw_apbh_ch_bar)
+ mxs_reg_32(hw_apbh_ch_sema)
+ mxs_reg_32(hw_apbh_ch_debug1)
+ mxs_reg_32(hw_apbh_ch_debug2)
} ch[16];
struct {
- mx28_reg_32(hw_apbh_ch0_curcmdar)
- mx28_reg_32(hw_apbh_ch0_nxtcmdar)
- mx28_reg_32(hw_apbh_ch0_cmd)
- mx28_reg_32(hw_apbh_ch0_bar)
- mx28_reg_32(hw_apbh_ch0_sema)
- mx28_reg_32(hw_apbh_ch0_debug1)
- mx28_reg_32(hw_apbh_ch0_debug2)
- mx28_reg_32(hw_apbh_ch1_curcmdar)
- mx28_reg_32(hw_apbh_ch1_nxtcmdar)
- mx28_reg_32(hw_apbh_ch1_cmd)
- mx28_reg_32(hw_apbh_ch1_bar)
- mx28_reg_32(hw_apbh_ch1_sema)
- mx28_reg_32(hw_apbh_ch1_debug1)
- mx28_reg_32(hw_apbh_ch1_debug2)
- mx28_reg_32(hw_apbh_ch2_curcmdar)
- mx28_reg_32(hw_apbh_ch2_nxtcmdar)
- mx28_reg_32(hw_apbh_ch2_cmd)
- mx28_reg_32(hw_apbh_ch2_bar)
- mx28_reg_32(hw_apbh_ch2_sema)
- mx28_reg_32(hw_apbh_ch2_debug1)
- mx28_reg_32(hw_apbh_ch2_debug2)
- mx28_reg_32(hw_apbh_ch3_curcmdar)
- mx28_reg_32(hw_apbh_ch3_nxtcmdar)
- mx28_reg_32(hw_apbh_ch3_cmd)
- mx28_reg_32(hw_apbh_ch3_bar)
- mx28_reg_32(hw_apbh_ch3_sema)
- mx28_reg_32(hw_apbh_ch3_debug1)
- mx28_reg_32(hw_apbh_ch3_debug2)
- mx28_reg_32(hw_apbh_ch4_curcmdar)
- mx28_reg_32(hw_apbh_ch4_nxtcmdar)
- mx28_reg_32(hw_apbh_ch4_cmd)
- mx28_reg_32(hw_apbh_ch4_bar)
- mx28_reg_32(hw_apbh_ch4_sema)
- mx28_reg_32(hw_apbh_ch4_debug1)
- mx28_reg_32(hw_apbh_ch4_debug2)
- mx28_reg_32(hw_apbh_ch5_curcmdar)
- mx28_reg_32(hw_apbh_ch5_nxtcmdar)
- mx28_reg_32(hw_apbh_ch5_cmd)
- mx28_reg_32(hw_apbh_ch5_bar)
- mx28_reg_32(hw_apbh_ch5_sema)
- mx28_reg_32(hw_apbh_ch5_debug1)
- mx28_reg_32(hw_apbh_ch5_debug2)
- mx28_reg_32(hw_apbh_ch6_curcmdar)
- mx28_reg_32(hw_apbh_ch6_nxtcmdar)
- mx28_reg_32(hw_apbh_ch6_cmd)
- mx28_reg_32(hw_apbh_ch6_bar)
- mx28_reg_32(hw_apbh_ch6_sema)
- mx28_reg_32(hw_apbh_ch6_debug1)
- mx28_reg_32(hw_apbh_ch6_debug2)
- mx28_reg_32(hw_apbh_ch7_curcmdar)
- mx28_reg_32(hw_apbh_ch7_nxtcmdar)
- mx28_reg_32(hw_apbh_ch7_cmd)
- mx28_reg_32(hw_apbh_ch7_bar)
- mx28_reg_32(hw_apbh_ch7_sema)
- mx28_reg_32(hw_apbh_ch7_debug1)
- mx28_reg_32(hw_apbh_ch7_debug2)
- mx28_reg_32(hw_apbh_ch8_curcmdar)
- mx28_reg_32(hw_apbh_ch8_nxtcmdar)
- mx28_reg_32(hw_apbh_ch8_cmd)
- mx28_reg_32(hw_apbh_ch8_bar)
- mx28_reg_32(hw_apbh_ch8_sema)
- mx28_reg_32(hw_apbh_ch8_debug1)
- mx28_reg_32(hw_apbh_ch8_debug2)
- mx28_reg_32(hw_apbh_ch9_curcmdar)
- mx28_reg_32(hw_apbh_ch9_nxtcmdar)
- mx28_reg_32(hw_apbh_ch9_cmd)
- mx28_reg_32(hw_apbh_ch9_bar)
- mx28_reg_32(hw_apbh_ch9_sema)
- mx28_reg_32(hw_apbh_ch9_debug1)
- mx28_reg_32(hw_apbh_ch9_debug2)
- mx28_reg_32(hw_apbh_ch10_curcmdar)
- mx28_reg_32(hw_apbh_ch10_nxtcmdar)
- mx28_reg_32(hw_apbh_ch10_cmd)
- mx28_reg_32(hw_apbh_ch10_bar)
- mx28_reg_32(hw_apbh_ch10_sema)
- mx28_reg_32(hw_apbh_ch10_debug1)
- mx28_reg_32(hw_apbh_ch10_debug2)
- mx28_reg_32(hw_apbh_ch11_curcmdar)
- mx28_reg_32(hw_apbh_ch11_nxtcmdar)
- mx28_reg_32(hw_apbh_ch11_cmd)
- mx28_reg_32(hw_apbh_ch11_bar)
- mx28_reg_32(hw_apbh_ch11_sema)
- mx28_reg_32(hw_apbh_ch11_debug1)
- mx28_reg_32(hw_apbh_ch11_debug2)
- mx28_reg_32(hw_apbh_ch12_curcmdar)
- mx28_reg_32(hw_apbh_ch12_nxtcmdar)
- mx28_reg_32(hw_apbh_ch12_cmd)
- mx28_reg_32(hw_apbh_ch12_bar)
- mx28_reg_32(hw_apbh_ch12_sema)
- mx28_reg_32(hw_apbh_ch12_debug1)
- mx28_reg_32(hw_apbh_ch12_debug2)
- mx28_reg_32(hw_apbh_ch13_curcmdar)
- mx28_reg_32(hw_apbh_ch13_nxtcmdar)
- mx28_reg_32(hw_apbh_ch13_cmd)
- mx28_reg_32(hw_apbh_ch13_bar)
- mx28_reg_32(hw_apbh_ch13_sema)
- mx28_reg_32(hw_apbh_ch13_debug1)
- mx28_reg_32(hw_apbh_ch13_debug2)
- mx28_reg_32(hw_apbh_ch14_curcmdar)
- mx28_reg_32(hw_apbh_ch14_nxtcmdar)
- mx28_reg_32(hw_apbh_ch14_cmd)
- mx28_reg_32(hw_apbh_ch14_bar)
- mx28_reg_32(hw_apbh_ch14_sema)
- mx28_reg_32(hw_apbh_ch14_debug1)
- mx28_reg_32(hw_apbh_ch14_debug2)
- mx28_reg_32(hw_apbh_ch15_curcmdar)
- mx28_reg_32(hw_apbh_ch15_nxtcmdar)
- mx28_reg_32(hw_apbh_ch15_cmd)
- mx28_reg_32(hw_apbh_ch15_bar)
- mx28_reg_32(hw_apbh_ch15_sema)
- mx28_reg_32(hw_apbh_ch15_debug1)
- mx28_reg_32(hw_apbh_ch15_debug2)
+ mxs_reg_32(hw_apbh_ch0_curcmdar)
+ mxs_reg_32(hw_apbh_ch0_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch0_cmd)
+ mxs_reg_32(hw_apbh_ch0_bar)
+ mxs_reg_32(hw_apbh_ch0_sema)
+ mxs_reg_32(hw_apbh_ch0_debug1)
+ mxs_reg_32(hw_apbh_ch0_debug2)
+ mxs_reg_32(hw_apbh_ch1_curcmdar)
+ mxs_reg_32(hw_apbh_ch1_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch1_cmd)
+ mxs_reg_32(hw_apbh_ch1_bar)
+ mxs_reg_32(hw_apbh_ch1_sema)
+ mxs_reg_32(hw_apbh_ch1_debug1)
+ mxs_reg_32(hw_apbh_ch1_debug2)
+ mxs_reg_32(hw_apbh_ch2_curcmdar)
+ mxs_reg_32(hw_apbh_ch2_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch2_cmd)
+ mxs_reg_32(hw_apbh_ch2_bar)
+ mxs_reg_32(hw_apbh_ch2_sema)
+ mxs_reg_32(hw_apbh_ch2_debug1)
+ mxs_reg_32(hw_apbh_ch2_debug2)
+ mxs_reg_32(hw_apbh_ch3_curcmdar)
+ mxs_reg_32(hw_apbh_ch3_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch3_cmd)
+ mxs_reg_32(hw_apbh_ch3_bar)
+ mxs_reg_32(hw_apbh_ch3_sema)
+ mxs_reg_32(hw_apbh_ch3_debug1)
+ mxs_reg_32(hw_apbh_ch3_debug2)
+ mxs_reg_32(hw_apbh_ch4_curcmdar)
+ mxs_reg_32(hw_apbh_ch4_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch4_cmd)
+ mxs_reg_32(hw_apbh_ch4_bar)
+ mxs_reg_32(hw_apbh_ch4_sema)
+ mxs_reg_32(hw_apbh_ch4_debug1)
+ mxs_reg_32(hw_apbh_ch4_debug2)
+ mxs_reg_32(hw_apbh_ch5_curcmdar)
+ mxs_reg_32(hw_apbh_ch5_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch5_cmd)
+ mxs_reg_32(hw_apbh_ch5_bar)
+ mxs_reg_32(hw_apbh_ch5_sema)
+ mxs_reg_32(hw_apbh_ch5_debug1)
+ mxs_reg_32(hw_apbh_ch5_debug2)
+ mxs_reg_32(hw_apbh_ch6_curcmdar)
+ mxs_reg_32(hw_apbh_ch6_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch6_cmd)
+ mxs_reg_32(hw_apbh_ch6_bar)
+ mxs_reg_32(hw_apbh_ch6_sema)
+ mxs_reg_32(hw_apbh_ch6_debug1)
+ mxs_reg_32(hw_apbh_ch6_debug2)
+ mxs_reg_32(hw_apbh_ch7_curcmdar)
+ mxs_reg_32(hw_apbh_ch7_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch7_cmd)
+ mxs_reg_32(hw_apbh_ch7_bar)
+ mxs_reg_32(hw_apbh_ch7_sema)
+ mxs_reg_32(hw_apbh_ch7_debug1)
+ mxs_reg_32(hw_apbh_ch7_debug2)
+ mxs_reg_32(hw_apbh_ch8_curcmdar)
+ mxs_reg_32(hw_apbh_ch8_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch8_cmd)
+ mxs_reg_32(hw_apbh_ch8_bar)
+ mxs_reg_32(hw_apbh_ch8_sema)
+ mxs_reg_32(hw_apbh_ch8_debug1)
+ mxs_reg_32(hw_apbh_ch8_debug2)
+ mxs_reg_32(hw_apbh_ch9_curcmdar)
+ mxs_reg_32(hw_apbh_ch9_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch9_cmd)
+ mxs_reg_32(hw_apbh_ch9_bar)
+ mxs_reg_32(hw_apbh_ch9_sema)
+ mxs_reg_32(hw_apbh_ch9_debug1)
+ mxs_reg_32(hw_apbh_ch9_debug2)
+ mxs_reg_32(hw_apbh_ch10_curcmdar)
+ mxs_reg_32(hw_apbh_ch10_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch10_cmd)
+ mxs_reg_32(hw_apbh_ch10_bar)
+ mxs_reg_32(hw_apbh_ch10_sema)
+ mxs_reg_32(hw_apbh_ch10_debug1)
+ mxs_reg_32(hw_apbh_ch10_debug2)
+ mxs_reg_32(hw_apbh_ch11_curcmdar)
+ mxs_reg_32(hw_apbh_ch11_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch11_cmd)
+ mxs_reg_32(hw_apbh_ch11_bar)
+ mxs_reg_32(hw_apbh_ch11_sema)
+ mxs_reg_32(hw_apbh_ch11_debug1)
+ mxs_reg_32(hw_apbh_ch11_debug2)
+ mxs_reg_32(hw_apbh_ch12_curcmdar)
+ mxs_reg_32(hw_apbh_ch12_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch12_cmd)
+ mxs_reg_32(hw_apbh_ch12_bar)
+ mxs_reg_32(hw_apbh_ch12_sema)
+ mxs_reg_32(hw_apbh_ch12_debug1)
+ mxs_reg_32(hw_apbh_ch12_debug2)
+ mxs_reg_32(hw_apbh_ch13_curcmdar)
+ mxs_reg_32(hw_apbh_ch13_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch13_cmd)
+ mxs_reg_32(hw_apbh_ch13_bar)
+ mxs_reg_32(hw_apbh_ch13_sema)
+ mxs_reg_32(hw_apbh_ch13_debug1)
+ mxs_reg_32(hw_apbh_ch13_debug2)
+ mxs_reg_32(hw_apbh_ch14_curcmdar)
+ mxs_reg_32(hw_apbh_ch14_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch14_cmd)
+ mxs_reg_32(hw_apbh_ch14_bar)
+ mxs_reg_32(hw_apbh_ch14_sema)
+ mxs_reg_32(hw_apbh_ch14_debug1)
+ mxs_reg_32(hw_apbh_ch14_debug2)
+ mxs_reg_32(hw_apbh_ch15_curcmdar)
+ mxs_reg_32(hw_apbh_ch15_nxtcmdar)
+ mxs_reg_32(hw_apbh_ch15_cmd)
+ mxs_reg_32(hw_apbh_ch15_bar)
+ mxs_reg_32(hw_apbh_ch15_sema)
+ mxs_reg_32(hw_apbh_ch15_debug1)
+ mxs_reg_32(hw_apbh_ch15_debug2)
};
};
- mx28_reg_32(hw_apbh_version)
+ mxs_reg_32(hw_apbh_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-bch.h b/arch/arm/include/asm/arch-mxs/regs-bch.h
index 9243bdd..58517c4 100644
--- a/arch/arm/include/asm/arch-mxs/regs-bch.h
+++ b/arch/arm/include/asm/arch-mxs/regs-bch.h
@@ -30,30 +30,30 @@
#ifndef __ASSEMBLY__
struct mx28_bch_regs {
- mx28_reg_32(hw_bch_ctrl)
- mx28_reg_32(hw_bch_status0)
- mx28_reg_32(hw_bch_mode)
- mx28_reg_32(hw_bch_encodeptr)
- mx28_reg_32(hw_bch_dataptr)
- mx28_reg_32(hw_bch_metaptr)
+ mxs_reg_32(hw_bch_ctrl)
+ mxs_reg_32(hw_bch_status0)
+ mxs_reg_32(hw_bch_mode)
+ mxs_reg_32(hw_bch_encodeptr)
+ mxs_reg_32(hw_bch_dataptr)
+ mxs_reg_32(hw_bch_metaptr)
uint32_t reserved[4];
- mx28_reg_32(hw_bch_layoutselect)
- mx28_reg_32(hw_bch_flash0layout0)
- mx28_reg_32(hw_bch_flash0layout1)
- mx28_reg_32(hw_bch_flash1layout0)
- mx28_reg_32(hw_bch_flash1layout1)
- mx28_reg_32(hw_bch_flash2layout0)
- mx28_reg_32(hw_bch_flash2layout1)
- mx28_reg_32(hw_bch_flash3layout0)
- mx28_reg_32(hw_bch_flash3layout1)
- mx28_reg_32(hw_bch_dbgkesread)
- mx28_reg_32(hw_bch_dbgcsferead)
- mx28_reg_32(hw_bch_dbgsyndegread)
- mx28_reg_32(hw_bch_dbgahbmread)
- mx28_reg_32(hw_bch_blockname)
- mx28_reg_32(hw_bch_version)
+ mxs_reg_32(hw_bch_layoutselect)
+ mxs_reg_32(hw_bch_flash0layout0)
+ mxs_reg_32(hw_bch_flash0layout1)
+ mxs_reg_32(hw_bch_flash1layout0)
+ mxs_reg_32(hw_bch_flash1layout1)
+ mxs_reg_32(hw_bch_flash2layout0)
+ mxs_reg_32(hw_bch_flash2layout1)
+ mxs_reg_32(hw_bch_flash3layout0)
+ mxs_reg_32(hw_bch_flash3layout1)
+ mxs_reg_32(hw_bch_dbgkesread)
+ mxs_reg_32(hw_bch_dbgcsferead)
+ mxs_reg_32(hw_bch_dbgsyndegread)
+ mxs_reg_32(hw_bch_dbgahbmread)
+ mxs_reg_32(hw_bch_blockname)
+ mxs_reg_32(hw_bch_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl.h b/arch/arm/include/asm/arch-mxs/regs-clkctrl.h
index 3c4947d..127370b 100644
--- a/arch/arm/include/asm/arch-mxs/regs-clkctrl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl.h
@@ -30,38 +30,38 @@
#ifndef __ASSEMBLY__
struct mx28_clkctrl_regs {
- mx28_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */
- mx28_reg_32(hw_clkctrl_pll0ctrl1) /* 0x10 */
- mx28_reg_32(hw_clkctrl_pll1ctrl0) /* 0x20 */
- mx28_reg_32(hw_clkctrl_pll1ctrl1) /* 0x30 */
- mx28_reg_32(hw_clkctrl_pll2ctrl0) /* 0x40 */
- mx28_reg_32(hw_clkctrl_cpu) /* 0x50 */
- mx28_reg_32(hw_clkctrl_hbus) /* 0x60 */
- mx28_reg_32(hw_clkctrl_xbus) /* 0x70 */
- mx28_reg_32(hw_clkctrl_xtal) /* 0x80 */
- mx28_reg_32(hw_clkctrl_ssp0) /* 0x90 */
- mx28_reg_32(hw_clkctrl_ssp1) /* 0xa0 */
- mx28_reg_32(hw_clkctrl_ssp2) /* 0xb0 */
- mx28_reg_32(hw_clkctrl_ssp3) /* 0xc0 */
- mx28_reg_32(hw_clkctrl_gpmi) /* 0xd0 */
- mx28_reg_32(hw_clkctrl_spdif) /* 0xe0 */
- mx28_reg_32(hw_clkctrl_emi) /* 0xf0 */
- mx28_reg_32(hw_clkctrl_saif0) /* 0x100 */
- mx28_reg_32(hw_clkctrl_saif1) /* 0x110 */
- mx28_reg_32(hw_clkctrl_lcdif) /* 0x120 */
- mx28_reg_32(hw_clkctrl_etm) /* 0x130 */
- mx28_reg_32(hw_clkctrl_enet) /* 0x140 */
- mx28_reg_32(hw_clkctrl_hsadc) /* 0x150 */
- mx28_reg_32(hw_clkctrl_flexcan) /* 0x160 */
+ mxs_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */
+ mxs_reg_32(hw_clkctrl_pll0ctrl1) /* 0x10 */
+ mxs_reg_32(hw_clkctrl_pll1ctrl0) /* 0x20 */
+ mxs_reg_32(hw_clkctrl_pll1ctrl1) /* 0x30 */
+ mxs_reg_32(hw_clkctrl_pll2ctrl0) /* 0x40 */
+ mxs_reg_32(hw_clkctrl_cpu) /* 0x50 */
+ mxs_reg_32(hw_clkctrl_hbus) /* 0x60 */
+ mxs_reg_32(hw_clkctrl_xbus) /* 0x70 */
+ mxs_reg_32(hw_clkctrl_xtal) /* 0x80 */
+ mxs_reg_32(hw_clkctrl_ssp0) /* 0x90 */
+ mxs_reg_32(hw_clkctrl_ssp1) /* 0xa0 */
+ mxs_reg_32(hw_clkctrl_ssp2) /* 0xb0 */
+ mxs_reg_32(hw_clkctrl_ssp3) /* 0xc0 */
+ mxs_reg_32(hw_clkctrl_gpmi) /* 0xd0 */
+ mxs_reg_32(hw_clkctrl_spdif) /* 0xe0 */
+ mxs_reg_32(hw_clkctrl_emi) /* 0xf0 */
+ mxs_reg_32(hw_clkctrl_saif0) /* 0x100 */
+ mxs_reg_32(hw_clkctrl_saif1) /* 0x110 */
+ mxs_reg_32(hw_clkctrl_lcdif) /* 0x120 */
+ mxs_reg_32(hw_clkctrl_etm) /* 0x130 */
+ mxs_reg_32(hw_clkctrl_enet) /* 0x140 */
+ mxs_reg_32(hw_clkctrl_hsadc) /* 0x150 */
+ mxs_reg_32(hw_clkctrl_flexcan) /* 0x160 */
uint32_t reserved[16];
- mx28_reg_8(hw_clkctrl_frac0) /* 0x1b0 */
- mx28_reg_8(hw_clkctrl_frac1) /* 0x1c0 */
- mx28_reg_32(hw_clkctrl_clkseq) /* 0x1d0 */
- mx28_reg_32(hw_clkctrl_reset) /* 0x1e0 */
- mx28_reg_32(hw_clkctrl_status) /* 0x1f0 */
- mx28_reg_32(hw_clkctrl_version) /* 0x200 */
+ mxs_reg_8(hw_clkctrl_frac0) /* 0x1b0 */
+ mxs_reg_8(hw_clkctrl_frac1) /* 0x1c0 */
+ mxs_reg_32(hw_clkctrl_clkseq) /* 0x1d0 */
+ mxs_reg_32(hw_clkctrl_reset) /* 0x1e0 */
+ mxs_reg_32(hw_clkctrl_status) /* 0x1f0 */
+ mxs_reg_32(hw_clkctrl_version) /* 0x200 */
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-common.h b/arch/arm/include/asm/arch-mxs/regs-common.h
index d2e1953..bcea419 100644
--- a/arch/arm/include/asm/arch-mxs/regs-common.h
+++ b/arch/arm/include/asm/arch-mxs/regs-common.h
@@ -1,5 +1,5 @@
/*
- * Freescale i.MX28 Register Accessors
+ * Freescale i.MXS Register Accessors
*
* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
* on behalf of DENX Software Engineering GmbH
@@ -20,11 +20,11 @@
*
*/
-#ifndef __MX28_REGS_COMMON_H__
-#define __MX28_REGS_COMMON_H__
+#ifndef __MXS_REGS_COMMON_H__
+#define __MXS_REGS_COMMON_H__
/*
- * The i.MX28 has interesting feature when it comes to register access. There
+ * The i.MXS has interesting feature when it comes to register access. There
* are four kinds of access to one particular register. Those are:
*
* 1) Common read/write access. To use this mode, just write to the address of
@@ -47,36 +47,36 @@
*
*/
-#define __mx28_reg_8(name) \
+#define __mxs_reg_8(name) \
uint8_t name[4]; \
uint8_t name##_set[4]; \
uint8_t name##_clr[4]; \
uint8_t name##_tog[4]; \
-#define __mx28_reg_32(name) \
+#define __mxs_reg_32(name) \
uint32_t name; \
uint32_t name##_set; \
uint32_t name##_clr; \
uint32_t name##_tog;
-struct mx28_register_8 {
- __mx28_reg_8(reg)
+struct mxs_register_8 {
+ __mxs_reg_8(reg)
};
-struct mx28_register_32 {
- __mx28_reg_32(reg)
+struct mxs_register_32 {
+ __mxs_reg_32(reg)
};
-#define mx28_reg_8(name) \
+#define mxs_reg_8(name) \
union { \
- struct { __mx28_reg_8(name) }; \
- struct mx28_register_8 name##_reg; \
+ struct { __mxs_reg_8(name) }; \
+ struct mxs_register_8 name##_reg; \
};
-#define mx28_reg_32(name) \
+#define mxs_reg_32(name) \
union { \
- struct { __mx28_reg_32(name) }; \
- struct mx28_register_32 name##_reg; \
+ struct { __mxs_reg_32(name) }; \
+ struct mxs_register_32 name##_reg; \
};
-#endif /* __MX28_REGS_COMMON_H__ */
+#endif /* __MXS_REGS_COMMON_H__ */
diff --git a/arch/arm/include/asm/arch-mxs/regs-digctl.h b/arch/arm/include/asm/arch-mxs/regs-digctl.h
index 247da6e..5e4f564 100644
--- a/arch/arm/include/asm/arch-mxs/regs-digctl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-digctl.h
@@ -26,16 +26,16 @@
#ifndef __ASSEMBLY__
struct mx28_digctl_regs {
- mx28_reg_32(hw_digctl_ctrl) /* 0x000 */
- mx28_reg_32(hw_digctl_status) /* 0x010 */
- mx28_reg_32(hw_digctl_hclkcount) /* 0x020 */
- mx28_reg_32(hw_digctl_ramctrl) /* 0x030 */
- mx28_reg_32(hw_digctl_emi_status) /* 0x040 */
- mx28_reg_32(hw_digctl_read_margin) /* 0x050 */
+ mxs_reg_32(hw_digctl_ctrl) /* 0x000 */
+ mxs_reg_32(hw_digctl_status) /* 0x010 */
+ mxs_reg_32(hw_digctl_hclkcount) /* 0x020 */
+ mxs_reg_32(hw_digctl_ramctrl) /* 0x030 */
+ mxs_reg_32(hw_digctl_emi_status) /* 0x040 */
+ mxs_reg_32(hw_digctl_read_margin) /* 0x050 */
uint32_t hw_digctl_writeonce; /* 0x060 */
uint32_t reserved_writeonce[3];
- mx28_reg_32(hw_digctl_bist_ctl) /* 0x070 */
- mx28_reg_32(hw_digctl_bist_status) /* 0x080 */
+ mxs_reg_32(hw_digctl_bist_ctl) /* 0x070 */
+ mxs_reg_32(hw_digctl_bist_status) /* 0x080 */
uint32_t hw_digctl_entropy; /* 0x090 */
uint32_t reserved_entropy[3];
uint32_t hw_digctl_entropy_latched; /* 0x0a0 */
@@ -43,7 +43,7 @@ struct mx28_digctl_regs {
uint32_t reserved1[4];
- mx28_reg_32(hw_digctl_microseconds) /* 0x0c0 */
+ mxs_reg_32(hw_digctl_microseconds) /* 0x0c0 */
uint32_t hw_digctl_dbgrd; /* 0x0d0 */
uint32_t reserved_hw_digctl_dbgrd[3];
uint32_t hw_digctl_dbg; /* 0x0e0 */
@@ -51,21 +51,21 @@ struct mx28_digctl_regs {
uint32_t reserved2[4];
- mx28_reg_32(hw_digctl_usb_loopback) /* 0x100 */
- mx28_reg_32(hw_digctl_ocram_status0) /* 0x110 */
- mx28_reg_32(hw_digctl_ocram_status1) /* 0x120 */
- mx28_reg_32(hw_digctl_ocram_status2) /* 0x130 */
- mx28_reg_32(hw_digctl_ocram_status3) /* 0x140 */
- mx28_reg_32(hw_digctl_ocram_status4) /* 0x150 */
- mx28_reg_32(hw_digctl_ocram_status5) /* 0x160 */
- mx28_reg_32(hw_digctl_ocram_status6) /* 0x170 */
- mx28_reg_32(hw_digctl_ocram_status7) /* 0x180 */
- mx28_reg_32(hw_digctl_ocram_status8) /* 0x190 */
- mx28_reg_32(hw_digctl_ocram_status9) /* 0x1a0 */
- mx28_reg_32(hw_digctl_ocram_status10) /* 0x1b0 */
- mx28_reg_32(hw_digctl_ocram_status11) /* 0x1c0 */
- mx28_reg_32(hw_digctl_ocram_status12) /* 0x1d0 */
- mx28_reg_32(hw_digctl_ocram_status13) /* 0x1e0 */
+ mxs_reg_32(hw_digctl_usb_loopback) /* 0x100 */
+ mxs_reg_32(hw_digctl_ocram_status0) /* 0x110 */
+ mxs_reg_32(hw_digctl_ocram_status1) /* 0x120 */
+ mxs_reg_32(hw_digctl_ocram_status2) /* 0x130 */
+ mxs_reg_32(hw_digctl_ocram_status3) /* 0x140 */
+ mxs_reg_32(hw_digctl_ocram_status4) /* 0x150 */
+ mxs_reg_32(hw_digctl_ocram_status5) /* 0x160 */
+ mxs_reg_32(hw_digctl_ocram_status6) /* 0x170 */
+ mxs_reg_32(hw_digctl_ocram_status7) /* 0x180 */
+ mxs_reg_32(hw_digctl_ocram_status8) /* 0x190 */
+ mxs_reg_32(hw_digctl_ocram_status9) /* 0x1a0 */
+ mxs_reg_32(hw_digctl_ocram_status10) /* 0x1b0 */
+ mxs_reg_32(hw_digctl_ocram_status11) /* 0x1c0 */
+ mxs_reg_32(hw_digctl_ocram_status12) /* 0x1d0 */
+ mxs_reg_32(hw_digctl_ocram_status13) /* 0x1e0 */
uint32_t reserved3[36];
@@ -75,7 +75,7 @@ struct mx28_digctl_regs {
uint32_t reserved_hw_digctl_scratch1[3];
uint32_t hw_digctl_armcache; /* 0x2a0 */
uint32_t reserved_hw_digctl_armcache[3];
- mx28_reg_32(hw_digctl_debug_trap) /* 0x2b0 */
+ mxs_reg_32(hw_digctl_debug_trap) /* 0x2b0 */
uint32_t hw_digctl_debug_trap_l0_addr_low; /* 0x2c0 */
uint32_t reserved_hw_digctl_debug_trap_l0_addr_low[3];
uint32_t hw_digctl_debug_trap_l0_addr_high; /* 0x2d0 */
diff --git a/arch/arm/include/asm/arch-mxs/regs-gpmi.h b/arch/arm/include/asm/arch-mxs/regs-gpmi.h
index 1b487f4..190a570 100644
--- a/arch/arm/include/asm/arch-mxs/regs-gpmi.h
+++ b/arch/arm/include/asm/arch-mxs/regs-gpmi.h
@@ -30,22 +30,22 @@
#ifndef __ASSEMBLY__
struct mx28_gpmi_regs {
- mx28_reg_32(hw_gpmi_ctrl0)
- mx28_reg_32(hw_gpmi_compare)
- mx28_reg_32(hw_gpmi_eccctrl)
- mx28_reg_32(hw_gpmi_ecccount)
- mx28_reg_32(hw_gpmi_payload)
- mx28_reg_32(hw_gpmi_auxiliary)
- mx28_reg_32(hw_gpmi_ctrl1)
- mx28_reg_32(hw_gpmi_timing0)
- mx28_reg_32(hw_gpmi_timing1)
+ mxs_reg_32(hw_gpmi_ctrl0)
+ mxs_reg_32(hw_gpmi_compare)
+ mxs_reg_32(hw_gpmi_eccctrl)
+ mxs_reg_32(hw_gpmi_ecccount)
+ mxs_reg_32(hw_gpmi_payload)
+ mxs_reg_32(hw_gpmi_auxiliary)
+ mxs_reg_32(hw_gpmi_ctrl1)
+ mxs_reg_32(hw_gpmi_timing0)
+ mxs_reg_32(hw_gpmi_timing1)
uint32_t reserved[4];
- mx28_reg_32(hw_gpmi_data)
- mx28_reg_32(hw_gpmi_stat)
- mx28_reg_32(hw_gpmi_debug)
- mx28_reg_32(hw_gpmi_version)
+ mxs_reg_32(hw_gpmi_data)
+ mxs_reg_32(hw_gpmi_stat)
+ mxs_reg_32(hw_gpmi_debug)
+ mxs_reg_32(hw_gpmi_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-i2c.h b/arch/arm/include/asm/arch-mxs/regs-i2c.h
index 2e2e814..418a3c0 100644
--- a/arch/arm/include/asm/arch-mxs/regs-i2c.h
+++ b/arch/arm/include/asm/arch-mxs/regs-i2c.h
@@ -27,20 +27,20 @@
#ifndef __ASSEMBLY__
struct mx28_i2c_regs {
- mx28_reg_32(hw_i2c_ctrl0)
- mx28_reg_32(hw_i2c_timing0)
- mx28_reg_32(hw_i2c_timing1)
- mx28_reg_32(hw_i2c_timing2)
- mx28_reg_32(hw_i2c_ctrl1)
- mx28_reg_32(hw_i2c_stat)
- mx28_reg_32(hw_i2c_queuectrl)
- mx28_reg_32(hw_i2c_queuestat)
- mx28_reg_32(hw_i2c_queuecmd)
- mx28_reg_32(hw_i2c_queuedata)
- mx28_reg_32(hw_i2c_data)
- mx28_reg_32(hw_i2c_debug0)
- mx28_reg_32(hw_i2c_debug1)
- mx28_reg_32(hw_i2c_version)
+ mxs_reg_32(hw_i2c_ctrl0)
+ mxs_reg_32(hw_i2c_timing0)
+ mxs_reg_32(hw_i2c_timing1)
+ mxs_reg_32(hw_i2c_timing2)
+ mxs_reg_32(hw_i2c_ctrl1)
+ mxs_reg_32(hw_i2c_stat)
+ mxs_reg_32(hw_i2c_queuectrl)
+ mxs_reg_32(hw_i2c_queuestat)
+ mxs_reg_32(hw_i2c_queuecmd)
+ mxs_reg_32(hw_i2c_queuedata)
+ mxs_reg_32(hw_i2c_data)
+ mxs_reg_32(hw_i2c_debug0)
+ mxs_reg_32(hw_i2c_debug1)
+ mxs_reg_32(hw_i2c_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-lcdif.h b/arch/arm/include/asm/arch-mxs/regs-lcdif.h
index cb47e41..87bfa0d 100644
--- a/arch/arm/include/asm/arch-mxs/regs-lcdif.h
+++ b/arch/arm/include/asm/arch-mxs/regs-lcdif.h
@@ -30,38 +30,38 @@
#ifndef __ASSEMBLY__
struct mx28_lcdif_regs {
- mx28_reg_32(hw_lcdif_ctrl) /* 0x00 */
- mx28_reg_32(hw_lcdif_ctrl1) /* 0x10 */
- mx28_reg_32(hw_lcdif_ctrl2) /* 0x20 */
- mx28_reg_32(hw_lcdif_transfer_count) /* 0x30 */
- mx28_reg_32(hw_lcdif_cur_buf) /* 0x40 */
- mx28_reg_32(hw_lcdif_next_buf) /* 0x50 */
- mx28_reg_32(hw_lcdif_timing) /* 0x60 */
- mx28_reg_32(hw_lcdif_vdctrl0) /* 0x70 */
- mx28_reg_32(hw_lcdif_vdctrl1) /* 0x80 */
- mx28_reg_32(hw_lcdif_vdctrl2) /* 0x90 */
- mx28_reg_32(hw_lcdif_vdctrl3) /* 0xa0 */
- mx28_reg_32(hw_lcdif_vdctrl4) /* 0xb0 */
- mx28_reg_32(hw_lcdif_dvictrl0) /* 0xc0 */
- mx28_reg_32(hw_lcdif_dvictrl1) /* 0xd0 */
- mx28_reg_32(hw_lcdif_dvictrl2) /* 0xe0 */
- mx28_reg_32(hw_lcdif_dvictrl3) /* 0xf0 */
- mx28_reg_32(hw_lcdif_dvictrl4) /* 0x100 */
- mx28_reg_32(hw_lcdif_csc_coeffctrl0) /* 0x110 */
- mx28_reg_32(hw_lcdif_csc_coeffctrl1) /* 0x120 */
- mx28_reg_32(hw_lcdif_csc_coeffctrl2) /* 0x130 */
- mx28_reg_32(hw_lcdif_csc_coeffctrl3) /* 0x140 */
- mx28_reg_32(hw_lcdif_csc_coeffctrl4) /* 0x150 */
- mx28_reg_32(hw_lcdif_csc_offset) /* 0x160 */
- mx28_reg_32(hw_lcdif_csc_limit) /* 0x170 */
- mx28_reg_32(hw_lcdif_data) /* 0x180 */
- mx28_reg_32(hw_lcdif_bm_error_stat) /* 0x190 */
- mx28_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */
- mx28_reg_32(hw_lcdif_lcdif_stat) /* 0x1b0 */
- mx28_reg_32(hw_lcdif_version) /* 0x1c0 */
- mx28_reg_32(hw_lcdif_debug0) /* 0x1d0 */
- mx28_reg_32(hw_lcdif_debug1) /* 0x1e0 */
- mx28_reg_32(hw_lcdif_debug2) /* 0x1f0 */
+ mxs_reg_32(hw_lcdif_ctrl) /* 0x00 */
+ mxs_reg_32(hw_lcdif_ctrl1) /* 0x10 */
+ mxs_reg_32(hw_lcdif_ctrl2) /* 0x20 */
+ mxs_reg_32(hw_lcdif_transfer_count) /* 0x30 */
+ mxs_reg_32(hw_lcdif_cur_buf) /* 0x40 */
+ mxs_reg_32(hw_lcdif_next_buf) /* 0x50 */
+ mxs_reg_32(hw_lcdif_timing) /* 0x60 */
+ mxs_reg_32(hw_lcdif_vdctrl0) /* 0x70 */
+ mxs_reg_32(hw_lcdif_vdctrl1) /* 0x80 */
+ mxs_reg_32(hw_lcdif_vdctrl2) /* 0x90 */
+ mxs_reg_32(hw_lcdif_vdctrl3) /* 0xa0 */
+ mxs_reg_32(hw_lcdif_vdctrl4) /* 0xb0 */
+ mxs_reg_32(hw_lcdif_dvictrl0) /* 0xc0 */
+ mxs_reg_32(hw_lcdif_dvictrl1) /* 0xd0 */
+ mxs_reg_32(hw_lcdif_dvictrl2) /* 0xe0 */
+ mxs_reg_32(hw_lcdif_dvictrl3) /* 0xf0 */
+ mxs_reg_32(hw_lcdif_dvictrl4) /* 0x100 */
+ mxs_reg_32(hw_lcdif_csc_coeffctrl0) /* 0x110 */
+ mxs_reg_32(hw_lcdif_csc_coeffctrl1) /* 0x120 */
+ mxs_reg_32(hw_lcdif_csc_coeffctrl2) /* 0x130 */
+ mxs_reg_32(hw_lcdif_csc_coeffctrl3) /* 0x140 */
+ mxs_reg_32(hw_lcdif_csc_coeffctrl4) /* 0x150 */
+ mxs_reg_32(hw_lcdif_csc_offset) /* 0x160 */
+ mxs_reg_32(hw_lcdif_csc_limit) /* 0x170 */
+ mxs_reg_32(hw_lcdif_data) /* 0x180 */
+ mxs_reg_32(hw_lcdif_bm_error_stat) /* 0x190 */
+ mxs_reg_32(hw_lcdif_crc_stat) /* 0x1a0 */
+ mxs_reg_32(hw_lcdif_lcdif_stat) /* 0x1b0 */
+ mxs_reg_32(hw_lcdif_version) /* 0x1c0 */
+ mxs_reg_32(hw_lcdif_debug0) /* 0x1d0 */
+ mxs_reg_32(hw_lcdif_debug1) /* 0x1e0 */
+ mxs_reg_32(hw_lcdif_debug2) /* 0x1f0 */
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-lradc.h b/arch/arm/include/asm/arch-mxs/regs-lradc.h
index 16e2bbf..0054c23 100644
--- a/arch/arm/include/asm/arch-mxs/regs-lradc.h
+++ b/arch/arm/include/asm/arch-mxs/regs-lradc.h
@@ -30,30 +30,30 @@
#ifndef __ASSEMBLY__
struct mx28_lradc_regs {
- mx28_reg_32(hw_lradc_ctrl0);
- mx28_reg_32(hw_lradc_ctrl1);
- mx28_reg_32(hw_lradc_ctrl2);
- mx28_reg_32(hw_lradc_ctrl3);
- mx28_reg_32(hw_lradc_status);
- mx28_reg_32(hw_lradc_ch0);
- mx28_reg_32(hw_lradc_ch1);
- mx28_reg_32(hw_lradc_ch2);
- mx28_reg_32(hw_lradc_ch3);
- mx28_reg_32(hw_lradc_ch4);
- mx28_reg_32(hw_lradc_ch5);
- mx28_reg_32(hw_lradc_ch6);
- mx28_reg_32(hw_lradc_ch7);
- mx28_reg_32(hw_lradc_delay0);
- mx28_reg_32(hw_lradc_delay1);
- mx28_reg_32(hw_lradc_delay2);
- mx28_reg_32(hw_lradc_delay3);
- mx28_reg_32(hw_lradc_debug0);
- mx28_reg_32(hw_lradc_debug1);
- mx28_reg_32(hw_lradc_conversion);
- mx28_reg_32(hw_lradc_ctrl4);
- mx28_reg_32(hw_lradc_treshold0);
- mx28_reg_32(hw_lradc_treshold1);
- mx28_reg_32(hw_lradc_version);
+ mxs_reg_32(hw_lradc_ctrl0);
+ mxs_reg_32(hw_lradc_ctrl1);
+ mxs_reg_32(hw_lradc_ctrl2);
+ mxs_reg_32(hw_lradc_ctrl3);
+ mxs_reg_32(hw_lradc_status);
+ mxs_reg_32(hw_lradc_ch0);
+ mxs_reg_32(hw_lradc_ch1);
+ mxs_reg_32(hw_lradc_ch2);
+ mxs_reg_32(hw_lradc_ch3);
+ mxs_reg_32(hw_lradc_ch4);
+ mxs_reg_32(hw_lradc_ch5);
+ mxs_reg_32(hw_lradc_ch6);
+ mxs_reg_32(hw_lradc_ch7);
+ mxs_reg_32(hw_lradc_delay0);
+ mxs_reg_32(hw_lradc_delay1);
+ mxs_reg_32(hw_lradc_delay2);
+ mxs_reg_32(hw_lradc_delay3);
+ mxs_reg_32(hw_lradc_debug0);
+ mxs_reg_32(hw_lradc_debug1);
+ mxs_reg_32(hw_lradc_conversion);
+ mxs_reg_32(hw_lradc_ctrl4);
+ mxs_reg_32(hw_lradc_treshold0);
+ mxs_reg_32(hw_lradc_treshold1);
+ mxs_reg_32(hw_lradc_version);
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-ocotp.h b/arch/arm/include/asm/arch-mxs/regs-ocotp.h
index 2738035..a2ac6a2 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ocotp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ocotp.h
@@ -30,49 +30,49 @@
#ifndef __ASSEMBLY__
struct mx28_ocotp_regs {
- mx28_reg_32(hw_ocotp_ctrl) /* 0x0 */
- mx28_reg_32(hw_ocotp_data) /* 0x10 */
- mx28_reg_32(hw_ocotp_cust0) /* 0x20 */
- mx28_reg_32(hw_ocotp_cust1) /* 0x30 */
- mx28_reg_32(hw_ocotp_cust2) /* 0x40 */
- mx28_reg_32(hw_ocotp_cust3) /* 0x50 */
- mx28_reg_32(hw_ocotp_crypto0) /* 0x60 */
- mx28_reg_32(hw_ocotp_crypto1) /* 0x70 */
- mx28_reg_32(hw_ocotp_crypto2) /* 0x80 */
- mx28_reg_32(hw_ocotp_crypto3) /* 0x90 */
- mx28_reg_32(hw_ocotp_hwcap0) /* 0xa0 */
- mx28_reg_32(hw_ocotp_hwcap1) /* 0xb0 */
- mx28_reg_32(hw_ocotp_hwcap2) /* 0xc0 */
- mx28_reg_32(hw_ocotp_hwcap3) /* 0xd0 */
- mx28_reg_32(hw_ocotp_hwcap4) /* 0xe0 */
- mx28_reg_32(hw_ocotp_hwcap5) /* 0xf0 */
- mx28_reg_32(hw_ocotp_swcap) /* 0x100 */
- mx28_reg_32(hw_ocotp_custcap) /* 0x110 */
- mx28_reg_32(hw_ocotp_lock) /* 0x120 */
- mx28_reg_32(hw_ocotp_ops0) /* 0x130 */
- mx28_reg_32(hw_ocotp_ops1) /* 0x140 */
- mx28_reg_32(hw_ocotp_ops2) /* 0x150 */
- mx28_reg_32(hw_ocotp_ops3) /* 0x160 */
- mx28_reg_32(hw_ocotp_un0) /* 0x170 */
- mx28_reg_32(hw_ocotp_un1) /* 0x180 */
- mx28_reg_32(hw_ocotp_un2) /* 0x190 */
- mx28_reg_32(hw_ocotp_rom0) /* 0x1a0 */
- mx28_reg_32(hw_ocotp_rom1) /* 0x1b0 */
- mx28_reg_32(hw_ocotp_rom2) /* 0x1c0 */
- mx28_reg_32(hw_ocotp_rom3) /* 0x1d0 */
- mx28_reg_32(hw_ocotp_rom4) /* 0x1e0 */
- mx28_reg_32(hw_ocotp_rom5) /* 0x1f0 */
- mx28_reg_32(hw_ocotp_rom6) /* 0x200 */
- mx28_reg_32(hw_ocotp_rom7) /* 0x210 */
- mx28_reg_32(hw_ocotp_srk0) /* 0x220 */
- mx28_reg_32(hw_ocotp_srk1) /* 0x230 */
- mx28_reg_32(hw_ocotp_srk2) /* 0x240 */
- mx28_reg_32(hw_ocotp_srk3) /* 0x250 */
- mx28_reg_32(hw_ocotp_srk4) /* 0x260 */
- mx28_reg_32(hw_ocotp_srk5) /* 0x270 */
- mx28_reg_32(hw_ocotp_srk6) /* 0x280 */
- mx28_reg_32(hw_ocotp_srk7) /* 0x290 */
- mx28_reg_32(hw_ocotp_version) /* 0x2a0 */
+ mxs_reg_32(hw_ocotp_ctrl) /* 0x0 */
+ mxs_reg_32(hw_ocotp_data) /* 0x10 */
+ mxs_reg_32(hw_ocotp_cust0) /* 0x20 */
+ mxs_reg_32(hw_ocotp_cust1) /* 0x30 */
+ mxs_reg_32(hw_ocotp_cust2) /* 0x40 */
+ mxs_reg_32(hw_ocotp_cust3) /* 0x50 */
+ mxs_reg_32(hw_ocotp_crypto0) /* 0x60 */
+ mxs_reg_32(hw_ocotp_crypto1) /* 0x70 */
+ mxs_reg_32(hw_ocotp_crypto2) /* 0x80 */
+ mxs_reg_32(hw_ocotp_crypto3) /* 0x90 */
+ mxs_reg_32(hw_ocotp_hwcap0) /* 0xa0 */
+ mxs_reg_32(hw_ocotp_hwcap1) /* 0xb0 */
+ mxs_reg_32(hw_ocotp_hwcap2) /* 0xc0 */
+ mxs_reg_32(hw_ocotp_hwcap3) /* 0xd0 */
+ mxs_reg_32(hw_ocotp_hwcap4) /* 0xe0 */
+ mxs_reg_32(hw_ocotp_hwcap5) /* 0xf0 */
+ mxs_reg_32(hw_ocotp_swcap) /* 0x100 */
+ mxs_reg_32(hw_ocotp_custcap) /* 0x110 */
+ mxs_reg_32(hw_ocotp_lock) /* 0x120 */
+ mxs_reg_32(hw_ocotp_ops0) /* 0x130 */
+ mxs_reg_32(hw_ocotp_ops1) /* 0x140 */
+ mxs_reg_32(hw_ocotp_ops2) /* 0x150 */
+ mxs_reg_32(hw_ocotp_ops3) /* 0x160 */
+ mxs_reg_32(hw_ocotp_un0) /* 0x170 */
+ mxs_reg_32(hw_ocotp_un1) /* 0x180 */
+ mxs_reg_32(hw_ocotp_un2) /* 0x190 */
+ mxs_reg_32(hw_ocotp_rom0) /* 0x1a0 */
+ mxs_reg_32(hw_ocotp_rom1) /* 0x1b0 */
+ mxs_reg_32(hw_ocotp_rom2) /* 0x1c0 */
+ mxs_reg_32(hw_ocotp_rom3) /* 0x1d0 */
+ mxs_reg_32(hw_ocotp_rom4) /* 0x1e0 */
+ mxs_reg_32(hw_ocotp_rom5) /* 0x1f0 */
+ mxs_reg_32(hw_ocotp_rom6) /* 0x200 */
+ mxs_reg_32(hw_ocotp_rom7) /* 0x210 */
+ mxs_reg_32(hw_ocotp_srk0) /* 0x220 */
+ mxs_reg_32(hw_ocotp_srk1) /* 0x230 */
+ mxs_reg_32(hw_ocotp_srk2) /* 0x240 */
+ mxs_reg_32(hw_ocotp_srk3) /* 0x250 */
+ mxs_reg_32(hw_ocotp_srk4) /* 0x260 */
+ mxs_reg_32(hw_ocotp_srk5) /* 0x270 */
+ mxs_reg_32(hw_ocotp_srk6) /* 0x280 */
+ mxs_reg_32(hw_ocotp_srk7) /* 0x290 */
+ mxs_reg_32(hw_ocotp_version) /* 0x2a0 */
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-pinctrl.h b/arch/arm/include/asm/arch-mxs/regs-pinctrl.h
index 80dcdf6..ca1d791 100644
--- a/arch/arm/include/asm/arch-mxs/regs-pinctrl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-pinctrl.h
@@ -30,129 +30,129 @@
#ifndef __ASSEMBLY__
struct mx28_pinctrl_regs {
- mx28_reg_32(hw_pinctrl_ctrl) /* 0x0 */
+ mxs_reg_32(hw_pinctrl_ctrl) /* 0x0 */
uint32_t reserved1[60];
- mx28_reg_32(hw_pinctrl_muxsel0) /* 0x100 */
- mx28_reg_32(hw_pinctrl_muxsel1) /* 0x110 */
- mx28_reg_32(hw_pinctrl_muxsel2) /* 0x120 */
- mx28_reg_32(hw_pinctrl_muxsel3) /* 0x130 */
- mx28_reg_32(hw_pinctrl_muxsel4) /* 0x140 */
- mx28_reg_32(hw_pinctrl_muxsel5) /* 0x150 */
- mx28_reg_32(hw_pinctrl_muxsel6) /* 0x160 */
- mx28_reg_32(hw_pinctrl_muxsel7) /* 0x170 */
- mx28_reg_32(hw_pinctrl_muxsel8) /* 0x180 */
- mx28_reg_32(hw_pinctrl_muxsel9) /* 0x190 */
- mx28_reg_32(hw_pinctrl_muxsel10) /* 0x1a0 */
- mx28_reg_32(hw_pinctrl_muxsel11) /* 0x1b0 */
- mx28_reg_32(hw_pinctrl_muxsel12) /* 0x1c0 */
- mx28_reg_32(hw_pinctrl_muxsel13) /* 0x1d0 */
+ mxs_reg_32(hw_pinctrl_muxsel0) /* 0x100 */
+ mxs_reg_32(hw_pinctrl_muxsel1) /* 0x110 */
+ mxs_reg_32(hw_pinctrl_muxsel2) /* 0x120 */
+ mxs_reg_32(hw_pinctrl_muxsel3) /* 0x130 */
+ mxs_reg_32(hw_pinctrl_muxsel4) /* 0x140 */
+ mxs_reg_32(hw_pinctrl_muxsel5) /* 0x150 */
+ mxs_reg_32(hw_pinctrl_muxsel6) /* 0x160 */
+ mxs_reg_32(hw_pinctrl_muxsel7) /* 0x170 */
+ mxs_reg_32(hw_pinctrl_muxsel8) /* 0x180 */
+ mxs_reg_32(hw_pinctrl_muxsel9) /* 0x190 */
+ mxs_reg_32(hw_pinctrl_muxsel10) /* 0x1a0 */
+ mxs_reg_32(hw_pinctrl_muxsel11) /* 0x1b0 */
+ mxs_reg_32(hw_pinctrl_muxsel12) /* 0x1c0 */
+ mxs_reg_32(hw_pinctrl_muxsel13) /* 0x1d0 */
uint32_t reserved2[72];
- mx28_reg_32(hw_pinctrl_drive0) /* 0x300 */
- mx28_reg_32(hw_pinctrl_drive1) /* 0x310 */
- mx28_reg_32(hw_pinctrl_drive2) /* 0x320 */
- mx28_reg_32(hw_pinctrl_drive3) /* 0x330 */
- mx28_reg_32(hw_pinctrl_drive4) /* 0x340 */
- mx28_reg_32(hw_pinctrl_drive5) /* 0x350 */
- mx28_reg_32(hw_pinctrl_drive6) /* 0x360 */
- mx28_reg_32(hw_pinctrl_drive7) /* 0x370 */
- mx28_reg_32(hw_pinctrl_drive8) /* 0x380 */
- mx28_reg_32(hw_pinctrl_drive9) /* 0x390 */
- mx28_reg_32(hw_pinctrl_drive10) /* 0x3a0 */
- mx28_reg_32(hw_pinctrl_drive11) /* 0x3b0 */
- mx28_reg_32(hw_pinctrl_drive12) /* 0x3c0 */
- mx28_reg_32(hw_pinctrl_drive13) /* 0x3d0 */
- mx28_reg_32(hw_pinctrl_drive14) /* 0x3e0 */
- mx28_reg_32(hw_pinctrl_drive15) /* 0x3f0 */
- mx28_reg_32(hw_pinctrl_drive16) /* 0x400 */
- mx28_reg_32(hw_pinctrl_drive17) /* 0x410 */
- mx28_reg_32(hw_pinctrl_drive18) /* 0x420 */
- mx28_reg_32(hw_pinctrl_drive19) /* 0x430 */
+ mxs_reg_32(hw_pinctrl_drive0) /* 0x300 */
+ mxs_reg_32(hw_pinctrl_drive1) /* 0x310 */
+ mxs_reg_32(hw_pinctrl_drive2) /* 0x320 */
+ mxs_reg_32(hw_pinctrl_drive3) /* 0x330 */
+ mxs_reg_32(hw_pinctrl_drive4) /* 0x340 */
+ mxs_reg_32(hw_pinctrl_drive5) /* 0x350 */
+ mxs_reg_32(hw_pinctrl_drive6) /* 0x360 */
+ mxs_reg_32(hw_pinctrl_drive7) /* 0x370 */
+ mxs_reg_32(hw_pinctrl_drive8) /* 0x380 */
+ mxs_reg_32(hw_pinctrl_drive9) /* 0x390 */
+ mxs_reg_32(hw_pinctrl_drive10) /* 0x3a0 */
+ mxs_reg_32(hw_pinctrl_drive11) /* 0x3b0 */
+ mxs_reg_32(hw_pinctrl_drive12) /* 0x3c0 */
+ mxs_reg_32(hw_pinctrl_drive13) /* 0x3d0 */
+ mxs_reg_32(hw_pinctrl_drive14) /* 0x3e0 */
+ mxs_reg_32(hw_pinctrl_drive15) /* 0x3f0 */
+ mxs_reg_32(hw_pinctrl_drive16) /* 0x400 */
+ mxs_reg_32(hw_pinctrl_drive17) /* 0x410 */
+ mxs_reg_32(hw_pinctrl_drive18) /* 0x420 */
+ mxs_reg_32(hw_pinctrl_drive19) /* 0x430 */
uint32_t reserved3[112];
- mx28_reg_32(hw_pinctrl_pull0) /* 0x600 */
- mx28_reg_32(hw_pinctrl_pull1) /* 0x610 */
- mx28_reg_32(hw_pinctrl_pull2) /* 0x620 */
- mx28_reg_32(hw_pinctrl_pull3) /* 0x630 */
- mx28_reg_32(hw_pinctrl_pull4) /* 0x640 */
- mx28_reg_32(hw_pinctrl_pull5) /* 0x650 */
- mx28_reg_32(hw_pinctrl_pull6) /* 0x660 */
+ mxs_reg_32(hw_pinctrl_pull0) /* 0x600 */
+ mxs_reg_32(hw_pinctrl_pull1) /* 0x610 */
+ mxs_reg_32(hw_pinctrl_pull2) /* 0x620 */
+ mxs_reg_32(hw_pinctrl_pull3) /* 0x630 */
+ mxs_reg_32(hw_pinctrl_pull4) /* 0x640 */
+ mxs_reg_32(hw_pinctrl_pull5) /* 0x650 */
+ mxs_reg_32(hw_pinctrl_pull6) /* 0x660 */
uint32_t reserved4[36];
- mx28_reg_32(hw_pinctrl_dout0) /* 0x700 */
- mx28_reg_32(hw_pinctrl_dout1) /* 0x710 */
- mx28_reg_32(hw_pinctrl_dout2) /* 0x720 */
- mx28_reg_32(hw_pinctrl_dout3) /* 0x730 */
- mx28_reg_32(hw_pinctrl_dout4) /* 0x740 */
+ mxs_reg_32(hw_pinctrl_dout0) /* 0x700 */
+ mxs_reg_32(hw_pinctrl_dout1) /* 0x710 */
+ mxs_reg_32(hw_pinctrl_dout2) /* 0x720 */
+ mxs_reg_32(hw_pinctrl_dout3) /* 0x730 */
+ mxs_reg_32(hw_pinctrl_dout4) /* 0x740 */
uint32_t reserved5[108];
- mx28_reg_32(hw_pinctrl_din0) /* 0x900 */
- mx28_reg_32(hw_pinctrl_din1) /* 0x910 */
- mx28_reg_32(hw_pinctrl_din2) /* 0x920 */
- mx28_reg_32(hw_pinctrl_din3) /* 0x930 */
- mx28_reg_32(hw_pinctrl_din4) /* 0x940 */
+ mxs_reg_32(hw_pinctrl_din0) /* 0x900 */
+ mxs_reg_32(hw_pinctrl_din1) /* 0x910 */
+ mxs_reg_32(hw_pinctrl_din2) /* 0x920 */
+ mxs_reg_32(hw_pinctrl_din3) /* 0x930 */
+ mxs_reg_32(hw_pinctrl_din4) /* 0x940 */
uint32_t reserved6[108];
- mx28_reg_32(hw_pinctrl_doe0) /* 0xb00 */
- mx28_reg_32(hw_pinctrl_doe1) /* 0xb10 */
- mx28_reg_32(hw_pinctrl_doe2) /* 0xb20 */
- mx28_reg_32(hw_pinctrl_doe3) /* 0xb30 */
- mx28_reg_32(hw_pinctrl_doe4) /* 0xb40 */
+ mxs_reg_32(hw_pinctrl_doe0) /* 0xb00 */
+ mxs_reg_32(hw_pinctrl_doe1) /* 0xb10 */
+ mxs_reg_32(hw_pinctrl_doe2) /* 0xb20 */
+ mxs_reg_32(hw_pinctrl_doe3) /* 0xb30 */
+ mxs_reg_32(hw_pinctrl_doe4) /* 0xb40 */
uint32_t reserved7[300];
- mx28_reg_32(hw_pinctrl_pin2irq0) /* 0x1000 */
- mx28_reg_32(hw_pinctrl_pin2irq1) /* 0x1010 */
- mx28_reg_32(hw_pinctrl_pin2irq2) /* 0x1020 */
- mx28_reg_32(hw_pinctrl_pin2irq3) /* 0x1030 */
- mx28_reg_32(hw_pinctrl_pin2irq4) /* 0x1040 */
+ mxs_reg_32(hw_pinctrl_pin2irq0) /* 0x1000 */
+ mxs_reg_32(hw_pinctrl_pin2irq1) /* 0x1010 */
+ mxs_reg_32(hw_pinctrl_pin2irq2) /* 0x1020 */
+ mxs_reg_32(hw_pinctrl_pin2irq3) /* 0x1030 */
+ mxs_reg_32(hw_pinctrl_pin2irq4) /* 0x1040 */
uint32_t reserved8[44];
- mx28_reg_32(hw_pinctrl_irqen0) /* 0x1100 */
- mx28_reg_32(hw_pinctrl_irqen1) /* 0x1110 */
- mx28_reg_32(hw_pinctrl_irqen2) /* 0x1120 */
- mx28_reg_32(hw_pinctrl_irqen3) /* 0x1130 */
- mx28_reg_32(hw_pinctrl_irqen4) /* 0x1140 */
+ mxs_reg_32(hw_pinctrl_irqen0) /* 0x1100 */
+ mxs_reg_32(hw_pinctrl_irqen1) /* 0x1110 */
+ mxs_reg_32(hw_pinctrl_irqen2) /* 0x1120 */
+ mxs_reg_32(hw_pinctrl_irqen3) /* 0x1130 */
+ mxs_reg_32(hw_pinctrl_irqen4) /* 0x1140 */
uint32_t reserved9[44];
- mx28_reg_32(hw_pinctrl_irqlevel0) /* 0x1200 */
- mx28_reg_32(hw_pinctrl_irqlevel1) /* 0x1210 */
- mx28_reg_32(hw_pinctrl_irqlevel2) /* 0x1220 */
- mx28_reg_32(hw_pinctrl_irqlevel3) /* 0x1230 */
- mx28_reg_32(hw_pinctrl_irqlevel4) /* 0x1240 */
+ mxs_reg_32(hw_pinctrl_irqlevel0) /* 0x1200 */
+ mxs_reg_32(hw_pinctrl_irqlevel1) /* 0x1210 */
+ mxs_reg_32(hw_pinctrl_irqlevel2) /* 0x1220 */
+ mxs_reg_32(hw_pinctrl_irqlevel3) /* 0x1230 */
+ mxs_reg_32(hw_pinctrl_irqlevel4) /* 0x1240 */
uint32_t reserved10[44];
- mx28_reg_32(hw_pinctrl_irqpol0) /* 0x1300 */
- mx28_reg_32(hw_pinctrl_irqpol1) /* 0x1310 */
- mx28_reg_32(hw_pinctrl_irqpol2) /* 0x1320 */
- mx28_reg_32(hw_pinctrl_irqpol3) /* 0x1330 */
- mx28_reg_32(hw_pinctrl_irqpol4) /* 0x1340 */
+ mxs_reg_32(hw_pinctrl_irqpol0) /* 0x1300 */
+ mxs_reg_32(hw_pinctrl_irqpol1) /* 0x1310 */
+ mxs_reg_32(hw_pinctrl_irqpol2) /* 0x1320 */
+ mxs_reg_32(hw_pinctrl_irqpol3) /* 0x1330 */
+ mxs_reg_32(hw_pinctrl_irqpol4) /* 0x1340 */
uint32_t reserved11[44];
- mx28_reg_32(hw_pinctrl_irqstat0) /* 0x1400 */
- mx28_reg_32(hw_pinctrl_irqstat1) /* 0x1410 */
- mx28_reg_32(hw_pinctrl_irqstat2) /* 0x1420 */
- mx28_reg_32(hw_pinctrl_irqstat3) /* 0x1430 */
- mx28_reg_32(hw_pinctrl_irqstat4) /* 0x1440 */
+ mxs_reg_32(hw_pinctrl_irqstat0) /* 0x1400 */
+ mxs_reg_32(hw_pinctrl_irqstat1) /* 0x1410 */
+ mxs_reg_32(hw_pinctrl_irqstat2) /* 0x1420 */
+ mxs_reg_32(hw_pinctrl_irqstat3) /* 0x1430 */
+ mxs_reg_32(hw_pinctrl_irqstat4) /* 0x1440 */
uint32_t reserved12[380];
- mx28_reg_32(hw_pinctrl_emi_odt_ctrl) /* 0x1a40 */
+ mxs_reg_32(hw_pinctrl_emi_odt_ctrl) /* 0x1a40 */
uint32_t reserved13[76];
- mx28_reg_32(hw_pinctrl_emi_ds_ctrl) /* 0x1b80 */
+ mxs_reg_32(hw_pinctrl_emi_ds_ctrl) /* 0x1b80 */
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-power.h b/arch/arm/include/asm/arch-mxs/regs-power.h
index 8eadc6d..3c9e3b0 100644
--- a/arch/arm/include/asm/arch-mxs/regs-power.h
+++ b/arch/arm/include/asm/arch-mxs/regs-power.h
@@ -26,10 +26,10 @@
#ifndef __ASSEMBLY__
struct mx28_power_regs {
- mx28_reg_32(hw_power_ctrl)
- mx28_reg_32(hw_power_5vctrl)
- mx28_reg_32(hw_power_minpwr)
- mx28_reg_32(hw_power_charge)
+ mxs_reg_32(hw_power_ctrl)
+ mxs_reg_32(hw_power_5vctrl)
+ mxs_reg_32(hw_power_minpwr)
+ mxs_reg_32(hw_power_charge)
uint32_t hw_power_vdddctrl;
uint32_t reserved_vddd[3];
uint32_t hw_power_vddactrl;
@@ -44,23 +44,23 @@ struct mx28_power_regs {
uint32_t reserved_misc[3];
uint32_t hw_power_dclimits;
uint32_t reserved_dclimits[3];
- mx28_reg_32(hw_power_loopctrl)
+ mxs_reg_32(hw_power_loopctrl)
uint32_t hw_power_sts;
uint32_t reserved_sts[3];
- mx28_reg_32(hw_power_speed)
+ mxs_reg_32(hw_power_speed)
uint32_t hw_power_battmonitor;
uint32_t reserved_battmonitor[3];
uint32_t reserved[4];
- mx28_reg_32(hw_power_reset)
- mx28_reg_32(hw_power_debug)
- mx28_reg_32(hw_power_thermal)
- mx28_reg_32(hw_power_usb1ctrl)
- mx28_reg_32(hw_power_special)
- mx28_reg_32(hw_power_version)
- mx28_reg_32(hw_power_anaclkctrl)
- mx28_reg_32(hw_power_refctrl)
+ mxs_reg_32(hw_power_reset)
+ mxs_reg_32(hw_power_debug)
+ mxs_reg_32(hw_power_thermal)
+ mxs_reg_32(hw_power_usb1ctrl)
+ mxs_reg_32(hw_power_special)
+ mxs_reg_32(hw_power_version)
+ mxs_reg_32(hw_power_anaclkctrl)
+ mxs_reg_32(hw_power_refctrl)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-rtc.h b/arch/arm/include/asm/arch-mxs/regs-rtc.h
index e605a03..0b660ae 100644
--- a/arch/arm/include/asm/arch-mxs/regs-rtc.h
+++ b/arch/arm/include/asm/arch-mxs/regs-rtc.h
@@ -27,20 +27,20 @@
#ifndef __ASSEMBLY__
struct mx28_rtc_regs {
- mx28_reg_32(hw_rtc_ctrl)
- mx28_reg_32(hw_rtc_stat)
- mx28_reg_32(hw_rtc_milliseconds)
- mx28_reg_32(hw_rtc_seconds)
- mx28_reg_32(hw_rtc_rtc_alarm)
- mx28_reg_32(hw_rtc_watchdog)
- mx28_reg_32(hw_rtc_persistent0)
- mx28_reg_32(hw_rtc_persistent1)
- mx28_reg_32(hw_rtc_persistent2)
- mx28_reg_32(hw_rtc_persistent3)
- mx28_reg_32(hw_rtc_persistent4)
- mx28_reg_32(hw_rtc_persistent5)
- mx28_reg_32(hw_rtc_debug)
- mx28_reg_32(hw_rtc_version)
+ mxs_reg_32(hw_rtc_ctrl)
+ mxs_reg_32(hw_rtc_stat)
+ mxs_reg_32(hw_rtc_milliseconds)
+ mxs_reg_32(hw_rtc_seconds)
+ mxs_reg_32(hw_rtc_rtc_alarm)
+ mxs_reg_32(hw_rtc_watchdog)
+ mxs_reg_32(hw_rtc_persistent0)
+ mxs_reg_32(hw_rtc_persistent1)
+ mxs_reg_32(hw_rtc_persistent2)
+ mxs_reg_32(hw_rtc_persistent3)
+ mxs_reg_32(hw_rtc_persistent4)
+ mxs_reg_32(hw_rtc_persistent5)
+ mxs_reg_32(hw_rtc_debug)
+ mxs_reg_32(hw_rtc_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-ssp.h b/arch/arm/include/asm/arch-mxs/regs-ssp.h
index be71d48..85b9894 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ssp.h
@@ -29,26 +29,26 @@
#ifndef __ASSEMBLY__
struct mx28_ssp_regs {
- mx28_reg_32(hw_ssp_ctrl0)
- mx28_reg_32(hw_ssp_cmd0)
- mx28_reg_32(hw_ssp_cmd1)
- mx28_reg_32(hw_ssp_xfer_size)
- mx28_reg_32(hw_ssp_block_size)
- mx28_reg_32(hw_ssp_compref)
- mx28_reg_32(hw_ssp_compmask)
- mx28_reg_32(hw_ssp_timing)
- mx28_reg_32(hw_ssp_ctrl1)
- mx28_reg_32(hw_ssp_data)
- mx28_reg_32(hw_ssp_sdresp0)
- mx28_reg_32(hw_ssp_sdresp1)
- mx28_reg_32(hw_ssp_sdresp2)
- mx28_reg_32(hw_ssp_sdresp3)
- mx28_reg_32(hw_ssp_ddr_ctrl)
- mx28_reg_32(hw_ssp_dll_ctrl)
- mx28_reg_32(hw_ssp_status)
- mx28_reg_32(hw_ssp_dll_sts)
- mx28_reg_32(hw_ssp_debug)
- mx28_reg_32(hw_ssp_version)
+ mxs_reg_32(hw_ssp_ctrl0)
+ mxs_reg_32(hw_ssp_cmd0)
+ mxs_reg_32(hw_ssp_cmd1)
+ mxs_reg_32(hw_ssp_xfer_size)
+ mxs_reg_32(hw_ssp_block_size)
+ mxs_reg_32(hw_ssp_compref)
+ mxs_reg_32(hw_ssp_compmask)
+ mxs_reg_32(hw_ssp_timing)
+ mxs_reg_32(hw_ssp_ctrl1)
+ mxs_reg_32(hw_ssp_data)
+ mxs_reg_32(hw_ssp_sdresp0)
+ mxs_reg_32(hw_ssp_sdresp1)
+ mxs_reg_32(hw_ssp_sdresp2)
+ mxs_reg_32(hw_ssp_sdresp3)
+ mxs_reg_32(hw_ssp_ddr_ctrl)
+ mxs_reg_32(hw_ssp_dll_ctrl)
+ mxs_reg_32(hw_ssp_status)
+ mxs_reg_32(hw_ssp_dll_sts)
+ mxs_reg_32(hw_ssp_debug)
+ mxs_reg_32(hw_ssp_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-timrot.h b/arch/arm/include/asm/arch-mxs/regs-timrot.h
index 3e8dfe7..332654f 100644
--- a/arch/arm/include/asm/arch-mxs/regs-timrot.h
+++ b/arch/arm/include/asm/arch-mxs/regs-timrot.h
@@ -29,25 +29,25 @@
#ifndef __ASSEMBLY__
struct mx28_timrot_regs {
- mx28_reg_32(hw_timrot_rotctrl)
- mx28_reg_32(hw_timrot_rotcount)
- mx28_reg_32(hw_timrot_timctrl0)
- mx28_reg_32(hw_timrot_running_count0)
- mx28_reg_32(hw_timrot_fixed_count0)
- mx28_reg_32(hw_timrot_match_count0)
- mx28_reg_32(hw_timrot_timctrl1)
- mx28_reg_32(hw_timrot_running_count1)
- mx28_reg_32(hw_timrot_fixed_count1)
- mx28_reg_32(hw_timrot_match_count1)
- mx28_reg_32(hw_timrot_timctrl2)
- mx28_reg_32(hw_timrot_running_count2)
- mx28_reg_32(hw_timrot_fixed_count2)
- mx28_reg_32(hw_timrot_match_count2)
- mx28_reg_32(hw_timrot_timctrl3)
- mx28_reg_32(hw_timrot_running_count3)
- mx28_reg_32(hw_timrot_fixed_count3)
- mx28_reg_32(hw_timrot_match_count3)
- mx28_reg_32(hw_timrot_version)
+ mxs_reg_32(hw_timrot_rotctrl)
+ mxs_reg_32(hw_timrot_rotcount)
+ mxs_reg_32(hw_timrot_timctrl0)
+ mxs_reg_32(hw_timrot_running_count0)
+ mxs_reg_32(hw_timrot_fixed_count0)
+ mxs_reg_32(hw_timrot_match_count0)
+ mxs_reg_32(hw_timrot_timctrl1)
+ mxs_reg_32(hw_timrot_running_count1)
+ mxs_reg_32(hw_timrot_fixed_count1)
+ mxs_reg_32(hw_timrot_match_count1)
+ mxs_reg_32(hw_timrot_timctrl2)
+ mxs_reg_32(hw_timrot_running_count2)
+ mxs_reg_32(hw_timrot_fixed_count2)
+ mxs_reg_32(hw_timrot_match_count2)
+ mxs_reg_32(hw_timrot_timctrl3)
+ mxs_reg_32(hw_timrot_running_count3)
+ mxs_reg_32(hw_timrot_fixed_count3)
+ mxs_reg_32(hw_timrot_match_count3)
+ mxs_reg_32(hw_timrot_version)
};
#endif
diff --git a/arch/arm/include/asm/arch-mxs/regs-usbphy.h b/arch/arm/include/asm/arch-mxs/regs-usbphy.h
index 0291d81..5dd5125 100644
--- a/arch/arm/include/asm/arch-mxs/regs-usbphy.h
+++ b/arch/arm/include/asm/arch-mxs/regs-usbphy.h
@@ -24,16 +24,16 @@
#define __REGS_USBPHY_H__
struct mx28_usbphy_regs {
- mx28_reg_32(hw_usbphy_pwd)
- mx28_reg_32(hw_usbphy_tx)
- mx28_reg_32(hw_usbphy_rx)
- mx28_reg_32(hw_usbphy_ctrl)
- mx28_reg_32(hw_usbphy_status)
- mx28_reg_32(hw_usbphy_debug)
- mx28_reg_32(hw_usbphy_debug0_status)
- mx28_reg_32(hw_usbphy_debug1)
- mx28_reg_32(hw_usbphy_version)
- mx28_reg_32(hw_usbphy_ip)
+ mxs_reg_32(hw_usbphy_pwd)
+ mxs_reg_32(hw_usbphy_tx)
+ mxs_reg_32(hw_usbphy_rx)
+ mxs_reg_32(hw_usbphy_ctrl)
+ mxs_reg_32(hw_usbphy_status)
+ mxs_reg_32(hw_usbphy_debug)
+ mxs_reg_32(hw_usbphy_debug0_status)
+ mxs_reg_32(hw_usbphy_debug1)
+ mxs_reg_32(hw_usbphy_version)
+ mxs_reg_32(hw_usbphy_ip)
};
#define USBPHY_PWD_RXPWDRX (1 << 20)
diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h
index e701c64..7337458 100644
--- a/arch/arm/include/asm/arch-mxs/sys_proto.h
+++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
@@ -23,11 +23,11 @@
#ifndef __MX28_H__
#define __MX28_H__
-int mx28_reset_block(struct mx28_register_32 *reg);
-int mx28_wait_mask_set(struct mx28_register_32 *reg,
+int mx28_reset_block(struct mxs_register_32 *reg);
+int mx28_wait_mask_set(struct mxs_register_32 *reg,
uint32_t mask,
int timeout);
-int mx28_wait_mask_clr(struct mx28_register_32 *reg,
+int mx28_wait_mask_clr(struct mxs_register_32 *reg,
uint32_t mask,
int timeout);
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 38dbc81..29f19ba 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -73,8 +73,8 @@ int gpio_get_value(unsigned gpio)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DIN(bank);
- struct mx28_register_32 *reg =
- (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+ struct mxs_register_32 *reg =
+ (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
return (readl(®->reg) >> PAD_PIN(gpio)) & 1;
}
@@ -83,8 +83,8 @@ void gpio_set_value(unsigned gpio, int value)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOUT(bank);
- struct mx28_register_32 *reg =
- (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+ struct mxs_register_32 *reg =
+ (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
if (value)
writel(1 << PAD_PIN(gpio), ®->reg_set);
@@ -96,8 +96,8 @@ int gpio_direction_input(unsigned gpio)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
- struct mx28_register_32 *reg =
- (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+ struct mxs_register_32 *reg =
+ (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
writel(1 << PAD_PIN(gpio), ®->reg_clr);
@@ -108,8 +108,8 @@ int gpio_direction_output(unsigned gpio, int value)
{
uint32_t bank = PAD_BANK(gpio);
uint32_t offset = PINCTRL_DOE(bank);
- struct mx28_register_32 *reg =
- (struct mx28_register_32 *)(MXS_PINCTRL_BASE + offset);
+ struct mxs_register_32 *reg =
+ (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
writel(1 << PAD_PIN(gpio), ®->reg_set);
diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index e1bd37e..f32df51 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -75,8 +75,8 @@ int ehci_hcd_init(void)
int ret;
uint32_t usb_base, cap_base;
- struct mx28_register_32 *digctl_ctrl =
- (struct mx28_register_32 *)HW_DIGCTL_CTRL;
+ struct mxs_register_32 *digctl_ctrl =
+ (struct mxs_register_32 *)HW_DIGCTL_CTRL;
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -119,8 +119,8 @@ int ehci_hcd_stop(void)
{
int ret;
uint32_t tmp;
- struct mx28_register_32 *digctl_ctrl =
- (struct mx28_register_32 *)HW_DIGCTL_CTRL;
+ struct mxs_register_32 *digctl_ctrl =
+ (struct mxs_register_32 *)HW_DIGCTL_CTRL;
struct mx28_clkctrl_regs *clkctrl_regs =
(struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [PATCH v1 3/6] mxs: prefix register structs with 'mxs' prefix
2012-08-05 19:05 [U-Boot] [PATCH v1 0/6] Rework for mxs SoC family support Otavio Salvador
2012-08-05 19:05 ` [U-Boot] [PATCH v1 1/6] mxs: reorganize source directory for easy sharing of code in i.MXS SoCs Otavio Salvador
2012-08-05 19:05 ` [U-Boot] [PATCH v1 2/6] mxs: prefix register acessor macros with 'mxs' prefix Otavio Salvador
@ 2012-08-05 19:05 ` Otavio Salvador
2012-08-05 19:05 ` [U-Boot] [PATCH v1 4/6] mxs: Reowork SPL to use 'mxs' prefix for methods Otavio Salvador
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Otavio Salvador @ 2012-08-05 19:05 UTC (permalink / raw)
To: u-boot
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---
Changes in v1:
- rebase against imx/master
- rework due apx4devkit board addition
arch/arm/cpu/arm926ejs/mxs/clock.c | 36 ++++----
arch/arm/cpu/arm926ejs/mxs/mx28.c | 28 +++----
arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 4 +-
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 24 +++---
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 116 +++++++++++++-------------
arch/arm/cpu/arm926ejs/mxs/timer.c | 8 +-
arch/arm/include/asm/arch-mxs/regs-apbh.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-bch.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-clkctrl.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-digctl.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-gpmi.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-i2c.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-lcdif.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-lradc.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-ocotp.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-pinctrl.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-power.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-rtc.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-ssp.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-timrot.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-usb.h | 2 +-
arch/arm/include/asm/arch-mxs/regs-usbphy.h | 2 +-
board/bluegiga/apx4devkit/apx4devkit.c | 4 +-
board/denx/m28evk/m28evk.c | 4 +-
board/freescale/mx28evk/mx28evk.c | 4 +-
drivers/dma/apbh_dma.c | 32 +++----
drivers/i2c/mxs_i2c.c | 12 +--
drivers/mmc/mxsmmc.c | 20 ++---
drivers/mtd/nand/mxs_nand.c | 12 +--
drivers/rtc/mxsrtc.c | 6 +-
drivers/spi/mxs_spi.c | 19 ++---
drivers/usb/host/ehci-mxs.c | 16 ++--
32 files changed, 188 insertions(+), 189 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 3e29c56..bfea6ab 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -43,8 +43,8 @@
static uint32_t mx28_get_pclk(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t clkctrl, clkseq, div;
uint8_t clkfrac, frac;
@@ -75,8 +75,8 @@ static uint32_t mx28_get_pclk(void)
static uint32_t mx28_get_hclk(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t div;
uint32_t clkctrl;
@@ -93,8 +93,8 @@ static uint32_t mx28_get_hclk(void)
static uint32_t mx28_get_emiclk(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t clkctrl, clkseq, div;
uint8_t clkfrac, frac;
@@ -118,8 +118,8 @@ static uint32_t mx28_get_emiclk(void)
static uint32_t mx28_get_gpmiclk(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t clkctrl, clkseq, div;
uint8_t clkfrac, frac;
@@ -145,8 +145,8 @@ static uint32_t mx28_get_gpmiclk(void)
*/
void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t div;
int io_reg;
@@ -178,8 +178,8 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
*/
static uint32_t mx28_get_ioclk(enum mxs_ioclock io)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint8_t ret;
int io_reg;
@@ -199,8 +199,8 @@ static uint32_t mx28_get_ioclk(enum mxs_ioclock io)
*/
void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t clk, clkreg;
if (ssp > MXC_SSPCLK3)
@@ -243,8 +243,8 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
*/
static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t clkreg;
uint32_t clk, tmp;
@@ -273,12 +273,12 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
*/
void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq)
{
- struct mx28_ssp_regs *ssp_regs;
+ struct mxs_ssp_regs *ssp_regs;
const uint32_t sspclk = mx28_get_sspclk(bus);
uint32_t reg;
uint32_t divide, rate, tgtclk;
- ssp_regs = (struct mx28_ssp_regs *)(MXS_SSP0_BASE + (bus * 0x2000));
+ ssp_regs = (struct mxs_ssp_regs *)(MXS_SSP0_BASE + (bus * 0x2000));
/*
* SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)),
diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28.c b/arch/arm/cpu/arm926ejs/mxs/mx28.c
index 65fcd75..dc271cf 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mx28.c
@@ -51,10 +51,10 @@ void reset_cpu(ulong ignored) __attribute__((noreturn));
void reset_cpu(ulong ignored)
{
- struct mx28_rtc_regs *rtc_regs =
- (struct mx28_rtc_regs *)MXS_RTC_BASE;
- struct mx28_lcdif_regs *lcdif_regs =
- (struct mx28_lcdif_regs *)MXS_LCDIF_BASE;
+ struct mxs_rtc_regs *rtc_regs =
+ (struct mxs_rtc_regs *)MXS_RTC_BASE;
+ struct mxs_lcdif_regs *lcdif_regs =
+ (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
/*
* Shut down the LCD controller as it interferes with BootROM boot mode
@@ -155,8 +155,8 @@ int arch_misc_init(void)
int arch_cpu_init(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
extern uint32_t _start;
mx28_fixup_vt((uint32_t)&_start);
@@ -190,8 +190,8 @@ int arch_cpu_init(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
static const char *get_cpu_type(void)
{
- struct mx28_digctl_regs *digctl_regs =
- (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
+ struct mxs_digctl_regs *digctl_regs =
+ (struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
case HW_DIGCTL_CHIPID_MX28:
@@ -203,8 +203,8 @@ static const char *get_cpu_type(void)
static const char *get_cpu_rev(void)
{
- struct mx28_digctl_regs *digctl_regs =
- (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
+ struct mxs_digctl_regs *digctl_regs =
+ (struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
uint8_t rev = readl(&digctl_regs->hw_digctl_chipid) & 0x000000FF;
switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
@@ -249,8 +249,8 @@ int do_mx28_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
#ifdef CONFIG_CMD_NET
int cpu_eth_init(bd_t *bis)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
/* Turn on ENET clocks */
clrbits_le32(&clkctrl_regs->hw_clkctrl_enet,
@@ -291,8 +291,8 @@ void mx28_adjust_mac(int dev_id, unsigned char *mac)
#define MXS_OCOTP_MAX_TIMEOUT 1000000
void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
{
- struct mx28_ocotp_regs *ocotp_regs =
- (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;
+ struct mxs_ocotp_regs *ocotp_regs =
+ (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
uint32_t data;
memset(mac, 0, 6);
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
index 88a603c..c1df81d 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
@@ -32,7 +32,7 @@
void mx28_lradc_init(void)
{
- struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+ struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
writel(LRADC_CTRL0_SFTRST, ®s->hw_lradc_ctrl0_clr);
writel(LRADC_CTRL0_CLKGATE, ®s->hw_lradc_ctrl0_clr);
@@ -51,7 +51,7 @@ void mx28_lradc_init(void)
void mx28_lradc_enable_batt_measurement(void)
{
- struct mx28_lradc_regs *regs = (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+ struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
/* Check if the channel is present at all. */
if (!(readl(®s->hw_lradc_status) & LRADC_STATUS_CHANNEL7_PRESENT))
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index cca1316..e7ed5e0 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -100,8 +100,8 @@ void init_mx28_200mhz_ddr2(void)
void mx28_mem_init_clock(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
/* Gate EMI clock */
writeb(CLKCTRL_FRAC_CLKGATE,
@@ -131,8 +131,8 @@ void mx28_mem_init_clock(void)
void mx28_mem_setup_cpu_and_hbus(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
/* Set fractional divider for ref_cpu to 480 * 18 / 19 = 454MHz
* and ungate CPU clock */
@@ -163,8 +163,8 @@ void mx28_mem_setup_cpu_and_hbus(void)
void mx28_mem_setup_vdda(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
writel((0xc << POWER_VDDACTRL_TRG_OFFSET) |
(0x7 << POWER_VDDACTRL_BO_OFFSET_OFFSET) |
@@ -174,8 +174,8 @@ void mx28_mem_setup_vdda(void)
void mx28_mem_setup_vddd(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
writel((0x1c << POWER_VDDDCTRL_TRG_OFFSET) |
(0x7 << POWER_VDDDCTRL_BO_OFFSET_OFFSET) |
@@ -204,10 +204,10 @@ uint32_t mx28_mem_get_size(void)
void mx28_mem_init(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
- struct mx28_pinctrl_regs *pinctrl_regs =
- (struct mx28_pinctrl_regs *)MXS_PINCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_pinctrl_regs *pinctrl_regs =
+ (struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE;
/* Set DDR2 mode */
writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2,
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 4b09b0c..763549e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -32,8 +32,8 @@
void mx28_power_clock2xtal(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
/* Set XTAL as CPU reference clock */
writel(CLKCTRL_CLKSEQ_BYPASS_CPU,
@@ -42,8 +42,8 @@ void mx28_power_clock2xtal(void)
void mx28_power_clock2pll(void)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
setbits_le32(&clkctrl_regs->hw_clkctrl_pll0ctrl0,
CLKCTRL_PLL0CTRL0_POWER);
@@ -54,8 +54,8 @@ void mx28_power_clock2pll(void)
void mx28_power_clear_auto_restart(void)
{
- struct mx28_rtc_regs *rtc_regs =
- (struct mx28_rtc_regs *)MXS_RTC_BASE;
+ struct mxs_rtc_regs *rtc_regs =
+ (struct mxs_rtc_regs *)MXS_RTC_BASE;
writel(RTC_CTRL_SFTRST, &rtc_regs->hw_rtc_ctrl_clr);
while (readl(&rtc_regs->hw_rtc_ctrl) & RTC_CTRL_SFTRST)
@@ -87,8 +87,8 @@ void mx28_power_clear_auto_restart(void)
void mx28_power_set_linreg(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
/* Set linear regulator 25mV below switching converter */
clrsetbits_le32(&power_regs->hw_power_vdddctrl,
@@ -106,8 +106,8 @@ void mx28_power_set_linreg(void)
int mx28_get_batt_volt(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t volt = readl(&power_regs->hw_power_battmonitor);
volt &= POWER_BATTMONITOR_BATT_VAL_MASK;
volt >>= POWER_BATTMONITOR_BATT_VAL_OFFSET;
@@ -122,8 +122,8 @@ int mx28_is_batt_ready(void)
int mx28_is_batt_good(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t volt = mx28_get_batt_volt();
if ((volt >= 2400) && (volt <= 4300))
@@ -162,8 +162,8 @@ int mx28_is_batt_good(void)
void mx28_power_setup_5v_detect(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
/* Start 5V detection */
clrsetbits_le32(&power_regs->hw_power_5vctrl,
@@ -174,8 +174,8 @@ void mx28_power_setup_5v_detect(void)
void mx28_src_power_init(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
/* Improve efficieny and reduce transient ripple */
writel(POWER_LOOPCTRL_TOGGLE_DIF | POWER_LOOPCTRL_EN_CM_HYST |
@@ -205,8 +205,8 @@ void mx28_src_power_init(void)
void mx28_power_init_4p2_params(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
/* Setup 4P2 parameters */
clrsetbits_le32(&power_regs->hw_power_dcdc4p2,
@@ -229,8 +229,8 @@ void mx28_power_init_4p2_params(void)
void mx28_enable_4p2_dcdc_input(int xfer)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t tmp, vbus_thresh, vbus_5vdetect, pwd_bo;
uint32_t prev_5v_brnout, prev_5v_droop;
@@ -325,8 +325,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
void mx28_power_init_4p2_regulator(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t tmp, tmp2;
setbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_ENABLE_4P2);
@@ -409,8 +409,8 @@ void mx28_power_init_4p2_regulator(void)
void mx28_power_init_dcdc_4p2_source(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
if (!(readl(&power_regs->hw_power_dcdc4p2) &
POWER_DCDC4P2_ENABLE_DCDC)) {
@@ -431,8 +431,8 @@ void mx28_power_init_dcdc_4p2_source(void)
void mx28_power_enable_4p2(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t vdddctrl, vddactrl, vddioctrl;
uint32_t tmp;
@@ -490,8 +490,8 @@ void mx28_power_enable_4p2(void)
void mx28_boot_valid_5v(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
/*
* Use VBUSVALID level instead of VDD5V_GT_VDDIO level to trigger a 5V
@@ -513,8 +513,8 @@ void mx28_boot_valid_5v(void)
void mx28_powerdown(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
writel(POWER_RESET_UNLOCK_KEY, &power_regs->hw_power_reset);
writel(POWER_RESET_UNLOCK_KEY | POWER_RESET_PWD_OFF,
&power_regs->hw_power_reset);
@@ -522,8 +522,8 @@ void mx28_powerdown(void)
void mx28_batt_boot(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_PWDN_5VBRNOUT);
clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_ENABLE_DCDC);
@@ -566,8 +566,8 @@ void mx28_batt_boot(void)
void mx28_handle_5v_conflict(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t tmp;
setbits_le32(&power_regs->hw_power_vddioctrl,
@@ -598,8 +598,8 @@ void mx28_handle_5v_conflict(void)
void mx28_5v_boot(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
/*
* NOTE: In original IMX-Bootlets, this also checks for VBUSVALID,
@@ -621,8 +621,8 @@ void mx28_5v_boot(void)
void mx28_init_batt_bo(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
/* Brownout at 3V */
clrsetbits_le32(&power_regs->hw_power_battmonitor,
@@ -635,8 +635,8 @@ void mx28_init_batt_bo(void)
void mx28_switch_vddd_to_dcdc_source(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
clrsetbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_LINREG_OFFSET_MASK,
@@ -650,10 +650,10 @@ void mx28_switch_vddd_to_dcdc_source(void)
void mx28_power_configure_power_source(void)
{
int batt_ready, batt_good;
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
- struct mx28_lradc_regs *lradc_regs =
- (struct mx28_lradc_regs *)MXS_LRADC_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
+ struct mxs_lradc_regs *lradc_regs =
+ (struct mxs_lradc_regs *)MXS_LRADC_BASE;
mx28_src_power_init();
@@ -690,8 +690,8 @@ void mx28_power_configure_power_source(void)
void mx28_enable_output_rail_protection(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
POWER_CTRL_VDDIO_BO_IRQ, &power_regs->hw_power_ctrl_clr);
@@ -708,8 +708,8 @@ void mx28_enable_output_rail_protection(void)
int mx28_get_vddio_power_source_off(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t tmp;
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
@@ -736,8 +736,8 @@ int mx28_get_vddio_power_source_off(void)
int mx28_get_vddd_power_source_off(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t tmp;
tmp = readl(&power_regs->hw_power_vdddctrl);
@@ -767,8 +767,8 @@ int mx28_get_vddd_power_source_off(void)
void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t cur_target, diff, bo_int = 0;
uint32_t powered_by_linreg = 0;
@@ -864,8 +864,8 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
uint32_t cur_target, diff, bo_int = 0;
uint32_t powered_by_linreg = 0;
@@ -968,8 +968,8 @@ void mx28_setup_batt_detect(void)
void mx28_power_init(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
mx28_power_clock2xtal();
mx28_power_clear_auto_restart();
@@ -998,8 +998,8 @@ void mx28_power_init(void)
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
void mx28_power_wait_pswitch(void)
{
- struct mx28_power_regs *power_regs =
- (struct mx28_power_regs *)MXS_POWER_BASE;
+ struct mxs_power_regs *power_regs =
+ (struct mxs_power_regs *)MXS_POWER_BASE;
while (!(readl(&power_regs->hw_power_sts) & POWER_STS_PSWITCH_MASK))
;
diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c
index 5b73f4a..c4b0f5e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/timer.c
+++ b/arch/arm/cpu/arm926ejs/mxs/timer.c
@@ -62,8 +62,8 @@ static inline unsigned long us_to_tick(unsigned long us)
int timer_init(void)
{
- struct mx28_timrot_regs *timrot_regs =
- (struct mx28_timrot_regs *)MXS_TIMROT_BASE;
+ struct mxs_timrot_regs *timrot_regs =
+ (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
/* Reset Timers and Rotary Encoder module */
mx28_reset_block(&timrot_regs->hw_timrot_rotctrl_reg);
@@ -84,8 +84,8 @@ int timer_init(void)
unsigned long long get_ticks(void)
{
- struct mx28_timrot_regs *timrot_regs =
- (struct mx28_timrot_regs *)MXS_TIMROT_BASE;
+ struct mxs_timrot_regs *timrot_regs =
+ (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
/* Current tick value */
uint32_t now = readl(&timrot_regs->hw_timrot_running_count0);
diff --git a/arch/arm/include/asm/arch-mxs/regs-apbh.h b/arch/arm/include/asm/arch-mxs/regs-apbh.h
index 7c6bd04..e18e677 100644
--- a/arch/arm/include/asm/arch-mxs/regs-apbh.h
+++ b/arch/arm/include/asm/arch-mxs/regs-apbh.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_apbh_regs {
+struct mxs_apbh_regs {
mxs_reg_32(hw_apbh_ctrl0)
mxs_reg_32(hw_apbh_ctrl1)
mxs_reg_32(hw_apbh_ctrl2)
diff --git a/arch/arm/include/asm/arch-mxs/regs-bch.h b/arch/arm/include/asm/arch-mxs/regs-bch.h
index 58517c4..40baa4d 100644
--- a/arch/arm/include/asm/arch-mxs/regs-bch.h
+++ b/arch/arm/include/asm/arch-mxs/regs-bch.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_bch_regs {
+struct mxs_bch_regs {
mxs_reg_32(hw_bch_ctrl)
mxs_reg_32(hw_bch_status0)
mxs_reg_32(hw_bch_mode)
diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl.h b/arch/arm/include/asm/arch-mxs/regs-clkctrl.h
index 127370b..b662fbe 100644
--- a/arch/arm/include/asm/arch-mxs/regs-clkctrl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_clkctrl_regs {
+struct mxs_clkctrl_regs {
mxs_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */
mxs_reg_32(hw_clkctrl_pll0ctrl1) /* 0x10 */
mxs_reg_32(hw_clkctrl_pll1ctrl0) /* 0x20 */
diff --git a/arch/arm/include/asm/arch-mxs/regs-digctl.h b/arch/arm/include/asm/arch-mxs/regs-digctl.h
index 5e4f564..e7cc4b4 100644
--- a/arch/arm/include/asm/arch-mxs/regs-digctl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-digctl.h
@@ -25,7 +25,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_digctl_regs {
+struct mxs_digctl_regs {
mxs_reg_32(hw_digctl_ctrl) /* 0x000 */
mxs_reg_32(hw_digctl_status) /* 0x010 */
mxs_reg_32(hw_digctl_hclkcount) /* 0x020 */
diff --git a/arch/arm/include/asm/arch-mxs/regs-gpmi.h b/arch/arm/include/asm/arch-mxs/regs-gpmi.h
index 190a570..624d618 100644
--- a/arch/arm/include/asm/arch-mxs/regs-gpmi.h
+++ b/arch/arm/include/asm/arch-mxs/regs-gpmi.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_gpmi_regs {
+struct mxs_gpmi_regs {
mxs_reg_32(hw_gpmi_ctrl0)
mxs_reg_32(hw_gpmi_compare)
mxs_reg_32(hw_gpmi_eccctrl)
diff --git a/arch/arm/include/asm/arch-mxs/regs-i2c.h b/arch/arm/include/asm/arch-mxs/regs-i2c.h
index 418a3c0..067cfd3 100644
--- a/arch/arm/include/asm/arch-mxs/regs-i2c.h
+++ b/arch/arm/include/asm/arch-mxs/regs-i2c.h
@@ -26,7 +26,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_i2c_regs {
+struct mxs_i2c_regs {
mxs_reg_32(hw_i2c_ctrl0)
mxs_reg_32(hw_i2c_timing0)
mxs_reg_32(hw_i2c_timing1)
diff --git a/arch/arm/include/asm/arch-mxs/regs-lcdif.h b/arch/arm/include/asm/arch-mxs/regs-lcdif.h
index 87bfa0d..b90b2d4 100644
--- a/arch/arm/include/asm/arch-mxs/regs-lcdif.h
+++ b/arch/arm/include/asm/arch-mxs/regs-lcdif.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_lcdif_regs {
+struct mxs_lcdif_regs {
mxs_reg_32(hw_lcdif_ctrl) /* 0x00 */
mxs_reg_32(hw_lcdif_ctrl1) /* 0x10 */
mxs_reg_32(hw_lcdif_ctrl2) /* 0x20 */
diff --git a/arch/arm/include/asm/arch-mxs/regs-lradc.h b/arch/arm/include/asm/arch-mxs/regs-lradc.h
index 0054c23..28d8382 100644
--- a/arch/arm/include/asm/arch-mxs/regs-lradc.h
+++ b/arch/arm/include/asm/arch-mxs/regs-lradc.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_lradc_regs {
+struct mxs_lradc_regs {
mxs_reg_32(hw_lradc_ctrl0);
mxs_reg_32(hw_lradc_ctrl1);
mxs_reg_32(hw_lradc_ctrl2);
diff --git a/arch/arm/include/asm/arch-mxs/regs-ocotp.h b/arch/arm/include/asm/arch-mxs/regs-ocotp.h
index a2ac6a2..3269892 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ocotp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ocotp.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_ocotp_regs {
+struct mxs_ocotp_regs {
mxs_reg_32(hw_ocotp_ctrl) /* 0x0 */
mxs_reg_32(hw_ocotp_data) /* 0x10 */
mxs_reg_32(hw_ocotp_cust0) /* 0x20 */
diff --git a/arch/arm/include/asm/arch-mxs/regs-pinctrl.h b/arch/arm/include/asm/arch-mxs/regs-pinctrl.h
index ca1d791..d584170 100644
--- a/arch/arm/include/asm/arch-mxs/regs-pinctrl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-pinctrl.h
@@ -29,7 +29,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_pinctrl_regs {
+struct mxs_pinctrl_regs {
mxs_reg_32(hw_pinctrl_ctrl) /* 0x0 */
uint32_t reserved1[60];
diff --git a/arch/arm/include/asm/arch-mxs/regs-power.h b/arch/arm/include/asm/arch-mxs/regs-power.h
index 3c9e3b0..a46a372 100644
--- a/arch/arm/include/asm/arch-mxs/regs-power.h
+++ b/arch/arm/include/asm/arch-mxs/regs-power.h
@@ -25,7 +25,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_power_regs {
+struct mxs_power_regs {
mxs_reg_32(hw_power_ctrl)
mxs_reg_32(hw_power_5vctrl)
mxs_reg_32(hw_power_minpwr)
diff --git a/arch/arm/include/asm/arch-mxs/regs-rtc.h b/arch/arm/include/asm/arch-mxs/regs-rtc.h
index 0b660ae..6b2dd33 100644
--- a/arch/arm/include/asm/arch-mxs/regs-rtc.h
+++ b/arch/arm/include/asm/arch-mxs/regs-rtc.h
@@ -26,7 +26,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_rtc_regs {
+struct mxs_rtc_regs {
mxs_reg_32(hw_rtc_ctrl)
mxs_reg_32(hw_rtc_stat)
mxs_reg_32(hw_rtc_milliseconds)
diff --git a/arch/arm/include/asm/arch-mxs/regs-ssp.h b/arch/arm/include/asm/arch-mxs/regs-ssp.h
index 85b9894..cf52a28 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ssp.h
@@ -28,7 +28,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_ssp_regs {
+struct mxs_ssp_regs {
mxs_reg_32(hw_ssp_ctrl0)
mxs_reg_32(hw_ssp_cmd0)
mxs_reg_32(hw_ssp_cmd1)
diff --git a/arch/arm/include/asm/arch-mxs/regs-timrot.h b/arch/arm/include/asm/arch-mxs/regs-timrot.h
index 332654f..529a3bc 100644
--- a/arch/arm/include/asm/arch-mxs/regs-timrot.h
+++ b/arch/arm/include/asm/arch-mxs/regs-timrot.h
@@ -28,7 +28,7 @@
#include <asm/arch/regs-common.h>
#ifndef __ASSEMBLY__
-struct mx28_timrot_regs {
+struct mxs_timrot_regs {
mxs_reg_32(hw_timrot_rotctrl)
mxs_reg_32(hw_timrot_rotcount)
mxs_reg_32(hw_timrot_timctrl0)
diff --git a/arch/arm/include/asm/arch-mxs/regs-usb.h b/arch/arm/include/asm/arch-mxs/regs-usb.h
index ea61de8..d8bcd77 100644
--- a/arch/arm/include/asm/arch-mxs/regs-usb.h
+++ b/arch/arm/include/asm/arch-mxs/regs-usb.h
@@ -23,7 +23,7 @@
#ifndef __REGS_USB_H__
#define __REGS_USB_H__
-struct mx28_usb_regs {
+struct mxs_usb_regs {
uint32_t hw_usbctrl_id; /* 0x000 */
uint32_t hw_usbctrl_hwgeneral; /* 0x004 */
uint32_t hw_usbctrl_hwhost; /* 0x008 */
diff --git a/arch/arm/include/asm/arch-mxs/regs-usbphy.h b/arch/arm/include/asm/arch-mxs/regs-usbphy.h
index 5dd5125..288e8fa 100644
--- a/arch/arm/include/asm/arch-mxs/regs-usbphy.h
+++ b/arch/arm/include/asm/arch-mxs/regs-usbphy.h
@@ -23,7 +23,7 @@
#ifndef __REGS_USBPHY_H__
#define __REGS_USBPHY_H__
-struct mx28_usbphy_regs {
+struct mxs_usbphy_regs {
mxs_reg_32(hw_usbphy_pwd)
mxs_reg_32(hw_usbphy_tx)
mxs_reg_32(hw_usbphy_rx)
diff --git a/board/bluegiga/apx4devkit/apx4devkit.c b/board/bluegiga/apx4devkit/apx4devkit.c
index c89c6aa..87f3f35 100644
--- a/board/bluegiga/apx4devkit/apx4devkit.c
+++ b/board/bluegiga/apx4devkit/apx4devkit.c
@@ -122,8 +122,8 @@ int board_eth_init(bd_t *bis)
#define MXS_OCOTP_MAX_TIMEOUT 1000000
void get_board_serial(struct tag_serialnr *serialnr)
{
- struct mx28_ocotp_regs *ocotp_regs =
- (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;
+ struct mxs_ocotp_regs *ocotp_regs =
+ (struct mxs_ocotp_regs *)MXS_OCOTP_BASE;
serialnr->high = 0;
serialnr->low = 0;
diff --git a/board/denx/m28evk/m28evk.c b/board/denx/m28evk/m28evk.c
index 3d28ea8..74da3ea 100644
--- a/board/denx/m28evk/m28evk.c
+++ b/board/denx/m28evk/m28evk.c
@@ -122,8 +122,8 @@ int fecmxc_mii_postcall(int phy)
int board_eth_init(bd_t *bis)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
struct eth_device *dev;
int ret;
diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c
index 1bc83e9..1320277 100644
--- a/board/freescale/mx28evk/mx28evk.c
+++ b/board/freescale/mx28evk/mx28evk.c
@@ -115,8 +115,8 @@ int fecmxc_mii_postcall(int phy)
int board_eth_init(bd_t *bis)
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
struct eth_device *dev;
int ret;
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index cb2193e..38eff4f 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -76,8 +76,8 @@ static unsigned int mxs_dma_cmd_address(struct mxs_dma_desc *desc)
*/
static int mxs_dma_read_semaphore(int channel)
{
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
uint32_t tmp;
int ret;
@@ -119,8 +119,8 @@ inline void mxs_dma_flush_desc(struct mxs_dma_desc *desc) {}
*/
static int mxs_dma_enable(int channel)
{
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
unsigned int sem;
struct mxs_dma_chan *pchan;
struct mxs_dma_desc *pdesc;
@@ -191,8 +191,8 @@ static int mxs_dma_enable(int channel)
static int mxs_dma_disable(int channel)
{
struct mxs_dma_chan *pchan;
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
int ret;
ret = mxs_dma_validate_chan(channel);
@@ -220,8 +220,8 @@ static int mxs_dma_disable(int channel)
*/
static int mxs_dma_reset(int channel)
{
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
int ret;
ret = mxs_dma_validate_chan(channel);
@@ -241,8 +241,8 @@ static int mxs_dma_reset(int channel)
*/
static int mxs_dma_enable_irq(int channel, int enable)
{
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
int ret;
ret = mxs_dma_validate_chan(channel);
@@ -267,8 +267,8 @@ static int mxs_dma_enable_irq(int channel, int enable)
*/
static int mxs_dma_ack_irq(int channel)
{
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
int ret;
ret = mxs_dma_validate_chan(channel);
@@ -504,8 +504,8 @@ static int mxs_dma_finish(int channel, struct list_head *head)
*/
static int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan)
{
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
int ret;
ret = mxs_dma_validate_chan(chan);
@@ -554,8 +554,8 @@ int mxs_dma_go(int chan)
*/
void mxs_dma_init(void)
{
- struct mx28_apbh_regs *apbh_regs =
- (struct mx28_apbh_regs *)MXS_APBH_BASE;
+ struct mxs_apbh_regs *apbh_regs =
+ (struct mxs_apbh_regs *)MXS_APBH_BASE;
mx28_reset_block(&apbh_regs->hw_apbh_ctrl0_reg);
diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
index 48aaaa6..5d61d7a 100644
--- a/drivers/i2c/mxs_i2c.c
+++ b/drivers/i2c/mxs_i2c.c
@@ -38,7 +38,7 @@
void mxs_i2c_reset(void)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
int ret;
ret = mx28_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
@@ -57,7 +57,7 @@ void mxs_i2c_reset(void)
void mxs_i2c_setup_read(uint8_t chip, int len)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
@@ -76,7 +76,7 @@ void mxs_i2c_setup_read(uint8_t chip, int len)
void mxs_i2c_write(uchar chip, uint addr, int alen,
uchar *buf, int blen, int stop)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
uint32_t data;
int i, remain, off;
@@ -119,7 +119,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen,
int mxs_i2c_wait_for_ack(void)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
uint32_t tmp;
int timeout = MXS_I2C_MAX_TIMEOUT;
@@ -157,7 +157,7 @@ err:
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
uint32_t tmp = 0;
int ret;
int i;
@@ -212,7 +212,7 @@ int i2c_probe(uchar chip)
void i2c_init(int speed, int slaveadd)
{
- struct mx28_i2c_regs *i2c_regs = (struct mx28_i2c_regs *)MXS_I2C0_BASE;
+ struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
mxs_i2c_reset();
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 4187a94..b7ad9ca 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -52,7 +52,7 @@
struct mxsmmc_priv {
int id;
- struct mx28_ssp_regs *regs;
+ struct mxs_ssp_regs *regs;
uint32_t clkseq_bypass;
uint32_t *clkctrl_ssp;
uint32_t buswidth;
@@ -70,7 +70,7 @@ static int
mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
{
struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv;
- struct mx28_ssp_regs *ssp_regs = priv->regs;
+ struct mxs_ssp_regs *ssp_regs = priv->regs;
uint32_t reg;
int timeout;
uint32_t data_count;
@@ -282,7 +282,7 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
static void mxsmmc_set_ios(struct mmc *mmc)
{
struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv;
- struct mx28_ssp_regs *ssp_regs = priv->regs;
+ struct mxs_ssp_regs *ssp_regs = priv->regs;
/* Set the clock speed */
if (mmc->clock)
@@ -311,7 +311,7 @@ static void mxsmmc_set_ios(struct mmc *mmc)
static int mxsmmc_init(struct mmc *mmc)
{
struct mxsmmc_priv *priv = (struct mxsmmc_priv *)mmc->priv;
- struct mx28_ssp_regs *ssp_regs = priv->regs;
+ struct mxs_ssp_regs *ssp_regs = priv->regs;
/* Reset SSP */
mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
@@ -335,8 +335,8 @@ static int mxsmmc_init(struct mmc *mmc)
int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
{
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
struct mmc *mmc = NULL;
struct mxsmmc_priv *priv = NULL;
int ret;
@@ -366,22 +366,22 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
priv->id = id;
switch (id) {
case 0:
- priv->regs = (struct mx28_ssp_regs *)MXS_SSP0_BASE;
+ priv->regs = (struct mxs_ssp_regs *)MXS_SSP0_BASE;
priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP0;
priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp0;
break;
case 1:
- priv->regs = (struct mx28_ssp_regs *)MXS_SSP1_BASE;
+ priv->regs = (struct mxs_ssp_regs *)MXS_SSP1_BASE;
priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP1;
priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp1;
break;
case 2:
- priv->regs = (struct mx28_ssp_regs *)MXS_SSP2_BASE;
+ priv->regs = (struct mxs_ssp_regs *)MXS_SSP2_BASE;
priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP2;
priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp2;
break;
case 3:
- priv->regs = (struct mx28_ssp_regs *)MXS_SSP3_BASE;
+ priv->regs = (struct mxs_ssp_regs *)MXS_SSP3_BASE;
priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP3;
priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp3;
break;
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 9c95811..807c9fd 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -233,7 +233,7 @@ static uint32_t mxs_nand_mark_bit_offset(struct mtd_info *mtd)
*/
static int mxs_nand_wait_for_bch_complete(void)
{
- struct mx28_bch_regs *bch_regs = (struct mx28_bch_regs *)MXS_BCH_BASE;
+ struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
int timeout = MXS_NAND_BCH_TIMEOUT;
int ret;
@@ -338,8 +338,8 @@ static int mxs_nand_device_ready(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd->priv;
struct mxs_nand_info *nand_info = chip->priv;
- struct mx28_gpmi_regs *gpmi_regs =
- (struct mx28_gpmi_regs *)MXS_GPMI_BASE;
+ struct mxs_gpmi_regs *gpmi_regs =
+ (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
uint32_t tmp;
tmp = readl(&gpmi_regs->hw_gpmi_stat);
@@ -968,7 +968,7 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd)
{
struct nand_chip *nand = mtd->priv;
struct mxs_nand_info *nand_info = nand->priv;
- struct mx28_bch_regs *bch_regs = (struct mx28_bch_regs *)MXS_BCH_BASE;
+ struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
uint32_t tmp;
/* Configure BCH and set NFC geometry */
@@ -1056,8 +1056,8 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
*/
int mxs_nand_init(struct mxs_nand_info *info)
{
- struct mx28_gpmi_regs *gpmi_regs =
- (struct mx28_gpmi_regs *)MXS_GPMI_BASE;
+ struct mxs_gpmi_regs *gpmi_regs =
+ (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
int i = 0, j;
info->desc = malloc(sizeof(struct mxs_dma_desc *) *
diff --git a/drivers/rtc/mxsrtc.c b/drivers/rtc/mxsrtc.c
index 5beb1a0..72f7400 100644
--- a/drivers/rtc/mxsrtc.c
+++ b/drivers/rtc/mxsrtc.c
@@ -31,7 +31,7 @@
/* Set time in seconds since 1970-01-01 */
int mxs_rtc_set_time(uint32_t secs)
{
- struct mx28_rtc_regs *rtc_regs = (struct mx28_rtc_regs *)MXS_RTC_BASE;
+ struct mxs_rtc_regs *rtc_regs = (struct mxs_rtc_regs *)MXS_RTC_BASE;
int ret;
writel(secs, &rtc_regs->hw_rtc_seconds);
@@ -52,7 +52,7 @@ int mxs_rtc_set_time(uint32_t secs)
int rtc_get(struct rtc_time *time)
{
- struct mx28_rtc_regs *rtc_regs = (struct mx28_rtc_regs *)MXS_RTC_BASE;
+ struct mxs_rtc_regs *rtc_regs = (struct mxs_rtc_regs *)MXS_RTC_BASE;
uint32_t secs;
secs = readl(&rtc_regs->hw_rtc_seconds);
@@ -73,7 +73,7 @@ int rtc_set(struct rtc_time *time)
void rtc_reset(void)
{
- struct mx28_rtc_regs *rtc_regs = (struct mx28_rtc_regs *)MXS_RTC_BASE;
+ struct mxs_rtc_regs *rtc_regs = (struct mxs_rtc_regs *)MXS_RTC_BASE;
int ret;
/* Set time to 1970-01-01 */
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 4ff8474..bd834fb 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -55,7 +55,7 @@ struct mxs_spi_slave {
struct spi_slave slave;
uint32_t max_khz;
uint32_t mode;
- struct mx28_ssp_regs *regs;
+ struct mxs_ssp_regs *regs;
struct mxs_dma_desc *desc;
};
@@ -82,7 +82,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
{
struct mxs_spi_slave *mxs_slave;
uint32_t addr;
- struct mx28_ssp_regs *ssp_regs;
+ struct mxs_ssp_regs *ssp_regs;
int reg;
struct mxs_dma_desc *desc;
@@ -108,7 +108,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
mxs_slave->slave.cs = cs;
mxs_slave->max_khz = max_hz / 1000;
mxs_slave->mode = mode;
- mxs_slave->regs = (struct mx28_ssp_regs *)addr;
+ mxs_slave->regs = (struct mxs_ssp_regs *)addr;
mxs_slave->desc = desc;
ssp_regs = mxs_slave->regs;
@@ -136,7 +136,7 @@ void spi_free_slave(struct spi_slave *slave)
int spi_claim_bus(struct spi_slave *slave)
{
struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
- struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
+ struct mxs_ssp_regs *ssp_regs = mxs_slave->regs;
uint32_t reg = 0;
mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
@@ -159,13 +159,13 @@ void spi_release_bus(struct spi_slave *slave)
{
}
-static void mxs_spi_start_xfer(struct mx28_ssp_regs *ssp_regs)
+static void mxs_spi_start_xfer(struct mxs_ssp_regs *ssp_regs)
{
writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set);
writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr);
}
-static void mxs_spi_end_xfer(struct mx28_ssp_regs *ssp_regs)
+static void mxs_spi_end_xfer(struct mxs_ssp_regs *ssp_regs)
{
writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr);
writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
@@ -174,7 +174,7 @@ static void mxs_spi_end_xfer(struct mx28_ssp_regs *ssp_regs)
static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
char *data, int length, int write, unsigned long flags)
{
- struct mx28_ssp_regs *ssp_regs = slave->regs;
+ struct mxs_ssp_regs *ssp_regs = slave->regs;
if (flags & SPI_XFER_BEGIN)
mxs_spi_start_xfer(ssp_regs);
@@ -223,14 +223,13 @@ static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave,
}
return 0;
-
}
static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave,
char *data, int length, int write, unsigned long flags)
{
struct mxs_dma_desc *desc = slave->desc;
- struct mx28_ssp_regs *ssp_regs = slave->regs;
+ struct mxs_ssp_regs *ssp_regs = slave->regs;
uint32_t ctrl0 = SSP_CTRL0_DATA_XFER;
uint32_t cache_data_count;
int dmach;
@@ -289,7 +288,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)
{
struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
- struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
+ struct mxs_ssp_regs *ssp_regs = mxs_slave->regs;
int len = bitlen / 8;
char dummy;
int write = 0;
diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index f32df51..e263747 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -39,8 +39,8 @@
#endif
static struct ehci_mxs {
- struct mx28_usb_regs *usb_regs;
- struct mx28_usbphy_regs *phy_regs;
+ struct mxs_usb_regs *usb_regs;
+ struct mxs_usbphy_regs *phy_regs;
} ehci_mxs;
int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int port)
@@ -60,8 +60,8 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int port)
return -1;
}
- mxs_usb->usb_regs = (struct mx28_usb_regs *)usb_base;
- mxs_usb->phy_regs = (struct mx28_usbphy_regs *)phy_base;
+ mxs_usb->usb_regs = (struct mxs_usb_regs *)usb_base;
+ mxs_usb->phy_regs = (struct mxs_usbphy_regs *)phy_base;
return 0;
}
@@ -77,8 +77,8 @@ int ehci_hcd_init(void)
uint32_t usb_base, cap_base;
struct mxs_register_32 *digctl_ctrl =
(struct mxs_register_32 *)HW_DIGCTL_CTRL;
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
ret = mxs_ehci_get_port(&ehci_mxs, CONFIG_EHCI_MXS_PORT);
if (ret)
@@ -121,8 +121,8 @@ int ehci_hcd_stop(void)
uint32_t tmp;
struct mxs_register_32 *digctl_ctrl =
(struct mxs_register_32 *)HW_DIGCTL_CTRL;
- struct mx28_clkctrl_regs *clkctrl_regs =
- (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
ret = mxs_ehci_get_port(&ehci_mxs, CONFIG_EHCI_MXS_PORT);
if (ret)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [PATCH v1 4/6] mxs: Reowork SPL to use 'mxs' prefix for methods
2012-08-05 19:05 [U-Boot] [PATCH v1 0/6] Rework for mxs SoC family support Otavio Salvador
` (2 preceding siblings ...)
2012-08-05 19:05 ` [U-Boot] [PATCH v1 3/6] mxs: prefix register structs " Otavio Salvador
@ 2012-08-05 19:05 ` Otavio Salvador
2012-08-05 19:05 ` [U-Boot] [PATCH v1 5/6] mxs: Clarify why we poweroff in case of brownout in 5v conflict Otavio Salvador
2012-08-05 19:05 ` [U-Boot] [PATCH v1 6/6] mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCs Otavio Salvador
5 siblings, 0 replies; 12+ messages in thread
From: Otavio Salvador @ 2012-08-05 19:05 UTC (permalink / raw)
To: u-boot
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
---
Changes in v1:
- rebase against imx/master
- rework due apx4devkit board addition
arch/arm/cpu/arm926ejs/mxs/mx28.c | 8 +-
.../cpu/arm926ejs/mxs/{mx28_init.h => mxs_init.h} | 14 +-
arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 20 +--
arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 6 +-
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 30 ++---
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 142 ++++++++++----------
arch/arm/include/asm/arch-mxs/sys_proto.h | 4 +-
board/bluegiga/apx4devkit/spl_boot.c | 4 +-
board/denx/m28evk/spl_boot.c | 2 +-
board/freescale/mx28evk/iomux.c | 2 +-
10 files changed, 116 insertions(+), 116 deletions(-)
rename arch/arm/cpu/arm926ejs/mxs/{mx28_init.h => mxs_init.h} (81%)
diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28.c b/arch/arm/cpu/arm926ejs/mxs/mx28.c
index dc271cf..a61f75b 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mx28.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mx28.c
@@ -222,8 +222,8 @@ static const char *get_cpu_rev(void)
int print_cpuinfo(void)
{
- struct mx28_spl_data *data = (struct mx28_spl_data *)
- ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
+ struct mxs_spl_data *data = (struct mxs_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
printf("CPU: Freescale i.MX%s rev%s at %d MHz\n",
get_cpu_type(),
@@ -322,8 +322,8 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
int mx28_dram_init(void)
{
- struct mx28_spl_data *data = (struct mx28_spl_data *)
- ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
+ struct mxs_spl_data *data = (struct mxs_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
if (data->mem_dram_size == 0) {
printf("MX28:\n"
diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28_init.h b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
similarity index 81%
rename from arch/arm/cpu/arm926ejs/mxs/mx28_init.h
rename to arch/arm/cpu/arm926ejs/mxs/mxs_init.h
index e3a4493..2ddc5bc 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mx28_init.h
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs_init.h
@@ -28,18 +28,18 @@
void early_delay(int delay);
-void mx28_power_init(void);
+void mxs_power_init(void);
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
-void mx28_power_wait_pswitch(void);
+void mxs_power_wait_pswitch(void);
#else
-static inline void mx28_power_wait_pswitch(void) { }
+static inline void mxs_power_wait_pswitch(void) { }
#endif
-void mx28_mem_init(void);
-uint32_t mx28_mem_get_size(void);
+void mxs_mem_init(void);
+uint32_t mxs_mem_get_size(void);
-void mx28_lradc_init(void);
-void mx28_lradc_enable_batt_measurement(void);
+void mxs_lradc_init(void);
+void mxs_lradc_enable_batt_measurement(void);
#endif /* __M28_INIT_H__ */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index a6dfca3..46f6770 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -31,7 +31,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
-#include "mx28_init.h"
+#include "mxs_init.h"
/*
* This delay function is intended to be used only in early stage of boot, where
@@ -58,7 +58,7 @@ const iomux_cfg_t iomux_boot[] = {
MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
};
-uint8_t mx28_get_bootmode_index(void)
+uint8_t mxs_get_bootmode_index(void)
{
uint8_t bootmode = 0;
int i;
@@ -92,22 +92,22 @@ uint8_t mx28_get_bootmode_index(void)
return i;
}
-void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
+void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size)
{
- struct mx28_spl_data *data = (struct mx28_spl_data *)
- ((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
- uint8_t bootmode = mx28_get_bootmode_index();
+ struct mxs_spl_data *data = (struct mxs_spl_data *)
+ ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
+ uint8_t bootmode = mxs_get_bootmode_index();
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
- mx28_power_init();
+ mxs_power_init();
- mx28_mem_init();
- data->mem_dram_size = mx28_mem_get_size();
+ mxs_mem_init();
+ data->mem_dram_size = mxs_mem_get_size();
data->boot_mode_idx = bootmode;
- mx28_power_wait_pswitch();
+ mxs_power_wait_pswitch();
}
/* Support aparatus */
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
index c1df81d..d90f0a1 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
@@ -28,9 +28,9 @@
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
-#include "mx28_init.h"
+#include "mxs_init.h"
-void mx28_lradc_init(void)
+void mxs_lradc_init(void)
{
struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
@@ -49,7 +49,7 @@ void mx28_lradc_init(void)
LRADC_CTRL4_LRADC6SELECT_CHANNEL10);
}
-void mx28_lradc_enable_batt_measurement(void)
+void mxs_lradc_enable_batt_measurement(void)
{
struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index e7ed5e0..88d1abe 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -29,7 +29,7 @@
#include <asm/arch/iomux-mx28.h>
#include <asm/arch/imx-regs.h>
-#include "mx28_init.h"
+#include "mxs_init.h"
static uint32_t mx28_dram_vals[] = {
0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -82,23 +82,23 @@ static uint32_t mx28_dram_vals[] = {
0x00000000, 0x00010001
};
-void __mx28_adjust_memory_params(uint32_t *dram_vals)
+void __mxs_adjust_memory_params(uint32_t *dram_vals)
{
}
-void mx28_adjust_memory_params(uint32_t *dram_vals)
- __attribute__((weak, alias("__mx28_adjust_memory_params")));
+void mxs_adjust_memory_params(uint32_t *dram_vals)
+ __attribute__((weak, alias("__mxs_adjust_memory_params")));
void init_mx28_200mhz_ddr2(void)
{
int i;
- mx28_adjust_memory_params(mx28_dram_vals);
+ mxs_adjust_memory_params(mx28_dram_vals);
for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
}
-void mx28_mem_init_clock(void)
+void mxs_mem_init_clock(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -129,7 +129,7 @@ void mx28_mem_init_clock(void)
early_delay(10000);
}
-void mx28_mem_setup_cpu_and_hbus(void)
+void mxs_mem_setup_cpu_and_hbus(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -161,7 +161,7 @@ void mx28_mem_setup_cpu_and_hbus(void)
early_delay(15000);
}
-void mx28_mem_setup_vdda(void)
+void mxs_mem_setup_vdda(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -172,7 +172,7 @@ void mx28_mem_setup_vdda(void)
&power_regs->hw_power_vddactrl);
}
-void mx28_mem_setup_vddd(void)
+void mxs_mem_setup_vddd(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -183,7 +183,7 @@ void mx28_mem_setup_vddd(void)
&power_regs->hw_power_vdddctrl);
}
-uint32_t mx28_mem_get_size(void)
+uint32_t mxs_mem_get_size(void)
{
uint32_t sz, da;
uint32_t *vt = (uint32_t *)0x20;
@@ -202,7 +202,7 @@ uint32_t mx28_mem_get_size(void)
return sz;
}
-void mx28_mem_init(void)
+void mxs_mem_init(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -219,9 +219,9 @@ void mx28_mem_init(void)
early_delay(11000);
- mx28_mem_init_clock();
+ mxs_mem_init_clock();
- mx28_mem_setup_vdda();
+ mxs_mem_setup_vdda();
/*
* Configure the DRAM registers
@@ -242,9 +242,9 @@ void mx28_mem_init(void)
while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
;
- mx28_mem_setup_vddd();
+ mxs_mem_setup_vddd();
early_delay(10000);
- mx28_mem_setup_cpu_and_hbus();
+ mxs_mem_setup_cpu_and_hbus();
}
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 763549e..c341960 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -28,9 +28,9 @@
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
-#include "mx28_init.h"
+#include "mxs_init.h"
-void mx28_power_clock2xtal(void)
+void mxs_power_clock2xtal(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -40,7 +40,7 @@ void mx28_power_clock2xtal(void)
&clkctrl_regs->hw_clkctrl_clkseq_set);
}
-void mx28_power_clock2pll(void)
+void mxs_power_clock2pll(void)
{
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -52,7 +52,7 @@ void mx28_power_clock2pll(void)
CLKCTRL_CLKSEQ_BYPASS_CPU);
}
-void mx28_power_clear_auto_restart(void)
+void mxs_power_clear_auto_restart(void)
{
struct mxs_rtc_regs *rtc_regs =
(struct mxs_rtc_regs *)MXS_RTC_BASE;
@@ -85,7 +85,7 @@ void mx28_power_clear_auto_restart(void)
;
}
-void mx28_power_set_linreg(void)
+void mxs_power_set_linreg(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -104,7 +104,7 @@ void mx28_power_set_linreg(void)
POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW);
}
-int mx28_get_batt_volt(void)
+int mxs_get_batt_volt(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -115,16 +115,16 @@ int mx28_get_batt_volt(void)
return volt;
}
-int mx28_is_batt_ready(void)
+int mxs_is_batt_ready(void)
{
- return (mx28_get_batt_volt() >= 3600);
+ return (mxs_get_batt_volt() >= 3600);
}
-int mx28_is_batt_good(void)
+int mxs_is_batt_good(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
- uint32_t volt = mx28_get_batt_volt();
+ uint32_t volt = mxs_get_batt_volt();
if ((volt >= 2400) && (volt <= 4300))
return 1;
@@ -145,7 +145,7 @@ int mx28_is_batt_good(void)
early_delay(500000);
- volt = mx28_get_batt_volt();
+ volt = mxs_get_batt_volt();
if (volt >= 3500)
return 0;
@@ -160,7 +160,7 @@ int mx28_is_batt_good(void)
return 0;
}
-void mx28_power_setup_5v_detect(void)
+void mxs_power_setup_5v_detect(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -172,7 +172,7 @@ void mx28_power_setup_5v_detect(void)
POWER_5VCTRL_PWRUP_VBUS_CMPS);
}
-void mx28_src_power_init(void)
+void mxs_src_power_init(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -203,7 +203,7 @@ void mx28_src_power_init(void)
clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
}
-void mx28_power_init_4p2_params(void)
+void mxs_power_init_4p2_params(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -227,7 +227,7 @@ void mx28_power_init_4p2_params(void)
0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
}
-void mx28_enable_4p2_dcdc_input(int xfer)
+void mxs_enable_4p2_dcdc_input(int xfer)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -323,7 +323,7 @@ void mx28_enable_4p2_dcdc_input(int xfer)
POWER_CTRL_ENIRQ_VDD5V_DROOP);
}
-void mx28_power_init_4p2_regulator(void)
+void mxs_power_init_4p2_regulator(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -346,7 +346,7 @@ void mx28_power_init_4p2_regulator(void)
* gradually to avoid large inrush current from the 5V cable which can
* cause transients/problems
*/
- mx28_enable_4p2_dcdc_input(0);
+ mxs_enable_4p2_dcdc_input(0);
if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) {
/*
@@ -407,7 +407,7 @@ void mx28_power_init_4p2_regulator(void)
writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr);
}
-void mx28_power_init_dcdc_4p2_source(void)
+void mxs_power_init_dcdc_4p2_source(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -417,7 +417,7 @@ void mx28_power_init_dcdc_4p2_source(void)
hang();
}
- mx28_enable_4p2_dcdc_input(1);
+ mxs_enable_4p2_dcdc_input(1);
if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) {
clrbits_le32(&power_regs->hw_power_dcdc4p2,
@@ -429,7 +429,7 @@ void mx28_power_init_dcdc_4p2_source(void)
}
}
-void mx28_power_enable_4p2(void)
+void mxs_power_enable_4p2(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -451,11 +451,11 @@ void mx28_power_enable_4p2(void)
setbits_le32(&power_regs->hw_power_vddioctrl,
POWER_VDDIOCTRL_DISABLE_FET | POWER_VDDIOCTRL_PWDN_BRNOUT);
- mx28_power_init_4p2_params();
- mx28_power_init_4p2_regulator();
+ mxs_power_init_4p2_params();
+ mxs_power_init_4p2_regulator();
/* Shutdown battery (none present) */
- if (!mx28_is_batt_ready()) {
+ if (!mxs_is_batt_ready()) {
clrbits_le32(&power_regs->hw_power_dcdc4p2,
POWER_DCDC4P2_BO_MASK);
writel(POWER_CTRL_DCDC4P2_BO_IRQ,
@@ -464,7 +464,7 @@ void mx28_power_enable_4p2(void)
&power_regs->hw_power_ctrl_clr);
}
- mx28_power_init_dcdc_4p2_source();
+ mxs_power_init_dcdc_4p2_source();
writel(vdddctrl, &power_regs->hw_power_vdddctrl);
early_delay(20);
@@ -488,7 +488,7 @@ void mx28_power_enable_4p2(void)
&power_regs->hw_power_charge_clr);
}
-void mx28_boot_valid_5v(void)
+void mxs_boot_valid_5v(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -508,10 +508,10 @@ void mx28_boot_valid_5v(void)
writel(POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_VDD5V_GT_VDDIO_IRQ,
&power_regs->hw_power_ctrl_clr);
- mx28_power_enable_4p2();
+ mxs_power_enable_4p2();
}
-void mx28_powerdown(void)
+void mxs_powerdown(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -520,7 +520,7 @@ void mx28_powerdown(void)
&power_regs->hw_power_reset);
}
-void mx28_batt_boot(void)
+void mxs_batt_boot(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -542,7 +542,7 @@ void mx28_batt_boot(void)
clrsetbits_le32(&power_regs->hw_power_minpwr,
POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS);
- mx28_power_set_linreg();
+ mxs_power_set_linreg();
clrbits_le32(&power_regs->hw_power_vdddctrl,
POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG);
@@ -564,7 +564,7 @@ void mx28_batt_boot(void)
0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
}
-void mx28_handle_5v_conflict(void)
+void mxs_handle_5v_conflict(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -577,26 +577,26 @@ void mx28_handle_5v_conflict(void)
tmp = readl(&power_regs->hw_power_sts);
if (tmp & POWER_STS_VDDIO_BO) {
- mx28_powerdown();
+ mxs_powerdown();
break;
}
if (tmp & POWER_STS_VDD5V_GT_VDDIO) {
- mx28_boot_valid_5v();
+ mxs_boot_valid_5v();
break;
} else {
- mx28_powerdown();
+ mxs_powerdown();
break;
}
if (tmp & POWER_STS_PSWITCH_MASK) {
- mx28_batt_boot();
+ mxs_batt_boot();
break;
}
}
}
-void mx28_5v_boot(void)
+void mxs_5v_boot(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -606,20 +606,20 @@ void mx28_5v_boot(void)
* but their implementation always returns 1 so we omit it here.
*/
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
- mx28_boot_valid_5v();
+ mxs_boot_valid_5v();
return;
}
early_delay(1000);
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
- mx28_boot_valid_5v();
+ mxs_boot_valid_5v();
return;
}
- mx28_handle_5v_conflict();
+ mxs_handle_5v_conflict();
}
-void mx28_init_batt_bo(void)
+void mxs_init_batt_bo(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -633,7 +633,7 @@ void mx28_init_batt_bo(void)
writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr);
}
-void mx28_switch_vddd_to_dcdc_source(void)
+void mxs_switch_vddd_to_dcdc_source(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -647,7 +647,7 @@ void mx28_switch_vddd_to_dcdc_source(void)
POWER_VDDDCTRL_DISABLE_STEPPING);
}
-void mx28_power_configure_power_source(void)
+void mxs_power_configure_power_source(void)
{
int batt_ready, batt_good;
struct mxs_power_regs *power_regs =
@@ -655,15 +655,15 @@ void mx28_power_configure_power_source(void)
struct mxs_lradc_regs *lradc_regs =
(struct mxs_lradc_regs *)MXS_LRADC_BASE;
- mx28_src_power_init();
+ mxs_src_power_init();
- batt_ready = mx28_is_batt_ready();
+ batt_ready = mxs_is_batt_ready();
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
- batt_good = mx28_is_batt_good();
+ batt_good = mxs_is_batt_good();
if (batt_ready) {
/* 5V source detected, good battery detected. */
- mx28_batt_boot();
+ mxs_batt_boot();
} else {
if (batt_good) {
/* 5V source detected, low battery detceted. */
@@ -674,21 +674,21 @@ void mx28_power_configure_power_source(void)
clrbits_le32(&power_regs->hw_power_battmonitor,
POWER_BATTMONITOR_BATT_VAL_MASK);
}
- mx28_5v_boot();
+ mxs_5v_boot();
}
} else {
/* 5V not detected, booting from battery. */
- mx28_batt_boot();
+ mxs_batt_boot();
}
- mx28_power_clock2pll();
+ mxs_power_clock2pll();
- mx28_init_batt_bo();
+ mxs_init_batt_bo();
- mx28_switch_vddd_to_dcdc_source();
+ mxs_switch_vddd_to_dcdc_source();
}
-void mx28_enable_output_rail_protection(void)
+void mxs_enable_output_rail_protection(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -706,7 +706,7 @@ void mx28_enable_output_rail_protection(void)
POWER_VDDIOCTRL_PWDN_BRNOUT);
}
-int mx28_get_vddio_power_source_off(void)
+int mxs_get_vddio_power_source_off(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -734,7 +734,7 @@ int mx28_get_vddio_power_source_off(void)
}
-int mx28_get_vddd_power_source_off(void)
+int mxs_get_vddd_power_source_off(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -765,7 +765,7 @@ int mx28_get_vddd_power_source_off(void)
return 0;
}
-void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
+void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -779,7 +779,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
cur_target *= 50; /* 50 mV step*/
cur_target += 2800; /* 2800 mV lowest */
- powered_by_linreg = mx28_get_vddio_power_source_off();
+ powered_by_linreg = mxs_get_vddio_power_source_off();
if (new_target > cur_target) {
if (powered_by_linreg) {
@@ -862,7 +862,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
}
-void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
+void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
@@ -876,7 +876,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
cur_target *= 25; /* 25 mV step*/
cur_target += 800; /* 800 mV lowest */
- powered_by_linreg = mx28_get_vddd_power_source_off();
+ powered_by_linreg = mxs_get_vddd_power_source_off();
if (new_target > cur_target) {
if (powered_by_linreg) {
bo_int = readl(&power_regs->hw_power_vdddctrl);
@@ -959,31 +959,31 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
}
-void mx28_setup_batt_detect(void)
+void mxs_setup_batt_detect(void)
{
- mx28_lradc_init();
- mx28_lradc_enable_batt_measurement();
+ mxs_lradc_init();
+ mxs_lradc_enable_batt_measurement();
early_delay(10);
}
-void mx28_power_init(void)
+void mxs_power_init(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
- mx28_power_clock2xtal();
- mx28_power_clear_auto_restart();
- mx28_power_set_linreg();
- mx28_power_setup_5v_detect();
+ mxs_power_clock2xtal();
+ mxs_power_clear_auto_restart();
+ mxs_power_set_linreg();
+ mxs_power_setup_5v_detect();
- mx28_setup_batt_detect();
+ mxs_setup_batt_detect();
- mx28_power_configure_power_source();
- mx28_enable_output_rail_protection();
+ mxs_power_configure_power_source();
+ mxs_enable_output_rail_protection();
- mx28_power_set_vddio(3300, 3150);
+ mxs_power_set_vddio(3300, 3150);
- mx28_power_set_vddd(1350, 1200);
+ mxs_power_set_vddd(1350, 1200);
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |
@@ -996,7 +996,7 @@ void mx28_power_init(void)
}
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
-void mx28_power_wait_pswitch(void)
+void mxs_power_wait_pswitch(void)
{
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h b/arch/arm/include/asm/arch-mxs/sys_proto.h
index 7337458..91645eb 100644
--- a/arch/arm/include/asm/arch-mxs/sys_proto.h
+++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
@@ -35,7 +35,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
#ifdef CONFIG_SPL_BUILD
#include <asm/arch/iomux-mx28.h>
-void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
+void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size);
#endif
@@ -64,7 +64,7 @@ static const struct mx28_pair mx28_boot_modes[] = {
{ 0x00, 0x00, "Reserved/Unknown/Wrong" },
};
-struct mx28_spl_data {
+struct mxs_spl_data {
uint8_t boot_mode_idx;
uint32_t mem_dram_size;
};
diff --git a/board/bluegiga/apx4devkit/spl_boot.c b/board/bluegiga/apx4devkit/spl_boot.c
index 53e20da..f7dbe41 100644
--- a/board/bluegiga/apx4devkit/spl_boot.c
+++ b/board/bluegiga/apx4devkit/spl_boot.c
@@ -145,13 +145,13 @@ const iomux_cfg_t iomux_setup[] = {
void board_init_ll(void)
{
- mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
/* switch LED on */
gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
}
-void mx28_adjust_memory_params(uint32_t *dram_vals)
+void mxs_adjust_memory_params(uint32_t *dram_vals)
{
/*
* All address lines are routed from CPU to memory chip.
diff --git a/board/denx/m28evk/spl_boot.c b/board/denx/m28evk/spl_boot.c
index 7a12592..49e8a75 100644
--- a/board/denx/m28evk/spl_boot.c
+++ b/board/denx/m28evk/spl_boot.c
@@ -218,5 +218,5 @@ const iomux_cfg_t iomux_setup[] = {
void board_init_ll(void)
{
- mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
}
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index 40d8cf6..16a6d8a 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -180,5 +180,5 @@ void mx28_adjust_memory_params(uint32_t *dram_vals)
void board_init_ll(void)
{
- mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
}
--
1.7.10.4
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