Endianness of multi-bit 'gpios' property?

Endianness of multi-bit 'gpios' property?

[Timur Tabi]

When a 'gpios' property defines multiple GPIO pins, is there any kind of
expectation on the endian order of those pins?  For example, take this:

	gpios = <&gpio0 0 0
		 &gpio0 1 0>;

If I write a value of "2" to this GPIO pair, should I expect a value of 1
to be written to pin 0 and a value of 0 written to pin 1 (i.e.
big-endian), or the other way around?

I'm seeing some code that interprets the bits as big-endian, and some code
that interprets it as little-endian.

-- 
Timur Tabi
Linux kernel developer at Freescale

Endianness of multi-bit 'gpios' property?

[Timur Tabi]

When a 'gpios' property defines multiple GPIO pins, is there any kind of
expectation on the endian order of those pins?  For example, take this:

	gpios = <&gpio0 0 0
		 &gpio0 1 0>;

If I write a value of "2" to this GPIO pair, should I expect a value of 1
to be written to pin 0 and a value of 0 written to pin 1 (i.e.
big-endian), or the other way around?

I'm seeing some code that interprets the bits as big-endian, and some code
that interprets it as little-endian.

-- 
Timur Tabi
Linux kernel developer at Freescale