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From: cyril@ti.com (Cyril Chemparathy)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/22] ARM: add mechanism for late code patching
Date: Tue, 7 Aug 2012 18:52:53 -0400	[thread overview]
Message-ID: <50219C45.7030601@ti.com> (raw)
In-Reply-To: <alpine.LFD.2.02.1208040045360.5231@xanadu.home>

Hi Nicolas,

On 8/4/2012 1:38 AM, Nicolas Pitre wrote:
[...]
>> extern unsigned __patch_table_begin, __patch_table_end;
>
> You could use "exttern void __patch_table_begin" so those symbols don't
> get any type that could be misused by mistake, while you still can take
> their addresses.
>

Looks like we'll have to stick with a non-void type here.  The compiler 
throws a warning when we try to take the address of a void.

[...]
> Did you verify with some test program that your patching routines do
> produce the same opcodes as the assembled equivalent for all possible
> shift values?  Especially for Thumb2 code which isn't as trivial to get
> right as the ARM one.
>

We've refactored the patching code into separate functions as:

static int do_patch_imm8_arm(u32 insn, u32 imm, u32 *ninsn);
static int do_patch_imm8_thumb(u32 insn, u32 imm, u32 *ninsn);


With this, the following test code has been used to verify the generated 
instruction encoding:

u32 arm_check[] = {
	0xe2810041, 0xe2810082, 0xe2810f41, 0xe2810f82, 0xe2810e41,
	0xe2810e82, 0xe2810d41, 0xe2810d82, 0xe2810c41, 0xe2810c82,
	0xe2810b41, 0xe2810b82, 0xe2810a41, 0xe2810a82, 0xe2810941,
	0xe2810982, 0xe2810841, 0xe2810882, 0xe2810741, 0xe2810782,
	0xe2810641, 0xe2810682, 0xe2810541, 0xe2810582, 0xe2810441,
};

u32 thumb_check[] = {
	0xf1010081, 0xf5017081, 0xf5017001, 0xf5016081, 0xf5016001,
	0xf5015081, 0xf5015001, 0xf5014081, 0xf5014001, 0xf5013081,
	0xf5013001, 0xf5012081, 0xf5012001, 0xf5011081, 0xf5011001,
	0xf5010081, 0xf5010001, 0xf1017081, 0xf1017001, 0xf1016081,
	0xf1016001, 0xf1015081, 0xf1015001, 0xf1014081, 0xf1014001,
};

int do_test(void)
{
	int i, ret;
	u32 ninsn, insn;
	
	insn = arm_check[0];
	for (i = 0; i < ARRAY_SIZE(arm_check); i++) {
		ret = do_patch_imm8_arm(insn, 0x41 << i, &ninsn);
		if (ret < 0)
			pr_err("patch failed at shift %d\n", i);
		if (ninsn != arm_check[i])
			pr_err("mismatch at %d, expect %x, got %x\n",
			       i, arm_check[i], ninsn);
	}

	insn = thumb_check[0];
	for (i = 0; i < ARRAY_SIZE(thumb_check); i++) {
		ret = do_patch_imm8_thumb(insn, 0x81 << i, &ninsn);
		if (ret < 0)
			pr_err("patch failed at shift %d\n", i);
		if (ninsn != thumb_check[i])
			pr_err("mismatch@%d, expect %x, got %x\n",
			       i, thumb_check[i], ninsn);
	}
}

Any ideas on improving these tests?

-- 
Thanks
- Cyril

WARNING: multiple messages have this Message-ID (diff)
From: Cyril Chemparathy <cyril@ti.com>
To: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <arnd@arndb.de>,
	<catalin.marinas@arm.com>, <linux@arm.linux.org.uk>,
	<will.deacon@arm.com>
Subject: Re: [PATCH 01/22] ARM: add mechanism for late code patching
Date: Tue, 7 Aug 2012 18:52:53 -0400	[thread overview]
Message-ID: <50219C45.7030601@ti.com> (raw)
In-Reply-To: <alpine.LFD.2.02.1208040045360.5231@xanadu.home>

Hi Nicolas,

On 8/4/2012 1:38 AM, Nicolas Pitre wrote:
[...]
>> extern unsigned __patch_table_begin, __patch_table_end;
>
> You could use "exttern void __patch_table_begin" so those symbols don't
> get any type that could be misused by mistake, while you still can take
> their addresses.
>

Looks like we'll have to stick with a non-void type here.  The compiler 
throws a warning when we try to take the address of a void.

[...]
> Did you verify with some test program that your patching routines do
> produce the same opcodes as the assembled equivalent for all possible
> shift values?  Especially for Thumb2 code which isn't as trivial to get
> right as the ARM one.
>

We've refactored the patching code into separate functions as:

static int do_patch_imm8_arm(u32 insn, u32 imm, u32 *ninsn);
static int do_patch_imm8_thumb(u32 insn, u32 imm, u32 *ninsn);


With this, the following test code has been used to verify the generated 
instruction encoding:

u32 arm_check[] = {
	0xe2810041, 0xe2810082, 0xe2810f41, 0xe2810f82, 0xe2810e41,
	0xe2810e82, 0xe2810d41, 0xe2810d82, 0xe2810c41, 0xe2810c82,
	0xe2810b41, 0xe2810b82, 0xe2810a41, 0xe2810a82, 0xe2810941,
	0xe2810982, 0xe2810841, 0xe2810882, 0xe2810741, 0xe2810782,
	0xe2810641, 0xe2810682, 0xe2810541, 0xe2810582, 0xe2810441,
};

u32 thumb_check[] = {
	0xf1010081, 0xf5017081, 0xf5017001, 0xf5016081, 0xf5016001,
	0xf5015081, 0xf5015001, 0xf5014081, 0xf5014001, 0xf5013081,
	0xf5013001, 0xf5012081, 0xf5012001, 0xf5011081, 0xf5011001,
	0xf5010081, 0xf5010001, 0xf1017081, 0xf1017001, 0xf1016081,
	0xf1016001, 0xf1015081, 0xf1015001, 0xf1014081, 0xf1014001,
};

int do_test(void)
{
	int i, ret;
	u32 ninsn, insn;
	
	insn = arm_check[0];
	for (i = 0; i < ARRAY_SIZE(arm_check); i++) {
		ret = do_patch_imm8_arm(insn, 0x41 << i, &ninsn);
		if (ret < 0)
			pr_err("patch failed at shift %d\n", i);
		if (ninsn != arm_check[i])
			pr_err("mismatch at %d, expect %x, got %x\n",
			       i, arm_check[i], ninsn);
	}

	insn = thumb_check[0];
	for (i = 0; i < ARRAY_SIZE(thumb_check); i++) {
		ret = do_patch_imm8_thumb(insn, 0x81 << i, &ninsn);
		if (ret < 0)
			pr_err("patch failed at shift %d\n", i);
		if (ninsn != thumb_check[i])
			pr_err("mismatch at %d, expect %x, got %x\n",
			       i, thumb_check[i], ninsn);
	}
}

Any ideas on improving these tests?

-- 
Thanks
- Cyril

  parent reply	other threads:[~2012-08-07 22:52 UTC|newest]

Thread overview: 127+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-31 23:04 [PATCH 00/22] Introducing the TI Keystone platform Cyril Chemparathy
2012-07-31 23:04 ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 01/22] ARM: add mechanism for late code patching Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-04  5:38   ` Nicolas Pitre
2012-08-04  5:38     ` Nicolas Pitre
2012-08-05 13:56     ` Cyril Chemparathy
2012-08-05 13:56       ` Cyril Chemparathy
2012-08-07 22:52     ` Cyril Chemparathy [this message]
2012-08-07 22:52       ` Cyril Chemparathy
2012-08-08  5:56       ` Nicolas Pitre
2012-08-08  5:56         ` Nicolas Pitre
2012-08-08 13:18         ` Cyril Chemparathy
2012-08-08 13:18           ` Cyril Chemparathy
2012-08-08 13:55           ` Nicolas Pitre
2012-08-08 13:55             ` Nicolas Pitre
2012-08-08 16:05             ` Russell King - ARM Linux
2012-08-08 16:05               ` Russell King - ARM Linux
2012-08-08 16:56               ` Nicolas Pitre
2012-08-08 16:56                 ` Nicolas Pitre
2012-08-09  6:59                 ` Tixy
2012-08-09  6:59                   ` Tixy
2012-08-06 11:12   ` Russell King - ARM Linux
2012-08-06 11:12     ` Russell King - ARM Linux
2012-08-06 13:19     ` Cyril Chemparathy
2012-08-06 13:19       ` Cyril Chemparathy
2012-08-06 13:26       ` Russell King - ARM Linux
2012-08-06 13:26         ` Russell King - ARM Linux
2012-08-06 13:38         ` Cyril Chemparathy
2012-08-06 13:38           ` Cyril Chemparathy
2012-08-06 18:02         ` Nicolas Pitre
2012-08-06 18:02           ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 02/22] ARM: use late patch framework for phys-virt patching Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-04  6:15   ` Nicolas Pitre
2012-08-04  6:15     ` Nicolas Pitre
2012-08-05 14:03     ` Cyril Chemparathy
2012-08-05 14:03       ` Cyril Chemparathy
2012-08-06  2:06       ` Nicolas Pitre
2012-08-06  2:06         ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 03/22] ARM: LPAE: use phys_addr_t on virt <--> phys conversion Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-04  6:24   ` Nicolas Pitre
2012-08-04  6:24     ` Nicolas Pitre
2012-08-05 14:05     ` Cyril Chemparathy
2012-08-05 14:05       ` Cyril Chemparathy
2012-08-06 11:14   ` Russell King - ARM Linux
2012-08-06 11:14     ` Russell King - ARM Linux
2012-08-06 13:30     ` Cyril Chemparathy
2012-08-06 13:30       ` Cyril Chemparathy
2012-08-09 14:10     ` Cyril Chemparathy
2012-08-09 14:10       ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 04/22] ARM: LPAE: support 64-bit virt/phys patching Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-04  6:49   ` Nicolas Pitre
2012-08-04  6:49     ` Nicolas Pitre
2012-08-05 14:21     ` Cyril Chemparathy
2012-08-05 14:21       ` Cyril Chemparathy
2012-08-06  2:19       ` Nicolas Pitre
2012-08-06  2:19         ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 05/22] ARM: LPAE: use signed arithmetic for mask definitions Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 06/22] ARM: LPAE: use phys_addr_t in alloc_init_pud() Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-01 12:08   ` Sergei Shtylyov
2012-08-01 12:08     ` Sergei Shtylyov
2012-08-01 15:42     ` Cyril Chemparathy
2012-08-01 15:42       ` Cyril Chemparathy
2012-08-04  6:51   ` Nicolas Pitre
2012-08-04  6:51     ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 07/22] ARM: LPAE: use phys_addr_t in free_memmap() Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-04  6:54   ` Nicolas Pitre
2012-08-04  6:54     ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 08/22] ARM: LPAE: use phys_addr_t for initrd location and size Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-04  6:57   ` Nicolas Pitre
2012-08-04  6:57     ` Nicolas Pitre
2012-08-05 14:23     ` Cyril Chemparathy
2012-08-05 14:23       ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 09/22] ARM: LPAE: use 64-bit pgd physical address in switch_mm() Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-08-04  7:04   ` Nicolas Pitre
2012-08-04  7:04     ` Nicolas Pitre
2012-08-05 14:29     ` Cyril Chemparathy
2012-08-05 14:29       ` Cyril Chemparathy
2012-08-06  2:35       ` Nicolas Pitre
2012-08-06  2:35         ` Nicolas Pitre
2012-07-31 23:04 ` [PATCH 10/22] ARM: LPAE: use 64-bit accessors for TTBR registers Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 11/22] ARM: LPAE: define ARCH_LOW_ADDRESS_LIMIT for bootmem Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 12/22] ARM: LPAE: factor out T1SZ and TTBR1 computations Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 13/22] ARM: LPAE: allow proc override of TTB setup Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 14/22] ARM: LPAE: accomodate >32-bit addresses for page table base Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 15/22] ARM: mm: use physical addresses in highmem sanity checks Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 16/22] ARM: mm: cleanup checks for membank overlap with vmalloc area Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 17/22] ARM: mm: clean up membank size limit checks Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 18/22] ARM: add virt_to_idmap for interconnect aliasing Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [PATCH 19/22] ARM: recreate kernel mappings in early_paging_init() Cyril Chemparathy
2012-07-31 23:04   ` Cyril Chemparathy
2012-07-31 23:04 ` [RFC 20/22] ARM: keystone: introducing TI Keystone platform Cyril Chemparathy
2012-07-31 23:06   ` Cyril Chemparathy
2012-07-31 23:16   ` Arnd Bergmann
2012-07-31 23:16     ` Arnd Bergmann
2012-08-01 15:41     ` Cyril Chemparathy
2012-08-01 15:41       ` Cyril Chemparathy
2012-08-01 17:20       ` Arnd Bergmann
2012-07-31 23:04 ` [RFC 21/22] ARM: keystone: enable SMP on Keystone machines Cyril Chemparathy
2012-07-31 23:05   ` Cyril Chemparathy
2012-07-31 23:04 ` [RFC 22/22] ARM: keystone: add switch over to high physical address range Cyril Chemparathy
2012-07-31 23:05   ` Cyril Chemparathy
2012-08-04  8:39 ` [PATCH 00/22] Introducing the TI Keystone platform Russell King - ARM Linux
2012-08-04  8:39   ` Russell King - ARM Linux
2012-08-05 15:10   ` Cyril Chemparathy
2012-08-05 15:10     ` Cyril Chemparathy
2012-08-08 15:43     ` Catalin Marinas
2012-08-08 15:43       ` Catalin Marinas
2012-08-08 13:57 ` Will Deacon
2012-08-08 13:57   ` Will Deacon

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