From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: "AnilKumar, Chimata" <anilkumar@ti.com>
Cc: "linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
"tony@atomide.com" <tony@atomide.com>,
"Cousson, Benoit" <b-cousson@ti.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree-discuss@lists.ozlabs.org"
<devicetree-discuss@lists.ozlabs.org>,
"grant.likely@secretlab.ca" <grant.likely@secretlab.ca>
Subject: Re: [PATCH RESEND v2 1/2] arm/dts: Add AM33XX basic pinctrl support
Date: Wed, 08 Aug 2012 15:05:44 +0300 [thread overview]
Message-ID: <50225618.9070501@ti.com> (raw)
In-Reply-To: <331ABD5ECB02734CA317220B2BBEABC13EA06E4B@DBDE01.ent.ti.com>
On 07/31/2012 04:37 PM, AnilKumar, Chimata wrote:
>> I'm just curious about the size here: how it ended up as 0x0338?
>> While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
>> 0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
>> documented at least.
>
> No, pinmux registers are available till 0x44E10B38, look at AM335x latest TRM
> or pinmux utility (we cannot find the exact offsets but pins we can find after
> 0x0A38, conf_ddr_resetn) at http://www.ti.com/tool/pinmuxtool
I have looked at the latest TRM (Rev F, SPRUH73F - public TRM) and there is
not mention of registers between 0x0a34 and 0x0e00.
I can not even find any reference of conf_ddr_resetn register either in the TRM.
I can not check with the pinmuxtool since it is crashing with wine under Linux.
There could be registers after 0x0a34, but they are not publicly documented...
--
Péter
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WARNING: multiple messages have this Message-ID (diff)
From: peter.ujfalusi@ti.com (Peter Ujfalusi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RESEND v2 1/2] arm/dts: Add AM33XX basic pinctrl support
Date: Wed, 08 Aug 2012 15:05:44 +0300 [thread overview]
Message-ID: <50225618.9070501@ti.com> (raw)
In-Reply-To: <331ABD5ECB02734CA317220B2BBEABC13EA06E4B@DBDE01.ent.ti.com>
On 07/31/2012 04:37 PM, AnilKumar, Chimata wrote:
>> I'm just curious about the size here: how it ended up as 0x0338?
>> While looking at the TRM of AM335x I can come up with 0x0238 (0x44e10800 -
>> 0x44e10a38), but I don't see any sings of the remaining 0x0100 to be
>> documented at least.
>
> No, pinmux registers are available till 0x44E10B38, look at AM335x latest TRM
> or pinmux utility (we cannot find the exact offsets but pins we can find after
> 0x0A38, conf_ddr_resetn) at http://www.ti.com/tool/pinmuxtool
I have looked at the latest TRM (Rev F, SPRUH73F - public TRM) and there is
not mention of registers between 0x0a34 and 0x0e00.
I can not even find any reference of conf_ddr_resetn register either in the TRM.
I can not check with the pinmuxtool since it is crashing with wine under Linux.
There could be registers after 0x0a34, but they are not publicly documented...
--
P?ter
next prev parent reply other threads:[~2012-08-08 12:06 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-24 15:45 [PATCH v3 0/2] Add pinctrl support to AM33XX family of devices AnilKumar Ch
2012-07-24 15:45 ` AnilKumar Ch
2012-07-24 15:45 ` [PATCH RESEND v2 1/2] arm/dts: Add AM33XX basic pinctrl support AnilKumar Ch
2012-07-24 15:45 ` AnilKumar Ch
2012-07-27 9:10 ` Peter Ujfalusi
2012-07-27 9:10 ` Peter Ujfalusi
2012-07-31 13:37 ` AnilKumar, Chimata
2012-07-31 13:37 ` AnilKumar, Chimata
2012-08-07 7:43 ` Tony Lindgren
2012-08-07 7:43 ` Tony Lindgren
2012-08-07 8:50 ` AnilKumar, Chimata
2012-08-07 8:50 ` AnilKumar, Chimata
2012-08-08 12:05 ` Peter Ujfalusi [this message]
2012-08-08 12:05 ` Peter Ujfalusi
2012-08-13 4:33 ` AnilKumar, Chimata
2012-08-13 4:33 ` AnilKumar, Chimata
2012-07-24 15:45 ` [PATCH v3 2/2] arm/dts: Configure pinmuxs for user leds control on Bone AnilKumar Ch
2012-07-24 15:45 ` AnilKumar Ch
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