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From: "Borah, Chaitanya Kumar" <chaitanya.kumar.borah@intel.com>
To: <intel-xe@lists.freedesktop.org>,
	<intel-gfx@lists.freedesktop.org>,
	<dri-devel@lists.freedesktop.org>
Cc: Harry Wentland <harry.wentland@amd.com>,
	Louis Chauvet <louis.chauvet@bootlin.com>,
	Melissa Wen <mwen@igalia.com>, Simon Ser <contact@emersion.fr>,
	Alex Hung <alex.hung@amd.com>,
	Daniel Stone <daniels@collabora.com>,
	Uma Shankar <uma.shankar@intel.com>,
	"Maarten Lankhorst" <maarten.lankhorst@intel.com>,
	Pekka Paalanen <pekka.paalanen@collabora.com>,
	Pranay Samala <pranay.samala@intel.com>,
	Swati Sharma <swati2.sharma@intel.com>,
	Naveen Kumar <naveen1.kumar@intel.com>,
	Robert Mader <robert.mader@collabora.com>
Subject: Re: [v6 0/9] drm/i915/color: Enable SDR plane color pipeline
Date: Wed, 16 Sep 2026 15:12:20 +0530	[thread overview]
Message-ID: <50260a2d-a529-4f42-ab37-b48d9d015d54@intel.com> (raw)
In-Reply-To: <20260804123107.2256124-1-chaitanya.kumar.borah@intel.com>



On 8/4/2026 6:00 PM, Chaitanya Kumar Borah wrote:
> This series adds color pipeline support for SDR planes in i915 and
> exposes the functionality to userspace through the DRM colorop
> framework.
> 
> In contrast to HDR planes, SDR planes have LUTs with smaller sizes
> and a fixed function CSC block in contrast to a programmable CTM.
> 
> The series first introduces a new DRM colorop type,
> DRM_COLOROP_FIXED_MATRIX, which represents fixed-function CSC blocks where
> userspace selects predefined hardware conversion modes instead of
> programming arbitrary matrices. It also adds the YUV correction HW block.
> With this the color pipeline can accept both limited range and full range
> YUV framebuffers.
> 
> With that, the SDR plane color pipeline looks like.
> 
> [YUV Range Correct] -> [1D LUT] -> [CSC] -> [1D LUT]

Thank you for the reviews, pushed to drm-intel-next.

> 
> v2:
>   - Naming changes [Pekka]
>   - Adds YUV color range correct block
> 
> v3:
>   - Fix NC matrix enum name and string [Melissa]
>   - Extract and simplify glk_plane_color_ctl_input_csc into
>     helpers (new prep patches)
>   - Restructure SDR pre/post-CSC LUT loops to match HDR function
>     pattern
>   - Drop HDR pre-CSC LUT clamping fix (submitted separately)
>   - Rebase
> 
> v4:
>   - For CI
>   - Rebase
> 
> v5:
> - Do not skip programming legacy property if color pipeline is not set.
>    Support for YUV buffers in color pipeline uAPI is a work in progress.
>    Therefore, color-pipeline-aware userspace might still use the legacy
>    COLOR_RANGE and COLOR_ENCODING property while keeping the color
>    pipeline to Bypass. Therefore, skip programming based on legacy
>    properties only when a color pipeline is set.
> 
> v6:
> - Drop YCbCr limited-to-full and RGB709-to-RGB2020 matrices
>    until there is a non-IGT userspace implementation. [Robert]
> - Drop pre-CSC LUT and YUV range correct blocks from the
>    pipeline in favor of a simpler [CSC] -> [1D LUT] pipeline.
>    The Fixed Matrix CSC handles both full and limited range
>    YCbCr conversions internally.
> 
> 
> IGT series (needs update): https://patchwork.freedesktop.org/series/165021/
> A rough updated IGT implementation with some additional test can be found here.
> https://github.com/ckborah/igt-sandbox/tree/color/sdr-sw-ref
> 
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Louis Chauvet <louis.chauvet@bootlin.com>
> Cc: Melissa Wen <mwen@igalia.com>
> Cc: Simon Ser <contact@emersion.fr>
> Cc: Alex Hung <alex.hung@amd.com>
> Cc: Daniel Stone <daniels@collabora.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
> Cc: Pekka Paalanen <pekka.paalanen@collabora.com>
> Cc: Pranay Samala <pranay.samala@intel.com>
> Cc: Swati Sharma <swati2.sharma@intel.com>
> Cc: Naveen Kumar <naveen1.kumar@intel.com>
> Cc: Robert Mader <robert.mader@collabora.com>
> 
> Chaitanya Kumar Borah (7):
>    drm/colorop: Add DRM_COLOROP_FIXED_MATRIX
>    drm/i915/color: Add CSC on SDR plane color pipeline
>    drm/i915/display: extract glk_plane_color_ctl_input_csc helper
>    drm/i915/display: simplify glk_plane_color_ctl_input_csc
>    drm/i915/display: Program CSC on SDR planes based on Fixed Matrix
>      Colorop
>    drm/i915/color: Add support for 1D LUT in SDR planes
>    drm/i915/color: Add color pipeline support for SDR planes
> 
> Pranay Samala (2):
>    drm/i915/color: Extract HDR post-CSC LUT programming to helper
>      function
>    drm/i915/color: Program Plane Post CSC registers for SDR planes
> 
>   drivers/gpu/drm/drm_atomic.c                  |   4 +
>   drivers/gpu/drm/drm_atomic_uapi.c             |   7 +
>   drivers/gpu/drm/drm_colorop.c                 | 107 +++++++++++++++
>   drivers/gpu/drm/i915/display/intel_color.c    |  76 ++++++++---
>   .../drm/i915/display/intel_color_pipeline.c   |  30 ++++-
>   .../drm/i915/display/intel_display_limits.h   |   1 +
>   .../drm/i915/display/intel_display_types.h    |   1 +
>   drivers/gpu/drm/i915/display/intel_plane.c    |  53 +++++++-
>   .../drm/i915/display/skl_universal_plane.c    |  42 +++---
>   include/drm/drm_colorop.h                     | 127 ++++++++++++++++++
>   include/uapi/drm/drm_mode.h                   |  12 ++
>   11 files changed, 420 insertions(+), 40 deletions(-)
> 


      parent reply	other threads:[~2026-09-16  9:42 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-04 12:30 [v6 0/9] drm/i915/color: Enable SDR plane color pipeline Chaitanya Kumar Borah
2026-08-04 12:30 ` [v6 1/9] drm/colorop: Add DRM_COLOROP_FIXED_MATRIX Chaitanya Kumar Borah
2026-08-04 12:31 ` [v6 2/9] drm/i915/color: Add CSC on SDR plane color pipeline Chaitanya Kumar Borah
2026-08-04 13:11   ` sashiko-bot
2026-09-01  7:36   ` Borah, Chaitanya Kumar
2026-08-04 12:31 ` [v6 3/9] drm/i915/display: extract glk_plane_color_ctl_input_csc helper Chaitanya Kumar Borah
2026-08-04 12:31 ` [v6 4/9] drm/i915/display: simplify glk_plane_color_ctl_input_csc Chaitanya Kumar Borah
2026-08-04 12:31 ` [v6 5/9] drm/i915/display: Program CSC on SDR planes based on Fixed Matrix Colorop Chaitanya Kumar Borah
2026-08-04 13:18   ` sashiko-bot
2026-08-31 13:14   ` Shankar, Uma
2026-08-04 12:31 ` [v6 6/9] drm/i915/color: Add support for 1D LUT in SDR planes Chaitanya Kumar Borah
2026-08-04 13:20   ` sashiko-bot
2026-08-31 13:24   ` Shankar, Uma
2026-08-31 13:38     ` Shankar, Uma
2026-09-01  7:37       ` Borah, Chaitanya Kumar
2026-09-01  7:46         ` Shankar, Uma
2026-08-04 12:31 ` [v6 7/9] drm/i915/color: Extract HDR post-CSC LUT programming to helper function Chaitanya Kumar Borah
2026-08-04 12:31 ` [v6 8/9] drm/i915/color: Program Plane Post CSC registers for SDR planes Chaitanya Kumar Borah
2026-08-04 12:31 ` [v6 9/9] drm/i915/color: Add color pipeline support " Chaitanya Kumar Borah
2026-08-04 13:29   ` sashiko-bot
2026-08-04 14:56 ` ✓ CI.KUnit: success for drm/i915/color: Enable SDR plane color pipeline (rev7) Patchwork
2026-08-04 15:32 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-05  0:12 ` ✓ Xe.CI.FULL: success " Patchwork
2026-08-05  2:24 ` ✓ i915.CI.BAT: " Patchwork
2026-08-05 14:15 ` ✓ i915.CI.Full: " Patchwork
2026-09-01 14:47 ` ✓ i915.CI.BAT: success for drm/i915/color: Enable SDR plane color pipeline (rev8) Patchwork
2026-09-01 20:14 ` ✗ i915.CI.Full: failure " Patchwork
2026-09-16  9:42 ` Borah, Chaitanya Kumar [this message]

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