* [PATCH v3 2/3] dw_dmac: max_mem_width limits value for SRC/DST_TR_WID register
@ 2012-09-01 3:05 Hein Tibosch
0 siblings, 0 replies; only message in thread
From: Hein Tibosch @ 2012-09-01 3:05 UTC (permalink / raw)
To: Andrew Morton, viresh kumar, Hans-Christian Egtvedt,
Arnd Bergmann
Cc: spear-devel, Linux Kernel Mailing List, ludovic.desroches,
Havard Skinnemoen, Nicolas Ferre
The dw_dmac driver was earlier adapted to do 64-bit transfers on the memory
side (see https://lkml.org/lkml/2012/1/18/52)
This works on ARM platforms but for AVR32 (AP700x) the maximum allowed transfer
size is 32-bits.
This patch allows the arch code to set a new slave property max_mem_width to
limit the size.
Allowable values are:
#define DW_MEM_WIDTH_64 0 /* default */
#define DW_MEM_WIDTH_32 1 /* e.g. for avr32 */
Signed-off-by: Hein Tibosch <hein_tibosch@yahoo.es>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
---
drivers/dma/dw_dmac.c | 10 +++++++---
include/linux/dw_dmac.h | 3 +++
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 7212961..11f8542 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -618,6 +618,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
size_t len, unsigned long flags)
{
struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
+ struct dw_dma_slave *dws = chan->private;
struct dw_desc *desc;
struct dw_desc *first;
struct dw_desc *prev;
@@ -639,7 +640,8 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
* We can be a lot more clever here, but this should take care
* of the most common optimization.
*/
- if (!((src | dest | len) & 7))
+ if (dws->max_mem_width == DW_MEM_WIDTH_64 &&
+ !((src | dest | len) & 7))
src_width = dst_width = 3;
else if (!((src | dest | len) & 3))
src_width = dst_width = 2;
@@ -746,7 +748,8 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
mem = sg_dma_address(sg);
len = sg_dma_len(sg);
- if (!((mem | len) & 7))
+ if (dws->max_mem_width == DW_MEM_WIDTH_64 &&
+ !((mem | len) & 7))
mem_width = 3;
else if (!((mem | len) & 3))
mem_width = 2;
@@ -813,7 +816,8 @@ slave_sg_todev_fill_desc:
mem = sg_dma_address(sg);
len = sg_dma_len(sg);
- if (!((mem | len) & 7))
+ if (dws->max_mem_width == DW_MEM_WIDTH_64 &&
+ !((mem | len) & 7))
mem_width = 3;
else if (!((mem | len) & 3))
mem_width = 2;
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index 2412e02..330afb2 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -58,6 +58,9 @@ struct dw_dma_slave {
u32 cfg_lo;
u8 src_master;
u8 dst_master;
+#define DW_MEM_WIDTH_64 0
+#define DW_MEM_WIDTH_32 1 /* e.g. for avr32 */
+ u8 max_mem_width;
};
/* Platform-configurable bits in CFG_HI */
--
1.7.8.0
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2012-09-01 3:05 [PATCH v3 2/3] dw_dmac: max_mem_width limits value for SRC/DST_TR_WID register Hein Tibosch
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