From: David Daney <ddaney.cavm@gmail.com>
To: "Steven J. Hill" <sjhill@mips.com>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: [PATCH 3/4] MIPS: Remove kernel_uses_smartmips_rixi from page table bits.
Date: Wed, 05 Sep 2012 14:16:27 -0700 [thread overview]
Message-ID: <5047C12B.9030002@gmail.com> (raw)
In-Reply-To: <1346876878-25965-4-git-send-email-sjhill@mips.com>
On 09/05/2012 01:27 PM, Steven J. Hill wrote:
> From: "Steven J. Hill" <sjhill@mips.com>
>
> Remove usage of the 'kernel_uses_smartmips_rixi' macro from all the
> page table bit definitions in 'arch/mips/include/asm' directory.
>
> Signed-off-by: Steven J. Hill <sjhill@mips.com>
> ---
> arch/mips/include/asm/pgtable-bits.h | 24 ++++++++++++++----------
> arch/mips/include/asm/pgtable.h | 12 ++++++------
> 2 files changed, 20 insertions(+), 16 deletions(-)
>
> diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
> index e9fe7e9..c266cba 100644
> --- a/arch/mips/include/asm/pgtable-bits.h
> +++ b/arch/mips/include/asm/pgtable-bits.h
> @@ -79,9 +79,9 @@
> /* implemented in software */
> #define _PAGE_PRESENT_SHIFT (0)
> #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
> -/* implemented in software, should be unused if kernel_uses_smartmips_rixi. */
> -#define _PAGE_READ_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
> -#define _PAGE_READ ({if (kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_READ_SHIFT; })
> +/* implemented in software, should be unused if cpu_has_ri. */
> +#define _PAGE_READ_SHIFT (cpu_has_ri ? _PAGE_PRESENT_SHIFT + 1: _PAGE_PRESENT_SHIFT)
As per IRC discussion, it would be nice if the shift value were not
dependent on runtime values (cpu_has_ri)
See this thread for ideas about this:
http://www.linux-mips.org/archives/linux-mips/2011-04/msg00102.html
> +#define _PAGE_READ ({if (!cpu_has_ri) BUG(); 1 << _PAGE_READ_SHIFT; })
> /* implemented in software */
> #define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
> #define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
> @@ -104,12 +104,12 @@
> #endif
>
> /* Page cannot be executed */
> -#define _PAGE_NO_EXEC_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT)
> -#define _PAGE_NO_EXEC ({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_EXEC_SHIFT; })
> +#define _PAGE_NO_EXEC_SHIFT (cpu_has_xi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT)
> +#define _PAGE_NO_EXEC ({if (!cpu_has_xi) BUG(); 1 << _PAGE_NO_EXEC_SHIFT; })
>
> /* Page cannot be read */
> -#define _PAGE_NO_READ_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT)
> -#define _PAGE_NO_READ ({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_READ_SHIFT; })
> +#define _PAGE_NO_READ_SHIFT (cpu_has_ri ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT)
> +#define _PAGE_NO_READ ({if (!cpu_has_ri) BUG(); 1 << _PAGE_NO_READ_SHIFT; })
>
> #define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
> #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
> @@ -155,20 +155,24 @@
> */
> static inline uint64_t pte_to_entrylo(unsigned long pte_val)
> {
> - if (kernel_uses_smartmips_rixi) {
> + if (cpu_has_ri | cpu_has_xi) {
> + unsigned long rixi;
> int sa;
> #ifdef CONFIG_32BIT
> sa = 31 - _PAGE_NO_READ_SHIFT;
> #else
> sa = 63 - _PAGE_NO_READ_SHIFT;
> #endif
> + rixi = ((cpu_has_ri ? _PAGE_NO_READ : 0) |
> + (cpu_has_xi ? _PAGE_NO_EXEC : 0));
> +
> /*
> * C has no way to express that this is a DSRL
> * _PAGE_NO_EXEC_SHIFT followed by a ROTR 2. Luckily
> * in the fast path this is done in assembly
> */
> return (pte_val >> _PAGE_GLOBAL_SHIFT) |
> - ((pte_val & (_PAGE_NO_EXEC | _PAGE_NO_READ)) << sa);
> + ((pte_val & rixi) << sa);
> }
>
> return pte_val >> _PAGE_GLOBAL_SHIFT;
> @@ -220,7 +224,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
>
> #endif
>
> -#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ))
> +#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_ri ? 0 : _PAGE_READ))
> #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
>
> #define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
> diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
> index b2202a6..748aa6a 100644
> --- a/arch/mips/include/asm/pgtable.h
> +++ b/arch/mips/include/asm/pgtable.h
> @@ -22,15 +22,15 @@ struct mm_struct;
> struct vm_area_struct;
>
> #define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
> -#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
> +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_ri ? 0 : _PAGE_READ) | \
> _page_cachable_default)
> -#define PAGE_COPY __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
> - (kernel_uses_smartmips_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default)
> -#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
> +#define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_ri ? 0 : _PAGE_READ) | \
> + (cpu_has_xi ? _PAGE_NO_EXEC : 0) | _page_cachable_default)
> +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_ri ? 0 : _PAGE_READ) | \
> _page_cachable_default)
> #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
> _PAGE_GLOBAL | _page_cachable_default)
> -#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
> +#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_ri ? 0 : _PAGE_READ) | _PAGE_WRITE | \
> _page_cachable_default)
> #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
> __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
> @@ -299,7 +299,7 @@ static inline pte_t pte_mkdirty(pte_t pte)
> static inline pte_t pte_mkyoung(pte_t pte)
> {
> pte_val(pte) |= _PAGE_ACCESSED;
> - if (kernel_uses_smartmips_rixi) {
> + if (cpu_has_ri) {
> if (!(pte_val(pte) & _PAGE_NO_READ))
> pte_val(pte) |= _PAGE_SILENT_READ;
> } else {
>
next prev parent reply other threads:[~2012-09-05 21:16 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-05 20:27 [PATCH 0/4] Add RI and XI bits to MIPS base architecture Steven J. Hill
2012-09-05 20:27 ` [PATCH 1/4] MIPS: Add base architecture support for RI and XI Steven J. Hill
2012-09-05 20:48 ` David Daney
2012-09-05 21:51 ` David Daney
2012-09-05 23:30 ` Kevin Cernekee
2012-09-05 20:27 ` [PATCH 2/4] MIPS: Remove kernel_uses_smartmips_rixi use from arch/mips/mm Steven J. Hill
2012-09-05 21:11 ` David Daney
2012-09-05 20:27 ` [PATCH 3/4] MIPS: Remove kernel_uses_smartmips_rixi from page table bits Steven J. Hill
2012-09-05 21:16 ` David Daney [this message]
2012-09-05 20:27 ` [PATCH 4/4] MIPS: Remove kernel_uses_smartmips_rixi macro definition Steven J. Hill
2012-09-05 21:22 ` David Daney
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