From: David Daney <ddaney.cavm@gmail.com>
To: "Steven J. Hill" <sjhill@mips.com>, ralf@linux-mips.org
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH 4/4] MIPS: Remove kernel_uses_smartmips_rixi macro definition.
Date: Wed, 05 Sep 2012 14:22:06 -0700 [thread overview]
Message-ID: <5047C27E.7070007@gmail.com> (raw)
In-Reply-To: <1346876878-25965-5-git-send-email-sjhill@mips.com>
On 09/05/2012 01:27 PM, Steven J. Hill wrote:
> From: "Steven J. Hill" <sjhill@mips.com>
>
> Remove the 'kernel_uses_smartmips_rixi' macro definitions from
> the architecture header files.
>
> Signed-off-by: Steven J. Hill <sjhill@mips.com>
> ---
> arch/mips/include/asm/cpu-features.h | 3 ---
> .../asm/mach-cavium-octeon/cpu-feature-overrides.h | 2 --
> 2 files changed, 5 deletions(-)
>
> diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
> index c78a77b..7452d78 100644
> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -95,9 +95,6 @@
> #ifndef cpu_has_smartmips
> #define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
> #endif
> -#ifndef kernel_uses_smartmips_rixi
> -#define kernel_uses_smartmips_rixi 0
As I said in the other message, you will want to have the replacement
for this instance of kernel_uses_smartmips_rixi in place before you do
the other conversions.
That said, at the end of the patch set, this does need to go, so
something like this will be needed.
David Daney
> -#endif
> #ifndef cpu_has_ri
> #define cpu_has_ri (cpu_data[0].options & MIPS_CPU_RI)
> #endif
> diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
> index a58addb..971bdc2 100644
> --- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
> +++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
> @@ -58,8 +58,6 @@
> #define cpu_has_veic 0
> #define cpu_hwrena_impl_bits 0xc0000000
>
> -#define kernel_uses_smartmips_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
> -
> #define ARCH_HAS_IRQ_PER_CPU 1
> #define ARCH_HAS_SPINLOCK_PREFETCH 1
> #define spin_lock_prefetch(x) prefetch(x)
>
prev parent reply other threads:[~2012-09-05 21:22 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-05 20:27 [PATCH 0/4] Add RI and XI bits to MIPS base architecture Steven J. Hill
2012-09-05 20:27 ` [PATCH 1/4] MIPS: Add base architecture support for RI and XI Steven J. Hill
2012-09-05 20:48 ` David Daney
2012-09-05 21:51 ` David Daney
2012-09-05 23:30 ` Kevin Cernekee
2012-09-05 20:27 ` [PATCH 2/4] MIPS: Remove kernel_uses_smartmips_rixi use from arch/mips/mm Steven J. Hill
2012-09-05 21:11 ` David Daney
2012-09-05 20:27 ` [PATCH 3/4] MIPS: Remove kernel_uses_smartmips_rixi from page table bits Steven J. Hill
2012-09-05 21:16 ` David Daney
2012-09-05 20:27 ` [PATCH 4/4] MIPS: Remove kernel_uses_smartmips_rixi macro definition Steven J. Hill
2012-09-05 21:22 ` David Daney [this message]
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