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From: dirk.behme@de.bosch.com (Dirk Behme)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/6] staging: drm/imx: add i.MX IPUv3 base driver
Date: Fri, 14 Sep 2012 11:29:06 +0200	[thread overview]
Message-ID: <5052F8E2.6010106@de.bosch.com> (raw)
In-Reply-To: <1347445874-10779-4-git-send-email-s.hauer@pengutronix.de>

On 12.09.2012 12:31, Sascha Hauer wrote:
> The IPU is the Image Processing Unit found on i.MX51/53/6 SoCs. It
> features several units for image processing, this patch adds support
> for the units needed for Framebuffer support, namely:
> 
> - Display Controller (dc)
> - Display Interface (di)
> - Display Multi Fifo Controller (dmfc)
> - Display Processor (dp)
> - Image DMA Controller (idmac)
> 
> This patch is based on the Freescale driver, but follows a different
> approach. The Freescale code implements logical idmac channels and
> the handling of the subunits is hidden in common idmac code pathes
> in big switch/case statements. This patch instead just provides code
> and resource management for the different subunits. The user, in this
> case the framebuffer driver, decides how the different units play
> together.
> 
> The IPU has other units missing in this patch:
> 
> - CMOS Sensor Interface (csi)
> - Video Deinterlacer (vdi)
> - Sensor Multi FIFO Controler (smfc)
> - Image Converter (ic)
> - Image Rotator (irt)
> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
....
> +static int ipu_reset(struct ipu_soc *ipu)
> +{
> +       unsigned long timeout;
> +
> +       ipu_cm_write(ipu, 0x807FFFFF, IPU_MEM_RST);
> +
> +       timeout = jiffies + msecs_to_jiffies(1000);
> +       while (ipu_cm_read(ipu, IPU_MEM_RST) & 0x80000000) {
> +               if (time_after(jiffies, timeout))
> +                       return -ETIME;
> +               cpu_relax();
> +       }
> +
> +       mdelay(300);
           ^^^^^^^^^^^^

> +       return 0;
> +}

While doing some boot time measurement with i.MX6, we found that the 
above mdelay(300) is hurting regarding boot time. On i.MX6 you have two 
IPU instances, so in the end you get 600ms additional delay.

Looking at the Freescale code, this function looks like

static int ipu_reset(struct ipu_soc *ipu)
{
int timeout = 1000;

ipu_cm_write(ipu, 0x807FFFFF, IPU_MEM_RST);

while (ipu_cm_read(ipu, IPU_MEM_RST) & 0x80000000) {
  if (!timeout--)
    return -ETIME;
  msleep(1);
}
return 0;
}

So there is a msleep() in the loop but no mdelay() outside. Any idea why 
the mdelay() is needed here? Or what could be done regarding boot time 
with this?

Note: This is just a question, this shouldn't block the staging process.

Best regards

Dirk

WARNING: multiple messages have this Message-ID (diff)
From: Dirk Behme <dirk.behme@de.bosch.com>
To: Sascha Hauer <s.hauer@pengutronix.de>,
	Zhao Richard-B20223 <B20223@freescale.com>
Cc: David Jander <david.jander@protonic.nl>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	DRI Development <dri-devel@lists.freedesktop.org>,
	Ahmed Ammar <aammar@genesi-usa.com>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	Matt Sealey <matt@genesi-usa.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 3/6] staging: drm/imx: add i.MX IPUv3 base driver
Date: Fri, 14 Sep 2012 11:29:06 +0200	[thread overview]
Message-ID: <5052F8E2.6010106@de.bosch.com> (raw)
In-Reply-To: <1347445874-10779-4-git-send-email-s.hauer@pengutronix.de>

On 12.09.2012 12:31, Sascha Hauer wrote:
> The IPU is the Image Processing Unit found on i.MX51/53/6 SoCs. It
> features several units for image processing, this patch adds support
> for the units needed for Framebuffer support, namely:
> 
> - Display Controller (dc)
> - Display Interface (di)
> - Display Multi Fifo Controller (dmfc)
> - Display Processor (dp)
> - Image DMA Controller (idmac)
> 
> This patch is based on the Freescale driver, but follows a different
> approach. The Freescale code implements logical idmac channels and
> the handling of the subunits is hidden in common idmac code pathes
> in big switch/case statements. This patch instead just provides code
> and resource management for the different subunits. The user, in this
> case the framebuffer driver, decides how the different units play
> together.
> 
> The IPU has other units missing in this patch:
> 
> - CMOS Sensor Interface (csi)
> - Video Deinterlacer (vdi)
> - Sensor Multi FIFO Controler (smfc)
> - Image Converter (ic)
> - Image Rotator (irt)
> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
....
> +static int ipu_reset(struct ipu_soc *ipu)
> +{
> +       unsigned long timeout;
> +
> +       ipu_cm_write(ipu, 0x807FFFFF, IPU_MEM_RST);
> +
> +       timeout = jiffies + msecs_to_jiffies(1000);
> +       while (ipu_cm_read(ipu, IPU_MEM_RST) & 0x80000000) {
> +               if (time_after(jiffies, timeout))
> +                       return -ETIME;
> +               cpu_relax();
> +       }
> +
> +       mdelay(300);
           ^^^^^^^^^^^^

> +       return 0;
> +}

While doing some boot time measurement with i.MX6, we found that the 
above mdelay(300) is hurting regarding boot time. On i.MX6 you have two 
IPU instances, so in the end you get 600ms additional delay.

Looking at the Freescale code, this function looks like

static int ipu_reset(struct ipu_soc *ipu)
{
int timeout = 1000;

ipu_cm_write(ipu, 0x807FFFFF, IPU_MEM_RST);

while (ipu_cm_read(ipu, IPU_MEM_RST) & 0x80000000) {
  if (!timeout--)
    return -ETIME;
  msleep(1);
}
return 0;
}

So there is a msleep() in the loop but no mdelay() outside. Any idea why 
the mdelay() is needed here? Or what could be done regarding boot time 
with this?

Note: This is just a question, this shouldn't block the staging process.

Best regards

Dirk

  reply	other threads:[~2012-09-14  9:29 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-12 10:31 [PATCH] Add i.MX IPUv3 base/KMS driver to the staging tree Sascha Hauer
2012-09-12 10:31 ` Sascha Hauer
2012-09-12 10:31 ` [PATCH 1/6] staging: drm/imx: Add i.MX drm core support Sascha Hauer
2012-09-12 10:31   ` Sascha Hauer
2012-09-12 16:49   ` Greg Kroah-Hartman
2012-09-12 16:49     ` Greg Kroah-Hartman
2012-09-13  6:56     ` Sascha Hauer
2012-09-13  6:56       ` Sascha Hauer
2012-09-12 10:31 ` [PATCH 2/6] staging: drm/imx: Add parallel display support Sascha Hauer
2012-09-12 10:31   ` Sascha Hauer
2012-09-12 10:31 ` [PATCH 3/6] staging: drm/imx: add i.MX IPUv3 base driver Sascha Hauer
2012-09-12 10:31   ` Sascha Hauer
2012-09-14  9:29   ` Dirk Behme [this message]
2012-09-14  9:29     ` Dirk Behme
2012-09-14  9:38     ` Sascha Hauer
2012-09-14  9:38       ` Sascha Hauer
2012-09-12 10:31 ` [PATCH 4/6] staging: drm/imx: Add i.MX IPUv3 crtc support Sascha Hauer
2012-09-12 10:31   ` Sascha Hauer
2012-09-12 10:31 ` [PATCH 5/6] staging: drm/imx: Add devicetree binding documentation Sascha Hauer
2012-09-12 10:31   ` Sascha Hauer
2012-09-18 22:06   ` Eric Nelson
2012-09-18 22:06     ` Eric Nelson
2012-09-19  6:52     ` Sascha Hauer
2012-09-19  6:52       ` Sascha Hauer
2012-09-19 13:43       ` Eric Nelson
2012-09-19 13:43         ` Eric Nelson
2012-09-12 10:31 ` [PATCH 6/6] staging: drm/imx: Add TODO Sascha Hauer
2012-09-12 10:31   ` Sascha Hauer
2012-09-19  5:53   ` Shawn Guo
2012-09-19  5:53     ` Shawn Guo
2012-09-19  7:18     ` Sascha Hauer
2012-09-19  7:18       ` Sascha Hauer
2012-09-19  8:05       ` Greg Kroah-Hartman
2012-09-19  8:05         ` Greg Kroah-Hartman
  -- strict thread matches above, loose matches on Subject: below --
2012-09-21  8:07 [PATCH] Add i.MX IPUv3 base/KMS driver to the staging tree Sascha Hauer
2012-09-21  8:07 ` [PATCH 3/6] staging: drm/imx: add i.MX IPUv3 base driver Sascha Hauer
2012-09-21  8:07   ` Sascha Hauer

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