From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Krishna Reddy <vdumpa-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org"
<m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
"linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org"
<linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
"minchan-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
<minchan-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
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<chunsang.jeong-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
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<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA more precisely
Date: Thu, 20 Sep 2012 09:27:51 -0600 [thread overview]
Message-ID: <505B35F7.2080201@wwwdotorg.org> (raw)
In-Reply-To: <401E54CE964CD94BAE1EB4A729C7087E379FDC1F2D-wAPRp6hVlRhDw2glCA4ptUEOCMrvLtNR@public.gmane.org>
On 09/20/2012 12:40 AM, Krishna Reddy wrote:
>>> On Tegra, the following use cases need specific IOVA mapping.
>>> 1. Few MMIO blocks need IOVA=PA mapping setup.
>>
>> In that case, why would we enable the IOMMU for that one device; IOMMU
>> disabled means VA==PA, right? Perhaps isolation of the device so it can only
>> access certain PA ranges for security?
>
> The device(H/W controller) need to access few special memory blocks(IOVA==PA)
> and DRAM as well.
OK, so only /some/ of the VA space is VA==PA, and some is remapped;
that's a little different that what you originally implied above.
BTW, which HW module is this; AVP/COP or something else. This sounds
like an odd requirement.
> There is also a case where frame buffer memory is passed from BootLoader to Kernel and
> display H/W continues to access it with IOMMU enabled. To support this, the one to one
> mapping has to be setup before enabling IOMMU.
Yes, that makes sense.
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA more precisely
Date: Thu, 20 Sep 2012 09:27:51 -0600 [thread overview]
Message-ID: <505B35F7.2080201@wwwdotorg.org> (raw)
In-Reply-To: <401E54CE964CD94BAE1EB4A729C7087E379FDC1F2D@HQMAIL04.nvidia.com>
On 09/20/2012 12:40 AM, Krishna Reddy wrote:
>>> On Tegra, the following use cases need specific IOVA mapping.
>>> 1. Few MMIO blocks need IOVA=PA mapping setup.
>>
>> In that case, why would we enable the IOMMU for that one device; IOMMU
>> disabled means VA==PA, right? Perhaps isolation of the device so it can only
>> access certain PA ranges for security?
>
> The device(H/W controller) need to access few special memory blocks(IOVA==PA)
> and DRAM as well.
OK, so only /some/ of the VA space is VA==PA, and some is remapped;
that's a little different that what you originally implied above.
BTW, which HW module is this; AVP/COP or something else. This sounds
like an odd requirement.
> There is also a case where frame buffer memory is passed from BootLoader to Kernel and
> display H/W continues to access it with IOMMU enabled. To support this, the one to one
> mapping has to be setup before enabling IOMMU.
Yes, that makes sense.
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren@wwwdotorg.org>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: Joerg Roedel <joerg.roedel@amd.com>,
Arnd Bergmann <arnd@arndb.de>, Hiroshi Doyu <hdoyu@nvidia.com>,
"m.szyprowski@samsung.com" <m.szyprowski@samsung.com>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"minchan@kernel.org" <minchan@kernel.org>,
"chunsang.jeong@linaro.org" <chunsang.jeong@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"subashrp@gmail.com" <subashrp@gmail.com>,
"linaro-mm-sig@lists.linaro.org" <linaro-mm-sig@lists.linaro.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"kyungmin.park@samsung.com" <kyungmin.park@samsung.com>,
"pullip.cho@samsung.com" <pullip.cho@samsung.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA more precisely
Date: Thu, 20 Sep 2012 09:27:51 -0600 [thread overview]
Message-ID: <505B35F7.2080201@wwwdotorg.org> (raw)
In-Reply-To: <401E54CE964CD94BAE1EB4A729C7087E379FDC1F2D@HQMAIL04.nvidia.com>
On 09/20/2012 12:40 AM, Krishna Reddy wrote:
>>> On Tegra, the following use cases need specific IOVA mapping.
>>> 1. Few MMIO blocks need IOVA=PA mapping setup.
>>
>> In that case, why would we enable the IOMMU for that one device; IOMMU
>> disabled means VA==PA, right? Perhaps isolation of the device so it can only
>> access certain PA ranges for security?
>
> The device(H/W controller) need to access few special memory blocks(IOVA==PA)
> and DRAM as well.
OK, so only /some/ of the VA space is VA==PA, and some is remapped;
that's a little different that what you originally implied above.
BTW, which HW module is this; AVP/COP or something else. This sounds
like an odd requirement.
> There is also a case where frame buffer memory is passed from BootLoader to Kernel and
> display H/W continues to access it with IOMMU enabled. To support this, the one to one
> mapping has to be setup before enabling IOMMU.
Yes, that makes sense.
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WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren@wwwdotorg.org>
To: Krishna Reddy <vdumpa@nvidia.com>
Cc: Joerg Roedel <joerg.roedel@amd.com>,
Arnd Bergmann <arnd@arndb.de>, Hiroshi Doyu <hdoyu@nvidia.com>,
"m.szyprowski@samsung.com" <m.szyprowski@samsung.com>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"minchan@kernel.org" <minchan@kernel.org>,
"chunsang.jeong@linaro.org" <chunsang.jeong@linaro.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"subashrp@gmail.com" <subashrp@gmail.com>,
"linaro-mm-sig@lists.linaro.org" <linaro-mm-sig@lists.linaro.org>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"kyungmin.park@samsung.com" <kyungmin.park@samsung.com>,
"pullip.cho@samsung.com" <pullip.cho@samsung.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA more precisely
Date: Thu, 20 Sep 2012 09:27:51 -0600 [thread overview]
Message-ID: <505B35F7.2080201@wwwdotorg.org> (raw)
In-Reply-To: <401E54CE964CD94BAE1EB4A729C7087E379FDC1F2D@HQMAIL04.nvidia.com>
On 09/20/2012 12:40 AM, Krishna Reddy wrote:
>>> On Tegra, the following use cases need specific IOVA mapping.
>>> 1. Few MMIO blocks need IOVA=PA mapping setup.
>>
>> In that case, why would we enable the IOMMU for that one device; IOMMU
>> disabled means VA==PA, right? Perhaps isolation of the device so it can only
>> access certain PA ranges for security?
>
> The device(H/W controller) need to access few special memory blocks(IOVA==PA)
> and DRAM as well.
OK, so only /some/ of the VA space is VA==PA, and some is remapped;
that's a little different that what you originally implied above.
BTW, which HW module is this; AVP/COP or something else. This sounds
like an odd requirement.
> There is also a case where frame buffer memory is passed from BootLoader to Kernel and
> display H/W continues to access it with IOMMU enabled. To support this, the one to one
> mapping has to be setup before enabling IOMMU.
Yes, that makes sense.
next prev parent reply other threads:[~2012-09-20 15:27 UTC|newest]
Thread overview: 105+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-29 6:55 [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA more precisely Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` [RFC 1/5] ARM: dma-mapping: New dma_map_ops->iova_get_free_{total,max} functions Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` [RFC 1/5] ARM: dma-mapping: New dma_map_ops->iova_get_free_{total, max} functions Hiroshi Doyu
[not found] ` <1346223335-31455-1-git-send-email-hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-08-29 6:55 ` [RFC 2/5] ARM: dma-mapping: New dma_map_ops->iova_{alloc, free}() functions Hiroshi Doyu
2012-08-29 6:55 ` [RFC 2/5] ARM: dma-mapping: New dma_map_ops->iova_{alloc,free}() functions Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` [RFC 2/5] ARM: dma-mapping: New dma_map_ops->iova_{alloc, free}() functions Hiroshi Doyu
2012-08-29 6:55 ` [RFC 5/5] ARM: dma-mapping: Introduce dma_map_linear_attrs() for IOVA linear map Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-09-18 12:49 ` [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA more precisely Joerg Roedel
2012-09-18 12:49 ` Joerg Roedel
2012-09-18 12:49 ` Joerg Roedel
2012-09-18 12:49 ` Joerg Roedel
2012-09-19 6:58 ` Hiroshi Doyu
2012-09-19 6:58 ` Hiroshi Doyu
2012-09-19 6:58 ` Hiroshi Doyu
[not found] ` <20120919095843.d1db155e0f085f4fcf64ea32-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-09-19 7:59 ` Arnd Bergmann
2012-09-19 7:59 ` Arnd Bergmann
2012-09-19 7:59 ` Arnd Bergmann
2012-09-19 7:59 ` Arnd Bergmann
[not found] ` <201209190759.46174.arnd-r2nGTMty4D4@public.gmane.org>
2012-09-19 11:41 ` Hiroshi Doyu
2012-09-19 11:41 ` Hiroshi Doyu
2012-09-19 11:41 ` Hiroshi Doyu
2012-09-19 11:41 ` Hiroshi Doyu
2012-09-19 12:50 ` Joerg Roedel
2012-09-19 12:50 ` Joerg Roedel
2012-09-19 12:50 ` Joerg Roedel
2012-09-19 12:50 ` Joerg Roedel
[not found] ` <20120919125020.GQ2505-5C7GfCeVMHo@public.gmane.org>
2012-09-20 1:44 ` Krishna Reddy
2012-09-20 1:44 ` Krishna Reddy
2012-09-20 1:44 ` Krishna Reddy
2012-09-20 1:44 ` Krishna Reddy
[not found] ` <401E54CE964CD94BAE1EB4A729C7087E379FDC1EEB-wAPRp6hVlRhDw2glCA4ptUEOCMrvLtNR@public.gmane.org>
2012-09-20 2:21 ` Stephen Warren
2012-09-20 2:21 ` Stephen Warren
2012-09-20 2:21 ` Stephen Warren
2012-09-20 2:21 ` Stephen Warren
[not found] ` <505A7DB4.4090902-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-09-20 6:40 ` Krishna Reddy
2012-09-20 6:40 ` Krishna Reddy
2012-09-20 6:40 ` Krishna Reddy
2012-09-20 6:40 ` Krishna Reddy
[not found] ` <401E54CE964CD94BAE1EB4A729C7087E379FDC1F2D-wAPRp6hVlRhDw2glCA4ptUEOCMrvLtNR@public.gmane.org>
2012-09-20 15:27 ` Stephen Warren [this message]
2012-09-20 15:27 ` Stephen Warren
2012-09-20 15:27 ` Stephen Warren
2012-09-20 15:27 ` Stephen Warren
[not found] ` <505B35F7.2080201-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-09-21 18:16 ` Krishna Reddy
2012-09-21 18:16 ` Krishna Reddy
2012-09-21 18:16 ` Krishna Reddy
2012-09-21 18:16 ` Krishna Reddy
2012-09-24 9:04 ` How to specify IOMMU'able devices in DT (was: [RFC 0/5] ARM: dma-mapping: New dma_map_ops to control IOVA more precisely) Hiroshi Doyu
2012-09-24 9:04 ` Hiroshi Doyu
2012-09-24 9:04 ` Hiroshi Doyu
2012-09-24 9:04 ` Hiroshi Doyu
2012-09-24 9:04 ` Hiroshi Doyu
2012-09-24 9:28 ` James Bottomley
2012-09-24 9:28 ` James Bottomley
2012-09-24 9:28 ` James Bottomley
2012-09-24 9:28 ` James Bottomley
2012-09-24 9:44 ` Hiroshi Doyu
2012-09-24 9:44 ` Hiroshi Doyu
2012-09-24 9:44 ` Hiroshi Doyu
2012-09-24 9:44 ` Hiroshi Doyu
[not found] ` <20120924124452.41070ed2ee9944d930cffffc-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-09-24 11:14 ` Marek Szyprowski
2012-09-24 11:14 ` Marek Szyprowski
2012-09-24 11:14 ` Marek Szyprowski
2012-09-24 11:14 ` Marek Szyprowski
2012-09-24 11:50 ` How to specify IOMMU'able devices in DT Hiroshi Doyu
2012-09-24 11:50 ` Hiroshi Doyu
2012-09-24 11:50 ` Hiroshi Doyu
2012-09-24 11:50 ` Hiroshi Doyu
[not found] ` <20120924.145014.1452596970914043018.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-28 13:48 ` [PATCH 1/1] ARM: tegra: bus_notifier registers IOMMU devices(was: How to specify IOMMU'able devices in DT) Hiroshi Doyu
2012-11-28 13:48 ` Hiroshi Doyu
2012-11-28 13:48 ` Hiroshi Doyu
2012-11-28 13:48 ` Hiroshi Doyu
2012-11-28 13:48 ` Hiroshi Doyu
[not found] ` <20121128.154832.539666140149950229.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-28 18:07 ` Stephen Warren
2012-11-28 18:07 ` Stephen Warren
2012-11-28 18:07 ` Stephen Warren
2012-11-28 18:07 ` Stephen Warren
2012-11-29 6:45 ` Hiroshi Doyu
2012-11-29 6:45 ` Hiroshi Doyu
2012-11-29 6:45 ` Hiroshi Doyu
2012-11-29 6:45 ` Hiroshi Doyu
2012-11-29 10:17 ` Thierry Reding
2012-11-29 10:17 ` Thierry Reding
2012-11-29 10:17 ` Thierry Reding
2012-11-30 4:59 ` Mark Zhang
2012-11-30 4:59 ` Mark Zhang
2012-11-30 4:59 ` Mark Zhang
2012-11-30 4:59 ` Mark Zhang
2012-11-30 8:06 ` [PATCH 1/1] ARM: tegra: bus_notifier registers IOMMU devices Hiroshi Doyu
2012-11-30 8:06 ` Hiroshi Doyu
2012-11-30 8:06 ` Hiroshi Doyu
2012-11-30 8:06 ` Hiroshi Doyu
2012-08-29 6:55 ` [RFC 3/5] ARM: dma-mapping: New dma_map_ops->iova_alloc*_at* function Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` [RFC 4/5] ARM: dma-mapping: New dma_map_ops->map_page*_at* function Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
2012-08-29 6:55 ` Hiroshi Doyu
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