From: Richard Henderson <rth@twiddle.net>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 3/4] tcg/ia64: remove suboptimal register shifting in qemu_ld/st ops
Date: Wed, 10 Oct 2012 13:56:25 -0700 [thread overview]
Message-ID: <5075E0F9.30100@twiddle.net> (raw)
In-Reply-To: <1349814748-22552-4-git-send-email-aurelien@aurel32.net>
On 10/09/2012 01:32 PM, Aurelien Jarno wrote:
> Remove suboptimal register shifting in qemu_ld/st ops, introduced at the
> CONFIG_TCG_PASS_AREG0 time.
>
> As mem_idx is now loaded in register R58/R59 for the slow path, we have
> to make sure to do it last, to not add additional register constraints.
>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2012-10-10 20:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-09 20:32 [Qemu-devel] [PATCH 0/4] tcg/ia64: misc improvements Aurelien Jarno
2012-10-09 20:32 ` [Qemu-devel] [PATCH 1/4] tcg/ia64: use stack for TCG temps Aurelien Jarno
2012-10-09 20:32 ` [Qemu-devel] [PATCH 2/4] tcg/ia64: implement movcond_i32/64 Aurelien Jarno
2012-10-10 20:50 ` Richard Henderson
2012-10-09 20:32 ` [Qemu-devel] [PATCH 3/4] tcg/ia64: remove suboptimal register shifting in qemu_ld/st ops Aurelien Jarno
2012-10-10 20:56 ` Richard Henderson [this message]
2012-10-09 20:32 ` [Qemu-devel] [PATCH 4/4] tcg/ia64: slightly optimize TLB access code Aurelien Jarno
2012-10-10 20:58 ` Richard Henderson
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