* [PATCH v4 0/2] ARM: davinci: add support for dm365 vpbe display @ 2012-08-08 12:50 ` Prabhakar Lad 0 siblings, 0 replies; 8+ messages in thread From: Prabhakar Lad @ 2012-08-08 12:50 UTC (permalink / raw) To: linux-arm-kernel This patch series enables VPBE display driver on DM365. This patch series is dependent on this patches posted http://www.spinics.net/lists/arm-kernel/msg188234.html Changes for v4: 1: Replaced the obsolete preset API by timings API. Changes for v3: 1: Removed VPSS clock alias for master and slave which was sent for VPSS driver. since this patch was dependent on patch[1]. I will revist this patch once MC(captrure driver) goes into mainline. [1] http://www.spinics.net/lists/linux-media/msg50562.html Changes for v2: 1: Added VPSS clock so that capture and display can work independent. Manjunath Hadli (2): ARM: davinci: dm365: add support for v4l2 video display ARM: davinci: dm365 EVM: add support for VPBE display arch/arm/mach-davinci/board-dm365-evm.c | 179 +++++++++++++++++++++++++++- arch/arm/mach-davinci/davinci.h | 2 +- arch/arm/mach-davinci/dm365.c | 203 +++++++++++++++++++++++++++++-- 3 files changed, 371 insertions(+), 13 deletions(-) ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v4 0/2] ARM: davinci: add support for dm365 vpbe display @ 2012-08-08 12:50 ` Prabhakar Lad 0 siblings, 0 replies; 8+ messages in thread From: Prabhakar Lad @ 2012-08-08 12:50 UTC (permalink / raw) To: LAK; +Cc: dlos, linux-kernel, Sekhar Nori, Prabhakar Lad This patch series enables VPBE display driver on DM365. This patch series is dependent on this patches posted http://www.spinics.net/lists/arm-kernel/msg188234.html Changes for v4: 1: Replaced the obsolete preset API by timings API. Changes for v3: 1: Removed VPSS clock alias for master and slave which was sent for VPSS driver. since this patch was dependent on patch[1]. I will revist this patch once MC(captrure driver) goes into mainline. [1] http://www.spinics.net/lists/linux-media/msg50562.html Changes for v2: 1: Added VPSS clock so that capture and display can work independent. Manjunath Hadli (2): ARM: davinci: dm365: add support for v4l2 video display ARM: davinci: dm365 EVM: add support for VPBE display arch/arm/mach-davinci/board-dm365-evm.c | 179 +++++++++++++++++++++++++++- arch/arm/mach-davinci/davinci.h | 2 +- arch/arm/mach-davinci/dm365.c | 203 +++++++++++++++++++++++++++++-- 3 files changed, 371 insertions(+), 13 deletions(-) ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v4 1/2] ARM: davinci: dm365: add support for v4l2 video display 2012-08-08 12:50 ` Prabhakar Lad @ 2012-08-08 12:50 ` Prabhakar Lad -1 siblings, 0 replies; 8+ messages in thread From: Prabhakar Lad @ 2012-08-08 12:50 UTC (permalink / raw) To: linux-arm-kernel From: Manjunath Hadli <manjunath.hadli@ti.com> Create platform devices for various video modules like venc,osd, vpbe and v4l2 driver for dm365. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> --- arch/arm/mach-davinci/board-dm365-evm.c | 4 +- arch/arm/mach-davinci/davinci.h | 2 +- arch/arm/mach-davinci/dm365.c | 203 +++++++++++++++++++++++++++++-- 3 files changed, 196 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 688a9c5..ac1f20d 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -564,8 +564,6 @@ static struct davinci_uart_config uart_config __initdata = { static void __init dm365_evm_map_io(void) { - /* setup input configuration for VPFE input devices */ - dm365_set_vpfe_config(&vpfe_cfg); dm365_init(); } @@ -597,6 +595,8 @@ static __init void dm365_evm_init(void) davinci_setup_mmc(0, &dm365evm_mmc_config); + dm365_init_video(&vpfe_cfg, NULL); + /* maybe setup mmc1/etc ... _after_ mmc0 */ evm_init_cpld(); diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index 8db0fc6..94d867f 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -84,7 +84,7 @@ void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); void __init dm365_init_rtc(void); void dm365_init_spi0(unsigned chipselect_mask, const struct spi_board_info *info, unsigned len); -void dm365_set_vpfe_config(struct vpfe_config *cfg); +int __init dm365_init_video(struct vpfe_config *, struct vpbe_config *); /* DM644x function declarations */ void __init dm644x_init(void); diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index a50d49d..7c0cc66 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1232,6 +1232,199 @@ static struct platform_device dm365_isif_dev = { }, }; +#define DM365_OSD_REG_BASE 0x01C71C00 + +static struct resource dm365_osd_resources[] = { + { + .start = DM365_OSD_REG_BASE, + .end = DM365_OSD_REG_BASE + 0x100, + .flags = IORESOURCE_MEM, + }, +}; + +static u64 dm365_video_dma_mask = DMA_BIT_MASK(32); + +static struct osd_platform_data dm365_osd_data = { + .vpbe_type = VPBE_VERSION_2, +}; + +static struct platform_device dm365_osd_dev = { + .name = VPBE_OSD_SUBDEV_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(dm365_osd_resources), + .resource = dm365_osd_resources, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dm365_osd_data, + }, +}; + +#define DM365_VENC_REG_BASE 0x01C71E00 +#define DM3XX_VDAC_CONFIG 0x01C4002C + +static struct resource dm365_venc_resources[] = { + { + .start = IRQ_VENCINT, + .end = IRQ_VENCINT, + .flags = IORESOURCE_IRQ, + }, + /* venc registers io space */ + { + .start = DM365_VENC_REG_BASE, + .end = DM365_VENC_REG_BASE + 0x180, + .flags = IORESOURCE_MEM, + }, + /* vdaccfg registers io space */ + { + .start = DM3XX_VDAC_CONFIG, + .end = DM3XX_VDAC_CONFIG + 4, + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource dm365_v4l2_disp_resources[] = { + { + .start = IRQ_VENCINT, + .end = IRQ_VENCINT, + .flags = IORESOURCE_IRQ, + }, + /* venc registers io space */ + { + .start = DM365_VENC_REG_BASE, + .end = DM365_VENC_REG_BASE + 0x180, + .flags = IORESOURCE_MEM, + }, +}; + +static int dm365_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type, + int field) +{ + int ret = 0; + + switch (if_type) { + case V4L2_MBUS_FMT_SGRBG8_1X8: + davinci_cfg_reg(DM365_VOUT_FIELD_G81); + davinci_cfg_reg(DM365_VOUT_COUTL_EN); + davinci_cfg_reg(DM365_VOUT_COUTH_EN); + break; + case V4L2_MBUS_FMT_YUYV10_1X20: + if (field) + davinci_cfg_reg(DM365_VOUT_FIELD); + else + davinci_cfg_reg(DM365_VOUT_FIELD_G81); + davinci_cfg_reg(DM365_VOUT_COUTL_EN); + davinci_cfg_reg(DM365_VOUT_COUTH_EN); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +#define DM365_VPSS_VENCCLKEN_ENABLE 0x8 +#define DM365_VPSS_DACCLKEN_ENABLE 0x10 +#define DM365_VPSS_PLLC2SYSCLK5 0x20 +#define DM365_VPSS_CLK_CTRL_ADDR 0x44 + +static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type, + unsigned int pclock) +{ + void __iomem *vpss_clkctl_reg; + int ret = 0; + + vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(DM365_VPSS_CLK_CTRL_ADDR); + + switch (type) { + case VPBE_ENC_STD: + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); + break; + case VPBE_ENC_CUSTOM_TIMINGS: + if (pclock <= 27000000) { + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); + } else { + /* set sysclk4 to output 74.25 MHz from pll1 */ + __raw_writel(DM365_VPSS_PLLC2SYSCLK5 + + DM365_VPSS_DACCLKEN_ENABLE + + DM365_VPSS_VENCCLKEN_ENABLE, vpss_clkctl_reg); + } + break; + default: + ret = -EINVAL; + } + return ret; +} + +static struct platform_device dm365_vpbe_display = { + .name = "vpbe-v4l2", + .id = -1, + .num_resources = ARRAY_SIZE(dm365_v4l2_disp_resources), + .resource = dm365_v4l2_disp_resources, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +struct venc_platform_data dm365_venc_pdata = { + .venc_type = VPBE_VERSION_2, + .setup_pinmux = dm365_vpbe_setup_pinmux, + .setup_clock = dm365_venc_setup_clock, +}; + +static struct platform_device dm365_venc_dev = { + .name = VPBE_VENC_SUBDEV_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(dm365_venc_resources), + .resource = dm365_venc_resources, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = (void *)&dm365_venc_pdata, + }, +}; + +static struct platform_device dm365_vpbe_dev = { + .name = "vpbe_controller", + .id = -1, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +int __init dm365_init_video(struct vpfe_config *vpfe_cfg, + struct vpbe_config *vpbe_cfg) +{ + if (vpfe_cfg || vpbe_cfg) + platform_device_register(&dm365_vpss_device); + + if (vpfe_cfg) { + vpfe_capture_dev.dev.platform_data = vpfe_cfg; + platform_device_register(&dm365_isif_dev); + platform_device_register(&vpfe_capture_dev); + /* Add isif clock alias */ + clk_add_alias("master", dm365_isif_dev.name, "vpss_master", + NULL); + } + if (vpbe_cfg) { + dm365_vpbe_dev.dev.platform_data = vpbe_cfg; + platform_device_register(&dm365_osd_dev); + platform_device_register(&dm365_venc_dev); + platform_device_register(&dm365_vpbe_dev); + platform_device_register(&dm365_vpbe_display); + } + + return 0; +} + static int __init dm365_init_devices(void) { if (!cpu_is_davinci_dm365()) @@ -1245,16 +1438,6 @@ static int __init dm365_init_devices(void) clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev), NULL, &dm365_emac_device.dev); - /* Add isif clock alias */ - clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL); - platform_device_register(&dm365_vpss_device); - platform_device_register(&dm365_isif_dev); - platform_device_register(&vpfe_capture_dev); return 0; } postcore_initcall(dm365_init_devices); - -void dm365_set_vpfe_config(struct vpfe_config *cfg) -{ - vpfe_capture_dev.dev.platform_data = cfg; -} -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v4 1/2] ARM: davinci: dm365: add support for v4l2 video display @ 2012-08-08 12:50 ` Prabhakar Lad 0 siblings, 0 replies; 8+ messages in thread From: Prabhakar Lad @ 2012-08-08 12:50 UTC (permalink / raw) To: LAK; +Cc: dlos, linux-kernel, Sekhar Nori, Manjunath Hadli, Lad, Prabhakar From: Manjunath Hadli <manjunath.hadli@ti.com> Create platform devices for various video modules like venc,osd, vpbe and v4l2 driver for dm365. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> --- arch/arm/mach-davinci/board-dm365-evm.c | 4 +- arch/arm/mach-davinci/davinci.h | 2 +- arch/arm/mach-davinci/dm365.c | 203 +++++++++++++++++++++++++++++-- 3 files changed, 196 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 688a9c5..ac1f20d 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -564,8 +564,6 @@ static struct davinci_uart_config uart_config __initdata = { static void __init dm365_evm_map_io(void) { - /* setup input configuration for VPFE input devices */ - dm365_set_vpfe_config(&vpfe_cfg); dm365_init(); } @@ -597,6 +595,8 @@ static __init void dm365_evm_init(void) davinci_setup_mmc(0, &dm365evm_mmc_config); + dm365_init_video(&vpfe_cfg, NULL); + /* maybe setup mmc1/etc ... _after_ mmc0 */ evm_init_cpld(); diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h index 8db0fc6..94d867f 100644 --- a/arch/arm/mach-davinci/davinci.h +++ b/arch/arm/mach-davinci/davinci.h @@ -84,7 +84,7 @@ void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); void __init dm365_init_rtc(void); void dm365_init_spi0(unsigned chipselect_mask, const struct spi_board_info *info, unsigned len); -void dm365_set_vpfe_config(struct vpfe_config *cfg); +int __init dm365_init_video(struct vpfe_config *, struct vpbe_config *); /* DM644x function declarations */ void __init dm644x_init(void); diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index a50d49d..7c0cc66 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1232,6 +1232,199 @@ static struct platform_device dm365_isif_dev = { }, }; +#define DM365_OSD_REG_BASE 0x01C71C00 + +static struct resource dm365_osd_resources[] = { + { + .start = DM365_OSD_REG_BASE, + .end = DM365_OSD_REG_BASE + 0x100, + .flags = IORESOURCE_MEM, + }, +}; + +static u64 dm365_video_dma_mask = DMA_BIT_MASK(32); + +static struct osd_platform_data dm365_osd_data = { + .vpbe_type = VPBE_VERSION_2, +}; + +static struct platform_device dm365_osd_dev = { + .name = VPBE_OSD_SUBDEV_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(dm365_osd_resources), + .resource = dm365_osd_resources, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dm365_osd_data, + }, +}; + +#define DM365_VENC_REG_BASE 0x01C71E00 +#define DM3XX_VDAC_CONFIG 0x01C4002C + +static struct resource dm365_venc_resources[] = { + { + .start = IRQ_VENCINT, + .end = IRQ_VENCINT, + .flags = IORESOURCE_IRQ, + }, + /* venc registers io space */ + { + .start = DM365_VENC_REG_BASE, + .end = DM365_VENC_REG_BASE + 0x180, + .flags = IORESOURCE_MEM, + }, + /* vdaccfg registers io space */ + { + .start = DM3XX_VDAC_CONFIG, + .end = DM3XX_VDAC_CONFIG + 4, + .flags = IORESOURCE_MEM, + }, +}; + +static struct resource dm365_v4l2_disp_resources[] = { + { + .start = IRQ_VENCINT, + .end = IRQ_VENCINT, + .flags = IORESOURCE_IRQ, + }, + /* venc registers io space */ + { + .start = DM365_VENC_REG_BASE, + .end = DM365_VENC_REG_BASE + 0x180, + .flags = IORESOURCE_MEM, + }, +}; + +static int dm365_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type, + int field) +{ + int ret = 0; + + switch (if_type) { + case V4L2_MBUS_FMT_SGRBG8_1X8: + davinci_cfg_reg(DM365_VOUT_FIELD_G81); + davinci_cfg_reg(DM365_VOUT_COUTL_EN); + davinci_cfg_reg(DM365_VOUT_COUTH_EN); + break; + case V4L2_MBUS_FMT_YUYV10_1X20: + if (field) + davinci_cfg_reg(DM365_VOUT_FIELD); + else + davinci_cfg_reg(DM365_VOUT_FIELD_G81); + davinci_cfg_reg(DM365_VOUT_COUTL_EN); + davinci_cfg_reg(DM365_VOUT_COUTH_EN); + break; + default: + ret = -EINVAL; + } + + return ret; +} + +#define DM365_VPSS_VENCCLKEN_ENABLE 0x8 +#define DM365_VPSS_DACCLKEN_ENABLE 0x10 +#define DM365_VPSS_PLLC2SYSCLK5 0x20 +#define DM365_VPSS_CLK_CTRL_ADDR 0x44 + +static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type, + unsigned int pclock) +{ + void __iomem *vpss_clkctl_reg; + int ret = 0; + + vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(DM365_VPSS_CLK_CTRL_ADDR); + + switch (type) { + case VPBE_ENC_STD: + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); + break; + case VPBE_ENC_CUSTOM_TIMINGS: + if (pclock <= 27000000) { + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); + } else { + /* set sysclk4 to output 74.25 MHz from pll1 */ + __raw_writel(DM365_VPSS_PLLC2SYSCLK5 + + DM365_VPSS_DACCLKEN_ENABLE + + DM365_VPSS_VENCCLKEN_ENABLE, vpss_clkctl_reg); + } + break; + default: + ret = -EINVAL; + } + return ret; +} + +static struct platform_device dm365_vpbe_display = { + .name = "vpbe-v4l2", + .id = -1, + .num_resources = ARRAY_SIZE(dm365_v4l2_disp_resources), + .resource = dm365_v4l2_disp_resources, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +struct venc_platform_data dm365_venc_pdata = { + .venc_type = VPBE_VERSION_2, + .setup_pinmux = dm365_vpbe_setup_pinmux, + .setup_clock = dm365_venc_setup_clock, +}; + +static struct platform_device dm365_venc_dev = { + .name = VPBE_VENC_SUBDEV_NAME, + .id = -1, + .num_resources = ARRAY_SIZE(dm365_venc_resources), + .resource = dm365_venc_resources, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = (void *)&dm365_venc_pdata, + }, +}; + +static struct platform_device dm365_vpbe_dev = { + .name = "vpbe_controller", + .id = -1, + .dev = { + .dma_mask = &dm365_video_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + +int __init dm365_init_video(struct vpfe_config *vpfe_cfg, + struct vpbe_config *vpbe_cfg) +{ + if (vpfe_cfg || vpbe_cfg) + platform_device_register(&dm365_vpss_device); + + if (vpfe_cfg) { + vpfe_capture_dev.dev.platform_data = vpfe_cfg; + platform_device_register(&dm365_isif_dev); + platform_device_register(&vpfe_capture_dev); + /* Add isif clock alias */ + clk_add_alias("master", dm365_isif_dev.name, "vpss_master", + NULL); + } + if (vpbe_cfg) { + dm365_vpbe_dev.dev.platform_data = vpbe_cfg; + platform_device_register(&dm365_osd_dev); + platform_device_register(&dm365_venc_dev); + platform_device_register(&dm365_vpbe_dev); + platform_device_register(&dm365_vpbe_display); + } + + return 0; +} + static int __init dm365_init_devices(void) { if (!cpu_is_davinci_dm365()) @@ -1245,16 +1438,6 @@ static int __init dm365_init_devices(void) clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev), NULL, &dm365_emac_device.dev); - /* Add isif clock alias */ - clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL); - platform_device_register(&dm365_vpss_device); - platform_device_register(&dm365_isif_dev); - platform_device_register(&vpfe_capture_dev); return 0; } postcore_initcall(dm365_init_devices); - -void dm365_set_vpfe_config(struct vpfe_config *cfg) -{ - vpfe_capture_dev.dev.platform_data = cfg; -} -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v4 1/2] ARM: davinci: dm365: add support for v4l2 video display 2012-08-08 12:50 ` Prabhakar Lad @ 2012-10-24 13:29 ` Sekhar Nori -1 siblings, 0 replies; 8+ messages in thread From: Sekhar Nori @ 2012-10-24 13:29 UTC (permalink / raw) To: linux-arm-kernel Hi Prabhakar, Sorry about the late feedback on this patch. On 8/8/2012 6:20 PM, Prabhakar Lad wrote: > From: Manjunath Hadli <manjunath.hadli@ti.com> > > Create platform devices for various video modules like venc,osd, > vpbe and v4l2 driver for dm365. > > Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> > Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> > --- > arch/arm/mach-davinci/board-dm365-evm.c | 4 +- > arch/arm/mach-davinci/davinci.h | 2 +- > arch/arm/mach-davinci/dm365.c | 203 +++++++++++++++++++++++++++++-- > 3 files changed, 196 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c > index 688a9c5..ac1f20d 100644 > --- a/arch/arm/mach-davinci/board-dm365-evm.c > +++ b/arch/arm/mach-davinci/board-dm365-evm.c > @@ -564,8 +564,6 @@ static struct davinci_uart_config uart_config __initdata = { > > static void __init dm365_evm_map_io(void) > { > - /* setup input configuration for VPFE input devices */ > - dm365_set_vpfe_config(&vpfe_cfg); > dm365_init(); > } > > @@ -597,6 +595,8 @@ static __init void dm365_evm_init(void) > > davinci_setup_mmc(0, &dm365evm_mmc_config); > > + dm365_init_video(&vpfe_cfg, NULL); > + > /* maybe setup mmc1/etc ... _after_ mmc0 */ > evm_init_cpld(); > > diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h > index 8db0fc6..94d867f 100644 > --- a/arch/arm/mach-davinci/davinci.h > +++ b/arch/arm/mach-davinci/davinci.h > @@ -84,7 +84,7 @@ void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); > void __init dm365_init_rtc(void); > void dm365_init_spi0(unsigned chipselect_mask, > const struct spi_board_info *info, unsigned len); > -void dm365_set_vpfe_config(struct vpfe_config *cfg); > +int __init dm365_init_video(struct vpfe_config *, struct vpbe_config *); > > /* DM644x function declarations */ > void __init dm644x_init(void); > diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c > index a50d49d..7c0cc66 100644 > --- a/arch/arm/mach-davinci/dm365.c > +++ b/arch/arm/mach-davinci/dm365.c > @@ -1232,6 +1232,199 @@ static struct platform_device dm365_isif_dev = { > }, > }; > > +#define DM365_OSD_REG_BASE 0x01C71C00 In this file all base addresses are defined at the beginning of the file. Please move it there. Keep the list sorted by address. > + > +static struct resource dm365_osd_resources[] = { > + { > + .start = DM365_OSD_REG_BASE, > + .end = DM365_OSD_REG_BASE + 0x100, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static u64 dm365_video_dma_mask = DMA_BIT_MASK(32); > + > +static struct osd_platform_data dm365_osd_data = { > + .vpbe_type = VPBE_VERSION_2, > +}; The better way to handle multiple versions of IP is to define different platform names for each variant and then pass the right name from platform code. Have a look at 'fec_devtype' in "drivers/net/ethernet/freescale/fec.c" to see how this is done to handle different variants of Ethernet IP in freescale Ethernet driver. I understand this is how the driver has defined it, but I suggest fixing this now. Taking the above approach will also make the DT transition easier. > + > +static struct platform_device dm365_osd_dev = { > + .name = VPBE_OSD_SUBDEV_NAME, > + .id = -1, > + .num_resources = ARRAY_SIZE(dm365_osd_resources), > + .resource = dm365_osd_resources, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + .platform_data = &dm365_osd_data, > + }, > +}; > + > +#define DM365_VENC_REG_BASE 0x01C71E00 > +#define DM3XX_VDAC_CONFIG 0x01C4002C Similar to above comment, please move this to top of the file. > + > +static struct resource dm365_venc_resources[] = { > + { > + .start = IRQ_VENCINT, > + .end = IRQ_VENCINT, > + .flags = IORESOURCE_IRQ, > + }, > + /* venc registers io space */ > + { > + .start = DM365_VENC_REG_BASE, > + .end = DM365_VENC_REG_BASE + 0x180, > + .flags = IORESOURCE_MEM, > + }, > + /* vdaccfg registers io space */ > + { > + .start = DM3XX_VDAC_CONFIG, > + .end = DM3XX_VDAC_CONFIG + 4, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct resource dm365_v4l2_disp_resources[] = { > + { > + .start = IRQ_VENCINT, > + .end = IRQ_VENCINT, > + .flags = IORESOURCE_IRQ, > + }, > + /* venc registers io space */ > + { > + .start = DM365_VENC_REG_BASE, > + .end = DM365_VENC_REG_BASE + 0x180, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static int dm365_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type, > + int field) > +{ > + int ret = 0; > + > + switch (if_type) { > + case V4L2_MBUS_FMT_SGRBG8_1X8: > + davinci_cfg_reg(DM365_VOUT_FIELD_G81); > + davinci_cfg_reg(DM365_VOUT_COUTL_EN); > + davinci_cfg_reg(DM365_VOUT_COUTH_EN); > + break; > + case V4L2_MBUS_FMT_YUYV10_1X20: > + if (field) > + davinci_cfg_reg(DM365_VOUT_FIELD); > + else > + davinci_cfg_reg(DM365_VOUT_FIELD_G81); > + davinci_cfg_reg(DM365_VOUT_COUTL_EN); > + davinci_cfg_reg(DM365_VOUT_COUTH_EN); > + break; > + default: > + ret = -EINVAL; > + } > + > + return ret; > +} > + > +#define DM365_VPSS_VENCCLKEN_ENABLE 0x8 > +#define DM365_VPSS_DACCLKEN_ENABLE 0x10 > +#define DM365_VPSS_PLLC2SYSCLK5 0x20 These are bit definitions? Please use BIT() instead. I feel it is more logical to add bit definitions after the actual register definition. > +#define DM365_VPSS_CLK_CTRL_ADDR 0x44 > + > +static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type, > + unsigned int pclock) > +{ > + void __iomem *vpss_clkctl_reg; > + int ret = 0; > + > + vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(DM365_VPSS_CLK_CTRL_ADDR); > + > + switch (type) { > + case VPBE_ENC_STD: > + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); > + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); > + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + > + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); Please use readl()/writel() instead. Here and down below as well. Also, please use logical OR for bit masks, although in this case using '+' works as well. > + break; > + case VPBE_ENC_CUSTOM_TIMINGS: > + if (pclock <= 27000000) { > + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); > + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); > + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + > + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); > + } else { > + /* set sysclk4 to output 74.25 MHz from pll1 */ > + __raw_writel(DM365_VPSS_PLLC2SYSCLK5 + > + DM365_VPSS_DACCLKEN_ENABLE + > + DM365_VPSS_VENCCLKEN_ENABLE, vpss_clkctl_reg); > + } > + break; > + default: > + ret = -EINVAL; > + } Since you write to vpss_clkctl_reg anyway, it will be neater to actually use a variable to store the value to be written and write the register only once, in the end. > + return ret; > +} > + > +static struct platform_device dm365_vpbe_display = { > + .name = "vpbe-v4l2", > + .id = -1, > + .num_resources = ARRAY_SIZE(dm365_v4l2_disp_resources), > + .resource = dm365_v4l2_disp_resources, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + }, > +}; > + > +struct venc_platform_data dm365_venc_pdata = { > + .venc_type = VPBE_VERSION_2, As mentioned above, such IP version passing from platform data is better avoided. > + .setup_pinmux = dm365_vpbe_setup_pinmux, > + .setup_clock = dm365_venc_setup_clock, > +}; > + > +static struct platform_device dm365_venc_dev = { > + .name = VPBE_VENC_SUBDEV_NAME, > + .id = -1, > + .num_resources = ARRAY_SIZE(dm365_venc_resources), > + .resource = dm365_venc_resources, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + .platform_data = (void *)&dm365_venc_pdata, > + }, > +}; > + > +static struct platform_device dm365_vpbe_dev = { > + .name = "vpbe_controller", > + .id = -1, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + }, > +}; > + > +int __init dm365_init_video(struct vpfe_config *vpfe_cfg, > + struct vpbe_config *vpbe_cfg) > +{ > + if (vpfe_cfg || vpbe_cfg) > + platform_device_register(&dm365_vpss_device); > + > + if (vpfe_cfg) { > + vpfe_capture_dev.dev.platform_data = vpfe_cfg; > + platform_device_register(&dm365_isif_dev); > + platform_device_register(&vpfe_capture_dev); > + /* Add isif clock alias */ > + clk_add_alias("master", dm365_isif_dev.name, "vpss_master", > + NULL); Why add clock aliases? Why not just fix the clk_get() call to use the right con_id (or fix the clock look-up in platform code)? Thanks, Sekhar ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v4 1/2] ARM: davinci: dm365: add support for v4l2 video display @ 2012-10-24 13:29 ` Sekhar Nori 0 siblings, 0 replies; 8+ messages in thread From: Sekhar Nori @ 2012-10-24 13:29 UTC (permalink / raw) To: Prabhakar Lad; +Cc: LAK, dlos, linux-kernel, Manjunath Hadli Hi Prabhakar, Sorry about the late feedback on this patch. On 8/8/2012 6:20 PM, Prabhakar Lad wrote: > From: Manjunath Hadli <manjunath.hadli@ti.com> > > Create platform devices for various video modules like venc,osd, > vpbe and v4l2 driver for dm365. > > Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> > Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> > --- > arch/arm/mach-davinci/board-dm365-evm.c | 4 +- > arch/arm/mach-davinci/davinci.h | 2 +- > arch/arm/mach-davinci/dm365.c | 203 +++++++++++++++++++++++++++++-- > 3 files changed, 196 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c > index 688a9c5..ac1f20d 100644 > --- a/arch/arm/mach-davinci/board-dm365-evm.c > +++ b/arch/arm/mach-davinci/board-dm365-evm.c > @@ -564,8 +564,6 @@ static struct davinci_uart_config uart_config __initdata = { > > static void __init dm365_evm_map_io(void) > { > - /* setup input configuration for VPFE input devices */ > - dm365_set_vpfe_config(&vpfe_cfg); > dm365_init(); > } > > @@ -597,6 +595,8 @@ static __init void dm365_evm_init(void) > > davinci_setup_mmc(0, &dm365evm_mmc_config); > > + dm365_init_video(&vpfe_cfg, NULL); > + > /* maybe setup mmc1/etc ... _after_ mmc0 */ > evm_init_cpld(); > > diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h > index 8db0fc6..94d867f 100644 > --- a/arch/arm/mach-davinci/davinci.h > +++ b/arch/arm/mach-davinci/davinci.h > @@ -84,7 +84,7 @@ void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); > void __init dm365_init_rtc(void); > void dm365_init_spi0(unsigned chipselect_mask, > const struct spi_board_info *info, unsigned len); > -void dm365_set_vpfe_config(struct vpfe_config *cfg); > +int __init dm365_init_video(struct vpfe_config *, struct vpbe_config *); > > /* DM644x function declarations */ > void __init dm644x_init(void); > diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c > index a50d49d..7c0cc66 100644 > --- a/arch/arm/mach-davinci/dm365.c > +++ b/arch/arm/mach-davinci/dm365.c > @@ -1232,6 +1232,199 @@ static struct platform_device dm365_isif_dev = { > }, > }; > > +#define DM365_OSD_REG_BASE 0x01C71C00 In this file all base addresses are defined at the beginning of the file. Please move it there. Keep the list sorted by address. > + > +static struct resource dm365_osd_resources[] = { > + { > + .start = DM365_OSD_REG_BASE, > + .end = DM365_OSD_REG_BASE + 0x100, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static u64 dm365_video_dma_mask = DMA_BIT_MASK(32); > + > +static struct osd_platform_data dm365_osd_data = { > + .vpbe_type = VPBE_VERSION_2, > +}; The better way to handle multiple versions of IP is to define different platform names for each variant and then pass the right name from platform code. Have a look at 'fec_devtype' in "drivers/net/ethernet/freescale/fec.c" to see how this is done to handle different variants of Ethernet IP in freescale Ethernet driver. I understand this is how the driver has defined it, but I suggest fixing this now. Taking the above approach will also make the DT transition easier. > + > +static struct platform_device dm365_osd_dev = { > + .name = VPBE_OSD_SUBDEV_NAME, > + .id = -1, > + .num_resources = ARRAY_SIZE(dm365_osd_resources), > + .resource = dm365_osd_resources, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + .platform_data = &dm365_osd_data, > + }, > +}; > + > +#define DM365_VENC_REG_BASE 0x01C71E00 > +#define DM3XX_VDAC_CONFIG 0x01C4002C Similar to above comment, please move this to top of the file. > + > +static struct resource dm365_venc_resources[] = { > + { > + .start = IRQ_VENCINT, > + .end = IRQ_VENCINT, > + .flags = IORESOURCE_IRQ, > + }, > + /* venc registers io space */ > + { > + .start = DM365_VENC_REG_BASE, > + .end = DM365_VENC_REG_BASE + 0x180, > + .flags = IORESOURCE_MEM, > + }, > + /* vdaccfg registers io space */ > + { > + .start = DM3XX_VDAC_CONFIG, > + .end = DM3XX_VDAC_CONFIG + 4, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static struct resource dm365_v4l2_disp_resources[] = { > + { > + .start = IRQ_VENCINT, > + .end = IRQ_VENCINT, > + .flags = IORESOURCE_IRQ, > + }, > + /* venc registers io space */ > + { > + .start = DM365_VENC_REG_BASE, > + .end = DM365_VENC_REG_BASE + 0x180, > + .flags = IORESOURCE_MEM, > + }, > +}; > + > +static int dm365_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type, > + int field) > +{ > + int ret = 0; > + > + switch (if_type) { > + case V4L2_MBUS_FMT_SGRBG8_1X8: > + davinci_cfg_reg(DM365_VOUT_FIELD_G81); > + davinci_cfg_reg(DM365_VOUT_COUTL_EN); > + davinci_cfg_reg(DM365_VOUT_COUTH_EN); > + break; > + case V4L2_MBUS_FMT_YUYV10_1X20: > + if (field) > + davinci_cfg_reg(DM365_VOUT_FIELD); > + else > + davinci_cfg_reg(DM365_VOUT_FIELD_G81); > + davinci_cfg_reg(DM365_VOUT_COUTL_EN); > + davinci_cfg_reg(DM365_VOUT_COUTH_EN); > + break; > + default: > + ret = -EINVAL; > + } > + > + return ret; > +} > + > +#define DM365_VPSS_VENCCLKEN_ENABLE 0x8 > +#define DM365_VPSS_DACCLKEN_ENABLE 0x10 > +#define DM365_VPSS_PLLC2SYSCLK5 0x20 These are bit definitions? Please use BIT() instead. I feel it is more logical to add bit definitions after the actual register definition. > +#define DM365_VPSS_CLK_CTRL_ADDR 0x44 > + > +static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type, > + unsigned int pclock) > +{ > + void __iomem *vpss_clkctl_reg; > + int ret = 0; > + > + vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(DM365_VPSS_CLK_CTRL_ADDR); > + > + switch (type) { > + case VPBE_ENC_STD: > + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); > + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); > + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + > + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); Please use readl()/writel() instead. Here and down below as well. Also, please use logical OR for bit masks, although in this case using '+' works as well. > + break; > + case VPBE_ENC_CUSTOM_TIMINGS: > + if (pclock <= 27000000) { > + vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); > + vpss_enable_clock(VPSS_VPBE_CLOCK, 1); > + __raw_writel(DM365_VPSS_VENCCLKEN_ENABLE + > + DM365_VPSS_DACCLKEN_ENABLE, vpss_clkctl_reg); > + } else { > + /* set sysclk4 to output 74.25 MHz from pll1 */ > + __raw_writel(DM365_VPSS_PLLC2SYSCLK5 + > + DM365_VPSS_DACCLKEN_ENABLE + > + DM365_VPSS_VENCCLKEN_ENABLE, vpss_clkctl_reg); > + } > + break; > + default: > + ret = -EINVAL; > + } Since you write to vpss_clkctl_reg anyway, it will be neater to actually use a variable to store the value to be written and write the register only once, in the end. > + return ret; > +} > + > +static struct platform_device dm365_vpbe_display = { > + .name = "vpbe-v4l2", > + .id = -1, > + .num_resources = ARRAY_SIZE(dm365_v4l2_disp_resources), > + .resource = dm365_v4l2_disp_resources, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + }, > +}; > + > +struct venc_platform_data dm365_venc_pdata = { > + .venc_type = VPBE_VERSION_2, As mentioned above, such IP version passing from platform data is better avoided. > + .setup_pinmux = dm365_vpbe_setup_pinmux, > + .setup_clock = dm365_venc_setup_clock, > +}; > + > +static struct platform_device dm365_venc_dev = { > + .name = VPBE_VENC_SUBDEV_NAME, > + .id = -1, > + .num_resources = ARRAY_SIZE(dm365_venc_resources), > + .resource = dm365_venc_resources, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + .platform_data = (void *)&dm365_venc_pdata, > + }, > +}; > + > +static struct platform_device dm365_vpbe_dev = { > + .name = "vpbe_controller", > + .id = -1, > + .dev = { > + .dma_mask = &dm365_video_dma_mask, > + .coherent_dma_mask = DMA_BIT_MASK(32), > + }, > +}; > + > +int __init dm365_init_video(struct vpfe_config *vpfe_cfg, > + struct vpbe_config *vpbe_cfg) > +{ > + if (vpfe_cfg || vpbe_cfg) > + platform_device_register(&dm365_vpss_device); > + > + if (vpfe_cfg) { > + vpfe_capture_dev.dev.platform_data = vpfe_cfg; > + platform_device_register(&dm365_isif_dev); > + platform_device_register(&vpfe_capture_dev); > + /* Add isif clock alias */ > + clk_add_alias("master", dm365_isif_dev.name, "vpss_master", > + NULL); Why add clock aliases? Why not just fix the clk_get() call to use the right con_id (or fix the clock look-up in platform code)? Thanks, Sekhar ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v4 2/2] ARM: davinci: dm365 EVM: add support for VPBE display 2012-08-08 12:50 ` Prabhakar Lad @ 2012-08-08 12:50 ` Prabhakar Lad -1 siblings, 0 replies; 8+ messages in thread From: Prabhakar Lad @ 2012-08-08 12:50 UTC (permalink / raw) To: linux-arm-kernel From: Manjunath Hadli <manjunath.hadli@ti.com> add support for V4L2 video display to DM365 EVM. Support for SD and ED modes is provided, along with Composite and Component outputs. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> --- arch/arm/mach-davinci/board-dm365-evm.c | 177 ++++++++++++++++++++++++++++++- 1 files changed, 176 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index ac1f20d..52422f9 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -27,6 +27,7 @@ #include <linux/input.h> #include <linux/spi/spi.h> #include <linux/spi/eeprom.h> +#include <linux/v4l2-dv-timings.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -374,6 +375,180 @@ static struct vpfe_config vpfe_cfg = { .ccdc = "ISIF", }; +#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) + +/* venc standards timings */ +static struct vpbe_enc_mode_info dm365evm_enc_std_timing[] = { + { + .name = "ntsc", + .timings_type = VPBE_ENC_STD, + .std_id = V4L2_STD_525_60, + .interlaced = 1, + .xres = 720, + .yres = 480, + .aspect = {11, 10}, + .fps = {30000, 1001}, + .left_margin = 0x79, + .right_margin = 0, + .upper_margin = 0x10, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, + { + .name = "pal", + .timings_type = VPBE_ENC_STD, + .std_id = V4L2_STD_625_50, + .interlaced = 1, + .xres = 720, + .yres = 576, + .aspect = {54, 59}, + .fps = {25, 1}, + .left_margin = 0x7E, + .right_margin = 0, + .upper_margin = 0x16, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, +}; + +/* venc dv timings */ +static struct vpbe_enc_mode_info dm365evm_enc_preset_timing[] = { + { + .name = "480p59_94", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_720X480P59_94, + .interlaced = 0, + .xres = 720, + .yres = 480, + .aspect = {1, 1}, + .fps = {5994, 100}, + .left_margin = 0x8F, + .right_margin = 0, + .upper_margin = 0x2D, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, + { + .name = "576p50", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_720X576P50, + .interlaced = 0, + .xres = 720, + .yres = 576, + .aspect = {1, 1}, + .fps = {50, 1}, + .left_margin = 0x8C, + .right_margin = 0, + .upper_margin = 0x36, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, + { + .name = "720p60", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_1280X720P60, + .interlaced = 0, + .xres = 1280, + .yres = 720, + .aspect = {1, 1}, + .fps = {60, 1}, + .left_margin = 0x117, + .right_margin = 70, + .upper_margin = 38, + .lower_margin = 3, + .hsync_len = 80, + .vsync_len = 5, + .flags = 0, + }, + { + .name = "1080i60", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_1920X1080I60, + .interlaced = 1, + .xres = 1920, + .yres = 1080, + .aspect = {1, 1}, + .fps = {30, 1}, + .left_margin = 0xc9, + .right_margin = 80, + .upper_margin = 30, + .lower_margin = 3, + .hsync_len = 88, + .vsync_len = 5, + .flags = 0, + }, +}; + +/* + * The outputs available from VPBE + ecnoders. Keep the + * the order same as that of encoders. First those from venc followed by that + * from encoders. Index in the outpuvpbe-t refers to index on a particular + * encoder.Driver uses this index to pass it to encoder when it supports more + * than one output. Application uses index of the array to set an output. + */ +static struct vpbe_output dm365evm_vpbe_outputs[] = { + { + .output = { + .index = 0, + .name = "Composite", + .type = V4L2_OUTPUT_TYPE_ANALOG, + .std = VENC_STD_ALL, + .capabilities = V4L2_OUT_CAP_STD, + }, + .subdev_name = VPBE_VENC_SUBDEV_NAME, + .default_mode = "ntsc", + .num_modes = ARRAY_SIZE(dm365evm_enc_std_timing), + .modes = dm365evm_enc_std_timing, + .if_params = V4L2_MBUS_FMT_FIXED, + }, + { + .output = { + .index = 1, + .name = "Component", + .type = V4L2_OUTPUT_TYPE_ANALOG, + .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS, + }, + .subdev_name = VPBE_VENC_SUBDEV_NAME, + .default_mode = "480p59_94", + .num_modes = ARRAY_SIZE(dm365evm_enc_preset_timing), + .modes = dm365evm_enc_preset_timing, + .if_params = V4L2_MBUS_FMT_FIXED, + }, +}; + +/* + * Amplifiers on the board + */ +static struct amp_config_info vpbe_amp = { + .module_name = "ths7303", + .is_i2c = 1, + .board_info = { + I2C_BOARD_INFO("ths7303", 0x2c) + } +}; + +static struct vpbe_config dm365evm_display_cfg = { + .module_name = "dm365-vpbe-display", + .i2c_adapter_id = 1, + .amp = &vpbe_amp, + .osd = { + .module_name = VPBE_OSD_SUBDEV_NAME, + }, + .venc = { + .module_name = VPBE_VENC_SUBDEV_NAME, + }, + .num_outputs = ARRAY_SIZE(dm365evm_vpbe_outputs), + .outputs = dm365evm_vpbe_outputs, +}; + static void __init evm_init_i2c(void) { davinci_init_i2c(&i2c_pdata); @@ -595,7 +770,7 @@ static __init void dm365_evm_init(void) davinci_setup_mmc(0, &dm365evm_mmc_config); - dm365_init_video(&vpfe_cfg, NULL); + dm365_init_video(&vpfe_cfg, &dm365evm_display_cfg); /* maybe setup mmc1/etc ... _after_ mmc0 */ evm_init_cpld(); -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v4 2/2] ARM: davinci: dm365 EVM: add support for VPBE display @ 2012-08-08 12:50 ` Prabhakar Lad 0 siblings, 0 replies; 8+ messages in thread From: Prabhakar Lad @ 2012-08-08 12:50 UTC (permalink / raw) To: LAK; +Cc: dlos, linux-kernel, Sekhar Nori, Manjunath Hadli, Lad, Prabhakar From: Manjunath Hadli <manjunath.hadli@ti.com> add support for V4L2 video display to DM365 EVM. Support for SD and ED modes is provided, along with Composite and Component outputs. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> --- arch/arm/mach-davinci/board-dm365-evm.c | 177 ++++++++++++++++++++++++++++++- 1 files changed, 176 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index ac1f20d..52422f9 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c @@ -27,6 +27,7 @@ #include <linux/input.h> #include <linux/spi/spi.h> #include <linux/spi/eeprom.h> +#include <linux/v4l2-dv-timings.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -374,6 +375,180 @@ static struct vpfe_config vpfe_cfg = { .ccdc = "ISIF", }; +#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) + +/* venc standards timings */ +static struct vpbe_enc_mode_info dm365evm_enc_std_timing[] = { + { + .name = "ntsc", + .timings_type = VPBE_ENC_STD, + .std_id = V4L2_STD_525_60, + .interlaced = 1, + .xres = 720, + .yres = 480, + .aspect = {11, 10}, + .fps = {30000, 1001}, + .left_margin = 0x79, + .right_margin = 0, + .upper_margin = 0x10, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, + { + .name = "pal", + .timings_type = VPBE_ENC_STD, + .std_id = V4L2_STD_625_50, + .interlaced = 1, + .xres = 720, + .yres = 576, + .aspect = {54, 59}, + .fps = {25, 1}, + .left_margin = 0x7E, + .right_margin = 0, + .upper_margin = 0x16, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, +}; + +/* venc dv timings */ +static struct vpbe_enc_mode_info dm365evm_enc_preset_timing[] = { + { + .name = "480p59_94", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_720X480P59_94, + .interlaced = 0, + .xres = 720, + .yres = 480, + .aspect = {1, 1}, + .fps = {5994, 100}, + .left_margin = 0x8F, + .right_margin = 0, + .upper_margin = 0x2D, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, + { + .name = "576p50", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_720X576P50, + .interlaced = 0, + .xres = 720, + .yres = 576, + .aspect = {1, 1}, + .fps = {50, 1}, + .left_margin = 0x8C, + .right_margin = 0, + .upper_margin = 0x36, + .lower_margin = 0, + .hsync_len = 0, + .vsync_len = 0, + .flags = 0, + }, + { + .name = "720p60", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_1280X720P60, + .interlaced = 0, + .xres = 1280, + .yres = 720, + .aspect = {1, 1}, + .fps = {60, 1}, + .left_margin = 0x117, + .right_margin = 70, + .upper_margin = 38, + .lower_margin = 3, + .hsync_len = 80, + .vsync_len = 5, + .flags = 0, + }, + { + .name = "1080i60", + .timings_type = VPBE_ENC_CUSTOM_TIMINGS, + .dv_timings = V4L2_DV_BT_CEA_1920X1080I60, + .interlaced = 1, + .xres = 1920, + .yres = 1080, + .aspect = {1, 1}, + .fps = {30, 1}, + .left_margin = 0xc9, + .right_margin = 80, + .upper_margin = 30, + .lower_margin = 3, + .hsync_len = 88, + .vsync_len = 5, + .flags = 0, + }, +}; + +/* + * The outputs available from VPBE + ecnoders. Keep the + * the order same as that of encoders. First those from venc followed by that + * from encoders. Index in the outpuvpbe-t refers to index on a particular + * encoder.Driver uses this index to pass it to encoder when it supports more + * than one output. Application uses index of the array to set an output. + */ +static struct vpbe_output dm365evm_vpbe_outputs[] = { + { + .output = { + .index = 0, + .name = "Composite", + .type = V4L2_OUTPUT_TYPE_ANALOG, + .std = VENC_STD_ALL, + .capabilities = V4L2_OUT_CAP_STD, + }, + .subdev_name = VPBE_VENC_SUBDEV_NAME, + .default_mode = "ntsc", + .num_modes = ARRAY_SIZE(dm365evm_enc_std_timing), + .modes = dm365evm_enc_std_timing, + .if_params = V4L2_MBUS_FMT_FIXED, + }, + { + .output = { + .index = 1, + .name = "Component", + .type = V4L2_OUTPUT_TYPE_ANALOG, + .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS, + }, + .subdev_name = VPBE_VENC_SUBDEV_NAME, + .default_mode = "480p59_94", + .num_modes = ARRAY_SIZE(dm365evm_enc_preset_timing), + .modes = dm365evm_enc_preset_timing, + .if_params = V4L2_MBUS_FMT_FIXED, + }, +}; + +/* + * Amplifiers on the board + */ +static struct amp_config_info vpbe_amp = { + .module_name = "ths7303", + .is_i2c = 1, + .board_info = { + I2C_BOARD_INFO("ths7303", 0x2c) + } +}; + +static struct vpbe_config dm365evm_display_cfg = { + .module_name = "dm365-vpbe-display", + .i2c_adapter_id = 1, + .amp = &vpbe_amp, + .osd = { + .module_name = VPBE_OSD_SUBDEV_NAME, + }, + .venc = { + .module_name = VPBE_VENC_SUBDEV_NAME, + }, + .num_outputs = ARRAY_SIZE(dm365evm_vpbe_outputs), + .outputs = dm365evm_vpbe_outputs, +}; + static void __init evm_init_i2c(void) { davinci_init_i2c(&i2c_pdata); @@ -595,7 +770,7 @@ static __init void dm365_evm_init(void) davinci_setup_mmc(0, &dm365evm_mmc_config); - dm365_init_video(&vpfe_cfg, NULL); + dm365_init_video(&vpfe_cfg, &dm365evm_display_cfg); /* maybe setup mmc1/etc ... _after_ mmc0 */ evm_init_cpld(); -- 1.7.0.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2012-10-24 13:29 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2012-08-08 12:50 [PATCH v4 0/2] ARM: davinci: add support for dm365 vpbe display Prabhakar Lad 2012-08-08 12:50 ` Prabhakar Lad 2012-08-08 12:50 ` [PATCH v4 1/2] ARM: davinci: dm365: add support for v4l2 video display Prabhakar Lad 2012-08-08 12:50 ` Prabhakar Lad 2012-10-24 13:29 ` Sekhar Nori 2012-10-24 13:29 ` Sekhar Nori 2012-08-08 12:50 ` [PATCH v4 2/2] ARM: davinci: dm365 EVM: add support for VPBE display Prabhakar Lad 2012-08-08 12:50 ` Prabhakar Lad
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