From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH 1/2] ARM: tegra: dt: add L2 cache controller
Date: Mon, 29 Oct 2012 09:28:36 -0600 [thread overview]
Message-ID: <508EA0A4.6000105@wwwdotorg.org> (raw)
In-Reply-To: <1351477701.2779.70.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
On 10/28/2012 08:28 PM, Joseph Lo wrote:
> On Sat, 2012-10-27 at 01:04 +0800, Stephen Warren wrote:
>> On 10/26/2012 04:34 AM, Joseph Lo wrote:
>>> Add L2 cache controller binding into DT for Tegra.
...
>> Finally, is this series going to be a dependency for any of the cpuidle
>> or other work you're submitting? I assume it's completely independent
>> and hence I can throw it in any old branch in any order I feel like?
>
> No. We need this before the "powered-down" cpuidle support. Because the
> L2 init function didn't help to hook the resume API to "outer_cache_fns"
> interface currently. If we don't apply this before the "powered-down"
> cpuidle, we will lost L2 support after one successful powered-down
> cpuidle sequence.
OK, please do mention dependencies like this when posting the patches.
Thanks.
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] ARM: tegra: dt: add L2 cache controller
Date: Mon, 29 Oct 2012 09:28:36 -0600 [thread overview]
Message-ID: <508EA0A4.6000105@wwwdotorg.org> (raw)
In-Reply-To: <1351477701.2779.70.camel@jlo-ubuntu-64.nvidia.com>
On 10/28/2012 08:28 PM, Joseph Lo wrote:
> On Sat, 2012-10-27 at 01:04 +0800, Stephen Warren wrote:
>> On 10/26/2012 04:34 AM, Joseph Lo wrote:
>>> Add L2 cache controller binding into DT for Tegra.
...
>> Finally, is this series going to be a dependency for any of the cpuidle
>> or other work you're submitting? I assume it's completely independent
>> and hence I can throw it in any old branch in any order I feel like?
>
> No. We need this before the "powered-down" cpuidle support. Because the
> L2 init function didn't help to hook the resume API to "outer_cache_fns"
> interface currently. If we don't apply this before the "powered-down"
> cpuidle, we will lost L2 support after one successful powered-down
> cpuidle sequence.
OK, please do mention dependencies like this when posting the patches.
Thanks.
next prev parent reply other threads:[~2012-10-29 15:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-26 10:34 [PATCH 1/2] ARM: tegra: dt: add L2 cache controller Joseph Lo
2012-10-26 10:34 ` Joseph Lo
[not found] ` <1351247649-15859-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-10-26 10:34 ` [PATCH 2/2] ARM: tegra: common: using OF api for L2 cache init Joseph Lo
2012-10-26 10:34 ` Joseph Lo
2012-10-26 17:04 ` [PATCH 1/2] ARM: tegra: dt: add L2 cache controller Stephen Warren
2012-10-26 17:04 ` Stephen Warren
[not found] ` <508AC294.7080506-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-29 2:28 ` Joseph Lo
2012-10-29 2:28 ` Joseph Lo
[not found] ` <1351477701.2779.70.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2012-10-29 15:28 ` Stephen Warren [this message]
2012-10-29 15:28 ` Stephen Warren
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