* [PATCH] ARM: tegra: enable data prefetch on L2
@ 2012-11-07 1:26 ` Joseph Lo
0 siblings, 0 replies; 10+ messages in thread
From: Joseph Lo @ 2012-11-07 1:26 UTC (permalink / raw)
To: Stephen Warren
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Joseph Lo
Enable the data prefetch on L2. The bit28 in aux ctrl register.
Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/mach-tegra/common.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index c25746e..c3dee56 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -124,7 +124,7 @@ static void __init tegra_init_cache(void)
cache_type = readl(p + L2X0_CACHE_TYPE);
aux_ctrl = (cache_type & 0x700) << (17-8);
- aux_ctrl |= 0x6C000001;
+ aux_ctrl |= 0x7C000001;
ret = l2x0_of_init(aux_ctrl, 0x8200c3fe);
if (!ret)
--
1.7.0.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH] ARM: tegra: enable data prefetch on L2
@ 2012-11-07 1:26 ` Joseph Lo
0 siblings, 0 replies; 10+ messages in thread
From: Joseph Lo @ 2012-11-07 1:26 UTC (permalink / raw)
To: linux-arm-kernel
Enable the data prefetch on L2. The bit28 in aux ctrl register.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
arch/arm/mach-tegra/common.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index c25746e..c3dee56 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -124,7 +124,7 @@ static void __init tegra_init_cache(void)
cache_type = readl(p + L2X0_CACHE_TYPE);
aux_ctrl = (cache_type & 0x700) << (17-8);
- aux_ctrl |= 0x6C000001;
+ aux_ctrl |= 0x7C000001;
ret = l2x0_of_init(aux_ctrl, 0x8200c3fe);
if (!ret)
--
1.7.0.4
^ permalink raw reply related [flat|nested] 10+ messages in thread
[parent not found: <1352251597-2936-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH] ARM: tegra: enable data prefetch on L2
2012-11-07 1:26 ` Joseph Lo
@ 2012-11-09 10:41 ` Peter De Schrijver
-1 siblings, 0 replies; 10+ messages in thread
From: Peter De Schrijver @ 2012-11-09 10:41 UTC (permalink / raw)
To: Joseph Lo
Cc: Stephen Warren,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Wed, Nov 07, 2012 at 02:26:37AM +0100, Joseph Lo wrote:
> Enable the data prefetch on L2. The bit28 in aux ctrl register.
>
> Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Acked-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cheers,
Peter.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ARM: tegra: enable data prefetch on L2
2012-11-07 1:26 ` Joseph Lo
@ 2012-11-09 21:59 ` Stephen Warren
-1 siblings, 0 replies; 10+ messages in thread
From: Stephen Warren @ 2012-11-09 21:59 UTC (permalink / raw)
To: Joseph Lo
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 11/06/2012 06:26 PM, Joseph Lo wrote:
> Enable the data prefetch on L2. The bit28 in aux ctrl register.
Applied to Tegra's for-3.8/soc branch. Thanks.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] ARM: tegra: enable data prefetch on L2
2012-11-07 1:26 ` Joseph Lo
@ 2012-11-12 12:19 ` Peter De Schrijver
-1 siblings, 0 replies; 10+ messages in thread
From: Peter De Schrijver @ 2012-11-12 12:19 UTC (permalink / raw)
To: Joseph Lo
Cc: Stephen Warren,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Wed, Nov 07, 2012 at 02:26:37AM +0100, Joseph Lo wrote:
> Enable the data prefetch on L2. The bit28 in aux ctrl register.
>
> Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> arch/arm/mach-tegra/common.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
> index c25746e..c3dee56 100644
> --- a/arch/arm/mach-tegra/common.c
> +++ b/arch/arm/mach-tegra/common.c
> @@ -124,7 +124,7 @@ static void __init tegra_init_cache(void)
>
> cache_type = readl(p + L2X0_CACHE_TYPE);
> aux_ctrl = (cache_type & 0x700) << (17-8);
> - aux_ctrl |= 0x6C000001;
> + aux_ctrl |= 0x7C000001;
Just found out that we should also set bit 22 as per
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6395%2F1
Stephen, should I send a seperate patch for that?
Cheers,
Peter.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] ARM: tegra: enable data prefetch on L2
@ 2012-11-12 12:19 ` Peter De Schrijver
0 siblings, 0 replies; 10+ messages in thread
From: Peter De Schrijver @ 2012-11-12 12:19 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Nov 07, 2012 at 02:26:37AM +0100, Joseph Lo wrote:
> Enable the data prefetch on L2. The bit28 in aux ctrl register.
>
> Signed-off-by: Joseph Lo <josephl@nvidia.com>
> ---
> arch/arm/mach-tegra/common.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
> index c25746e..c3dee56 100644
> --- a/arch/arm/mach-tegra/common.c
> +++ b/arch/arm/mach-tegra/common.c
> @@ -124,7 +124,7 @@ static void __init tegra_init_cache(void)
>
> cache_type = readl(p + L2X0_CACHE_TYPE);
> aux_ctrl = (cache_type & 0x700) << (17-8);
> - aux_ctrl |= 0x6C000001;
> + aux_ctrl |= 0x7C000001;
Just found out that we should also set bit 22 as per
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6395%2F1
Stephen, should I send a seperate patch for that?
Cheers,
Peter.
^ permalink raw reply [flat|nested] 10+ messages in thread
[parent not found: <20121112121905.GI1962-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>]
* Re: [PATCH] ARM: tegra: enable data prefetch on L2
2012-11-12 12:19 ` Peter De Schrijver
@ 2012-11-12 16:19 ` Stephen Warren
-1 siblings, 0 replies; 10+ messages in thread
From: Stephen Warren @ 2012-11-12 16:19 UTC (permalink / raw)
To: Peter De Schrijver
Cc: Joseph Lo, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On 11/12/2012 05:19 AM, Peter De Schrijver wrote:
> On Wed, Nov 07, 2012 at 02:26:37AM +0100, Joseph Lo wrote:
>> Enable the data prefetch on L2. The bit28 in aux ctrl register.
>>
>> Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>> arch/arm/mach-tegra/common.c | 2 +-
>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
>> index c25746e..c3dee56 100644
>> --- a/arch/arm/mach-tegra/common.c
>> +++ b/arch/arm/mach-tegra/common.c
>> @@ -124,7 +124,7 @@ static void __init tegra_init_cache(void)
>>
>> cache_type = readl(p + L2X0_CACHE_TYPE);
>> aux_ctrl = (cache_type & 0x700) << (17-8);
>> - aux_ctrl |= 0x6C000001;
>> + aux_ctrl |= 0x7C000001;
>
> Just found out that we should also set bit 22 as per
> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6395%2F1
>
> Stephen, should I send a seperate patch for that?
Yes please; I've applied the patch in this thread already.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] ARM: tegra: enable data prefetch on L2
@ 2012-11-12 16:19 ` Stephen Warren
0 siblings, 0 replies; 10+ messages in thread
From: Stephen Warren @ 2012-11-12 16:19 UTC (permalink / raw)
To: linux-arm-kernel
On 11/12/2012 05:19 AM, Peter De Schrijver wrote:
> On Wed, Nov 07, 2012 at 02:26:37AM +0100, Joseph Lo wrote:
>> Enable the data prefetch on L2. The bit28 in aux ctrl register.
>>
>> Signed-off-by: Joseph Lo <josephl@nvidia.com>
>> ---
>> arch/arm/mach-tegra/common.c | 2 +-
>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
>> index c25746e..c3dee56 100644
>> --- a/arch/arm/mach-tegra/common.c
>> +++ b/arch/arm/mach-tegra/common.c
>> @@ -124,7 +124,7 @@ static void __init tegra_init_cache(void)
>>
>> cache_type = readl(p + L2X0_CACHE_TYPE);
>> aux_ctrl = (cache_type & 0x700) << (17-8);
>> - aux_ctrl |= 0x6C000001;
>> + aux_ctrl |= 0x7C000001;
>
> Just found out that we should also set bit 22 as per
> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6395%2F1
>
> Stephen, should I send a seperate patch for that?
Yes please; I've applied the patch in this thread already.
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2012-11-12 16:19 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2012-11-07 1:26 [PATCH] ARM: tegra: enable data prefetch on L2 Joseph Lo
2012-11-07 1:26 ` Joseph Lo
[not found] ` <1352251597-2936-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-09 10:41 ` Peter De Schrijver
2012-11-09 10:41 ` Peter De Schrijver
2012-11-09 21:59 ` Stephen Warren
2012-11-09 21:59 ` Stephen Warren
2012-11-12 12:19 ` Peter De Schrijver
2012-11-12 12:19 ` Peter De Schrijver
[not found] ` <20121112121905.GI1962-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2012-11-12 16:19 ` Stephen Warren
2012-11-12 16:19 ` Stephen Warren
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