From: Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Thierry Reding
<thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 2/2] ARM: tegra: Add Tegra30 host1x support
Date: Tue, 13 Nov 2012 15:45:52 +0800 [thread overview]
Message-ID: <50A1FAB0.8040700@nvidia.com> (raw)
In-Reply-To: <1352467202-27903-3-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
On 11/09/2012 09:20 PM, Thierry Reding wrote:
> This commit adds the host1x node along with its children to the Tegra30
> DTSI. Furthermore the OF auxiliary data table is updated to have proper
> names assigned to the platform devices instantiated from the device
> tree. Moreover, the clocks required by host1x and the two display
> controllers are setup and initialized.
>
> Signed-off-by: Thierry Reding <thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
> ---
> arch/arm/boot/dts/tegra30.dtsi | 87 +++++++++++++++++++++++++++++++
> arch/arm/mach-tegra/board-dt-tegra30.c | 10 ++++
> arch/arm/mach-tegra/tegra30_clocks_data.c | 11 ++--
> 3 files changed, 104 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> index b8e33c3..529fdb8 100644
> --- a/arch/arm/boot/dts/tegra30.dtsi
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -4,6 +4,93 @@
> compatible = "nvidia,tegra30";
> interrupt-parent = <&intc>;
>
> + host1x {
> + compatible = "nvidia,tegra30-host1x", "simple-bus";
> + reg = <0x50000000 0x00024000>;
> + interrupts = <0 65 0x04 /* mpcore syncpt */
> + 0 67 0x04>; /* mpcore general */
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ranges = <0x54000000 0x54000000 0x04000000>;
> +
> + mpe {
> + compatible = "nvidia,tegra30-mpe";
> + reg = <0x54040000 0x00040000>;
> + interrupts = <0 68 0x04>;
> + };
> +
> + vi {
> + compatible = "nvidia,tegra30-vi";
> + reg = <0x54080000 0x00040000>;
> + interrupts = <0 69 0x04>;
> + };
> +
> + epp {
> + compatible = "nvidia,tegra30-epp";
> + reg = <0x540c0000 0x00040000>;
> + interrupts = <0 70 0x04>;
> + };
> +
> + isp {
> + compatible = "nvidia,tegra30-isp";
> + reg = <0x54100000 0x00040000>;
> + interrupts = <0 71 0x04>;
> + };
> +
> + gr2d {
> + compatible = "nvidia,tegra30-gr2d";
> + reg = <0x54140000 0x00040000>;
> + interrupts = <0 72 0x04>;
> + };
> +
> + gr3d {
> + compatible = "nvidia,tegra30-gr3d";
> + reg = <0x54180000 0x00040000>;
> + };
> +
> + dc@54200000 {
> + compatible = "nvidia,tegra30-dc";
> + reg = <0x54200000 0x00040000>;
> + interrupts = <0 73 0x04>;
> +
> + rgb {
> + status = "disabled";
> + };
> + };
> +
> + dc@54240000 {
> + compatible = "nvidia,tegra30-dc";
> + reg = <0x54240000 0x00040000>;
> + interrupts = <0 74 0x04>;
> +
> + rgb {
> + status = "disabled";
> + };
> + };
> +
> + hdmi {
> + compatible = "nvidia,tegra30-hdmi";
> + reg = <0x54280000 0x00040000>;
> + interrupts = <0 75 0x04>;
> + status = "disabled";
> + };
> +
> + tvo {
> + compatible = "nvidia,tegra30-tvo";
> + reg = <0x542c0000 0x00040000>;
> + interrupts = <0 76 0x04>;
> + status = "disabled";
> + };
> +
> + dsi {
> + compatible = "nvidia,tegra30-dsi";
> + reg = <0x54300000 0x00040000>;
> + status = "disabled";
> + };
> + };
> +
> timer@50004600 {
> compatible = "arm,cortex-a9-twd-timer";
> reg = <0x50040600 0x20>;
> diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
> index cd30338..ff21107 100644
> --- a/arch/arm/mach-tegra/board-dt-tegra30.c
> +++ b/arch/arm/mach-tegra/board-dt-tegra30.c
> @@ -57,6 +57,12 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
> OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DA00, "spi_tegra.3", NULL),
> OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL),
> OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "tegra-host1x", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54200000, "tegra-dc.0", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54240000, "tegra-dc.1", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x54280000, "tegra-hdmi", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-dsi", 0x54300000, "tegra-dsi", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-tvo", 0x542c0000, "tegra-tvo", NULL),
> {}
> };
>
> @@ -82,6 +88,10 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
> { "sbc4", "pll_p", 100000000, false},
> { "sbc5", "pll_p", 100000000, false},
> { "sbc6", "pll_p", 100000000, false},
> + { "host1x", "pll_c", 144000000, false},
> + { "disp1", "pll_p", 74000000, false},
> + { "disp2", "pll_d2_out0", 148500000, false},
> + { "hdmi", "pll_d2_out0", 148500000, false},
> { NULL, NULL, 0, 0},
> };
>
> diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c
> index 7bc8b1d..210b8a4 100644
> --- a/arch/arm/mach-tegra/tegra30_clocks_data.c
> +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c
> @@ -1132,14 +1132,14 @@ PERIPH_CLK(2d, "2d", NULL, 21, 0x15c, 520000000, mux_pllm_pllc_pllp_plla, MUX
> PERIPH_CLK(vi_sensor, "tegra_camera", "vi_sensor", 20, 0x1a8, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_NO_RESET);
> PERIPH_CLK(epp, "epp", NULL, 19, 0x16c, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> PERIPH_CLK(mpe, "mpe", NULL, 60, 0x170, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> -PERIPH_CLK(host1x, "host1x", NULL, 28, 0x180, 260000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> +PERIPH_CLK(host1x, "tegra-host1x", NULL, 28, 0x180, 260000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> PERIPH_CLK(cve, "cve", NULL, 49, 0x140, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71); /* requires min voltage */
> PERIPH_CLK(tvo, "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71); /* requires min voltage */
> PERIPH_CLK(dtv, "dtv", NULL, 79, 0x1dc, 250000000, mux_clk_m, 0);
> -PERIPH_CLK(hdmi, "hdmi", NULL, 51, 0x18c, 148500000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8 | DIV_U71);
> +PERIPH_CLK(hdmi, "tegra-hdmi", NULL, 51, 0x18c, 148500000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8 | DIV_U71);
> PERIPH_CLK(tvdac, "tvdac", NULL, 53, 0x194, 220000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71); /* requires min voltage */
> -PERIPH_CLK(disp1, "tegradc.0", NULL, 27, 0x138, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> -PERIPH_CLK(disp2, "tegradc.1", NULL, 26, 0x13c, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> +PERIPH_CLK(disp1, "tegra-dc.0", NULL, 27, 0x138, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> +PERIPH_CLK(disp2, "tegra-dc.1", NULL, 26, 0x13c, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> PERIPH_CLK(usbd, "fsl-tegra-udc", NULL, 22, 0, 480000000, mux_clk_m, 0); /* requires min voltage */
> PERIPH_CLK(usb2, "tegra-ehci.1", NULL, 58, 0, 480000000, mux_clk_m, 0); /* requires min voltage */
> PERIPH_CLK(usb3, "tegra-ehci.2", NULL, 59, 0, 480000000, mux_clk_m, 0); /* requires min voltage */
> @@ -1337,6 +1337,9 @@ struct clk_duplicate tegra_clk_duplicates[] = {
> CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"),
> CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"),
> CLK_DUPLICATE("pll_p_out3", "tegra-i2c.4", "fast-clk"),
> + CLK_DUPLICATE("pll_p", "tegra-dc.0", "parent"),
> + CLK_DUPLICATE("pll_p", "tegra-dc.1", "parent"),
> + CLK_DUPLICATE("pll_d2_out0", "tegra-hdmi", "parent"),
> };
The tegra-dc.1's parent should be pll_d2_out0.
>
> struct clk *tegra_ptr_clks[] = {
> --
> 1.8.0
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
WARNING: multiple messages have this Message-ID (diff)
From: Mark Zhang <markz@nvidia.com>
To: Thierry Reding <thierry.reding@avionic-design.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] ARM: tegra: Add Tegra30 host1x support
Date: Tue, 13 Nov 2012 15:45:52 +0800 [thread overview]
Message-ID: <50A1FAB0.8040700@nvidia.com> (raw)
In-Reply-To: <1352467202-27903-3-git-send-email-thierry.reding@avionic-design.de>
On 11/09/2012 09:20 PM, Thierry Reding wrote:
> This commit adds the host1x node along with its children to the Tegra30
> DTSI. Furthermore the OF auxiliary data table is updated to have proper
> names assigned to the platform devices instantiated from the device
> tree. Moreover, the clocks required by host1x and the two display
> controllers are setup and initialized.
>
> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
> ---
> arch/arm/boot/dts/tegra30.dtsi | 87 +++++++++++++++++++++++++++++++
> arch/arm/mach-tegra/board-dt-tegra30.c | 10 ++++
> arch/arm/mach-tegra/tegra30_clocks_data.c | 11 ++--
> 3 files changed, 104 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> index b8e33c3..529fdb8 100644
> --- a/arch/arm/boot/dts/tegra30.dtsi
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -4,6 +4,93 @@
> compatible = "nvidia,tegra30";
> interrupt-parent = <&intc>;
>
> + host1x {
> + compatible = "nvidia,tegra30-host1x", "simple-bus";
> + reg = <0x50000000 0x00024000>;
> + interrupts = <0 65 0x04 /* mpcore syncpt */
> + 0 67 0x04>; /* mpcore general */
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + ranges = <0x54000000 0x54000000 0x04000000>;
> +
> + mpe {
> + compatible = "nvidia,tegra30-mpe";
> + reg = <0x54040000 0x00040000>;
> + interrupts = <0 68 0x04>;
> + };
> +
> + vi {
> + compatible = "nvidia,tegra30-vi";
> + reg = <0x54080000 0x00040000>;
> + interrupts = <0 69 0x04>;
> + };
> +
> + epp {
> + compatible = "nvidia,tegra30-epp";
> + reg = <0x540c0000 0x00040000>;
> + interrupts = <0 70 0x04>;
> + };
> +
> + isp {
> + compatible = "nvidia,tegra30-isp";
> + reg = <0x54100000 0x00040000>;
> + interrupts = <0 71 0x04>;
> + };
> +
> + gr2d {
> + compatible = "nvidia,tegra30-gr2d";
> + reg = <0x54140000 0x00040000>;
> + interrupts = <0 72 0x04>;
> + };
> +
> + gr3d {
> + compatible = "nvidia,tegra30-gr3d";
> + reg = <0x54180000 0x00040000>;
> + };
> +
> + dc@54200000 {
> + compatible = "nvidia,tegra30-dc";
> + reg = <0x54200000 0x00040000>;
> + interrupts = <0 73 0x04>;
> +
> + rgb {
> + status = "disabled";
> + };
> + };
> +
> + dc@54240000 {
> + compatible = "nvidia,tegra30-dc";
> + reg = <0x54240000 0x00040000>;
> + interrupts = <0 74 0x04>;
> +
> + rgb {
> + status = "disabled";
> + };
> + };
> +
> + hdmi {
> + compatible = "nvidia,tegra30-hdmi";
> + reg = <0x54280000 0x00040000>;
> + interrupts = <0 75 0x04>;
> + status = "disabled";
> + };
> +
> + tvo {
> + compatible = "nvidia,tegra30-tvo";
> + reg = <0x542c0000 0x00040000>;
> + interrupts = <0 76 0x04>;
> + status = "disabled";
> + };
> +
> + dsi {
> + compatible = "nvidia,tegra30-dsi";
> + reg = <0x54300000 0x00040000>;
> + status = "disabled";
> + };
> + };
> +
> timer@50004600 {
> compatible = "arm,cortex-a9-twd-timer";
> reg = <0x50040600 0x20>;
> diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c
> index cd30338..ff21107 100644
> --- a/arch/arm/mach-tegra/board-dt-tegra30.c
> +++ b/arch/arm/mach-tegra/board-dt-tegra30.c
> @@ -57,6 +57,12 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
> OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DA00, "spi_tegra.3", NULL),
> OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL),
> OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "tegra-host1x", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54200000, "tegra-dc.0", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54240000, "tegra-dc.1", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x54280000, "tegra-hdmi", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-dsi", 0x54300000, "tegra-dsi", NULL),
> + OF_DEV_AUXDATA("nvidia,tegra30-tvo", 0x542c0000, "tegra-tvo", NULL),
> {}
> };
>
> @@ -82,6 +88,10 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
> { "sbc4", "pll_p", 100000000, false},
> { "sbc5", "pll_p", 100000000, false},
> { "sbc6", "pll_p", 100000000, false},
> + { "host1x", "pll_c", 144000000, false},
> + { "disp1", "pll_p", 74000000, false},
> + { "disp2", "pll_d2_out0", 148500000, false},
> + { "hdmi", "pll_d2_out0", 148500000, false},
> { NULL, NULL, 0, 0},
> };
>
> diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c
> index 7bc8b1d..210b8a4 100644
> --- a/arch/arm/mach-tegra/tegra30_clocks_data.c
> +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c
> @@ -1132,14 +1132,14 @@ PERIPH_CLK(2d, "2d", NULL, 21, 0x15c, 520000000, mux_pllm_pllc_pllp_plla, MUX
> PERIPH_CLK(vi_sensor, "tegra_camera", "vi_sensor", 20, 0x1a8, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_NO_RESET);
> PERIPH_CLK(epp, "epp", NULL, 19, 0x16c, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> PERIPH_CLK(mpe, "mpe", NULL, 60, 0x170, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> -PERIPH_CLK(host1x, "host1x", NULL, 28, 0x180, 260000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> +PERIPH_CLK(host1x, "tegra-host1x", NULL, 28, 0x180, 260000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT);
> PERIPH_CLK(cve, "cve", NULL, 49, 0x140, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71); /* requires min voltage */
> PERIPH_CLK(tvo, "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71); /* requires min voltage */
> PERIPH_CLK(dtv, "dtv", NULL, 79, 0x1dc, 250000000, mux_clk_m, 0);
> -PERIPH_CLK(hdmi, "hdmi", NULL, 51, 0x18c, 148500000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8 | DIV_U71);
> +PERIPH_CLK(hdmi, "tegra-hdmi", NULL, 51, 0x18c, 148500000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8 | DIV_U71);
> PERIPH_CLK(tvdac, "tvdac", NULL, 53, 0x194, 220000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71); /* requires min voltage */
> -PERIPH_CLK(disp1, "tegradc.0", NULL, 27, 0x138, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> -PERIPH_CLK(disp2, "tegradc.1", NULL, 26, 0x13c, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> +PERIPH_CLK(disp1, "tegra-dc.0", NULL, 27, 0x138, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> +PERIPH_CLK(disp2, "tegra-dc.1", NULL, 26, 0x13c, 600000000, mux_pllp_pllm_plld_plla_pllc_plld2_clkm, MUX | MUX8);
> PERIPH_CLK(usbd, "fsl-tegra-udc", NULL, 22, 0, 480000000, mux_clk_m, 0); /* requires min voltage */
> PERIPH_CLK(usb2, "tegra-ehci.1", NULL, 58, 0, 480000000, mux_clk_m, 0); /* requires min voltage */
> PERIPH_CLK(usb3, "tegra-ehci.2", NULL, 59, 0, 480000000, mux_clk_m, 0); /* requires min voltage */
> @@ -1337,6 +1337,9 @@ struct clk_duplicate tegra_clk_duplicates[] = {
> CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"),
> CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"),
> CLK_DUPLICATE("pll_p_out3", "tegra-i2c.4", "fast-clk"),
> + CLK_DUPLICATE("pll_p", "tegra-dc.0", "parent"),
> + CLK_DUPLICATE("pll_p", "tegra-dc.1", "parent"),
> + CLK_DUPLICATE("pll_d2_out0", "tegra-hdmi", "parent"),
> };
The tegra-dc.1's parent should be pll_d2_out0.
>
> struct clk *tegra_ptr_clks[] = {
> --
> 1.8.0
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-tegra" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
next prev parent reply other threads:[~2012-11-13 7:45 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-09 13:20 [PATCH 0/2] Device tree updates for host1x support Thierry Reding
2012-11-09 13:20 ` Thierry Reding
2012-11-09 13:20 ` [PATCH 1/2] ARM: tegra: Add Tegra20 " Thierry Reding
[not found] ` <1352467202-27903-2-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
2012-11-12 9:39 ` Mark Zhang
2012-11-12 9:39 ` Mark Zhang
[not found] ` <50A0C3BF.90509-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 4:38 ` Mark Zhang
2012-11-13 4:38 ` Mark Zhang
[not found] ` <50A1CECA.3090804-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 6:41 ` Thierry Reding
2012-11-13 6:41 ` Thierry Reding
[not found] ` <20121113064135.GA31443-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-13 7:37 ` Mark Zhang
2012-11-13 7:37 ` Mark Zhang
2012-11-14 8:35 ` Terje Bergström
2012-11-14 8:35 ` Terje Bergström
[not found] ` <50A357D3.9080002-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 8:49 ` Thierry Reding
2012-11-14 8:49 ` Thierry Reding
[not found] ` <20121114084931.GA31837-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-14 10:23 ` Terje Bergström
2012-11-14 10:23 ` Terje Bergström
[not found] ` <50A3712E.7000104-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 10:54 ` Thierry Reding
2012-11-14 10:54 ` Thierry Reding
2012-11-14 16:19 ` Stephen Warren
[not found] ` <50A3C485.7080704-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-14 16:45 ` Terje Bergström
2012-11-14 16:45 ` Terje Bergström
[not found] ` <50A3CAA3.2060908-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 18:12 ` Stephen Warren
2012-11-14 18:12 ` Stephen Warren
2012-11-14 20:04 ` Thierry Reding
2012-11-14 20:04 ` Thierry Reding
[not found] ` <20121114200415.GA10335-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-14 20:15 ` Stephen Warren
2012-11-14 20:15 ` Stephen Warren
[not found] ` <50A3FBFA.3080008-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-14 20:21 ` Thierry Reding
2012-11-14 20:21 ` Thierry Reding
2012-11-15 6:56 ` Terje Bergström
2012-11-15 6:56 ` Terje Bergström
2012-11-15 7:11 ` Thierry Reding
2012-11-14 15:01 ` Thierry Reding
2012-11-14 15:01 ` Thierry Reding
[not found] ` <20121114150125.GA11050-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-14 15:29 ` Terje Bergström
2012-11-14 15:29 ` Terje Bergström
[not found] ` <50A3B8DD.7010607-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-14 15:33 ` Thierry Reding
2012-11-14 15:33 ` Thierry Reding
2012-11-13 7:45 ` Mark Zhang
[not found] ` <50A1FA7C.4010507-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 7:52 ` Thierry Reding
2012-11-13 7:52 ` Thierry Reding
[not found] ` <20121113075247.GB8409-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-13 8:00 ` Mark Zhang
2012-11-13 8:00 ` Mark Zhang
[not found] ` <50A1FE2F.8000107-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 8:04 ` Thierry Reding
2012-11-13 8:04 ` Thierry Reding
2012-11-13 8:29 ` Mark Zhang
2012-11-09 13:20 ` [PATCH 2/2] ARM: tegra: Add Tegra30 " Thierry Reding
[not found] ` <1352467202-27903-3-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
2012-11-13 4:37 ` Mark Zhang
2012-11-13 4:37 ` Mark Zhang
2012-11-13 7:45 ` Mark Zhang [this message]
2012-11-13 7:45 ` Mark Zhang
[not found] ` <50A1FAB0.8040700-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-11-13 7:53 ` Thierry Reding
2012-11-13 7:53 ` Thierry Reding
[not found] ` <1352467202-27903-1-git-send-email-thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
2012-11-09 17:34 ` [PATCH 0/2] Device tree updates for " Stephen Warren
2012-11-09 17:34 ` Stephen Warren
[not found] ` <509D3EB1.8040703-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-09 18:44 ` Thierry Reding
2012-11-09 18:44 ` Thierry Reding
[not found] ` <20121109184409.GB7663-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org>
2012-11-09 21:10 ` Stephen Warren
2012-11-09 21:10 ` Stephen Warren
[not found] ` <509D7145.9000203-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-11-15 8:21 ` Prashant Gaikwad
2012-11-15 8:21 ` Prashant Gaikwad
2012-11-15 8:50 ` Thierry Reding
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=50A1FAB0.8040700@nvidia.com \
--to=markz-ddmlm1+adcrqt0dzr+alfa@public.gmane.org \
--cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org \
--cc=thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.