From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/7 v2] gpiolib: let gpiochip_add_pin_range() specify offset
Date: Tue, 20 Nov 2012 10:32:44 -0700 [thread overview]
Message-ID: <50ABBEBC.7080701@wwwdotorg.org> (raw)
In-Reply-To: <1353420249-17957-1-git-send-email-linus.walleij@stericsson.com>
On 11/20/2012 07:04 AM, Linus Walleij wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
>
> Like with commit 3c739ad0df5eb41cd7adad879eda6aa09879eb76
> it is not always enough to specify all the pins of a gpio_chip
> from offset zero to be added to a pin map range, since the
> mapping from GPIO to pin controller may not be linear at all,
> but need to be broken into a few consecutive sub-ranges or
> 1-pin entries for complicated cases. The ranges may also be
> sparse.
>
> This alters the signature of the function to accept offsets
> into both the GPIO-chip local pinspace and the pin controller
> local pinspace.
Aside from the one comment I made, the series,
Reviewed-by: Stephen Warren <swarren@nvidia.com>
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren@wwwdotorg.org>
To: Linus Walleij <linus.walleij@stericsson.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Shiraz Hashim <shiraz.hashim@st.com>,
Viresh Kumar <viresh.kumar@linaro.org>,
Stephen Warren <swarren@nvidia.com>,
Anmar Oueja <anmar.oueja@linaro.org>,
Grant Likely <grant.likely@secretlab.ca>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [PATCH 1/7 v2] gpiolib: let gpiochip_add_pin_range() specify offset
Date: Tue, 20 Nov 2012 10:32:44 -0700 [thread overview]
Message-ID: <50ABBEBC.7080701@wwwdotorg.org> (raw)
In-Reply-To: <1353420249-17957-1-git-send-email-linus.walleij@stericsson.com>
On 11/20/2012 07:04 AM, Linus Walleij wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
>
> Like with commit 3c739ad0df5eb41cd7adad879eda6aa09879eb76
> it is not always enough to specify all the pins of a gpio_chip
> from offset zero to be added to a pin map range, since the
> mapping from GPIO to pin controller may not be linear at all,
> but need to be broken into a few consecutive sub-ranges or
> 1-pin entries for complicated cases. The ranges may also be
> sparse.
>
> This alters the signature of the function to accept offsets
> into both the GPIO-chip local pinspace and the pin controller
> local pinspace.
Aside from the one comment I made, the series,
Reviewed-by: Stephen Warren <swarren@nvidia.com>
next prev parent reply other threads:[~2012-11-20 17:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-20 14:04 [PATCH 1/7 v2] gpiolib: let gpiochip_add_pin_range() specify offset Linus Walleij
2012-11-20 14:04 ` Linus Walleij
2012-11-20 14:18 ` Viresh Kumar
2012-11-20 14:18 ` Viresh Kumar
2012-11-20 17:32 ` Stephen Warren [this message]
2012-11-20 17:32 ` Stephen Warren
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