From: Santosh Shilimkar <santosh.shilimkar@ti.com>
To: Paul Walmsley <paul@pwsan.com>
Cc: "Jon Hunter" <jon-hunter@ti.com>,
linux-omap@vger.kernel.org, "Benoît Cousson" <b-cousson@ti.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 09/12] ARM: OMAP2+: powerdomain: skip register reads for powerdomains known to be on
Date: Fri, 21 Dec 2012 12:03:33 +0530 [thread overview]
Message-ID: <50D402BD.3020402@ti.com> (raw)
In-Reply-To: <alpine.DEB.2.00.1212201722190.3498@utopia.booyaka.com>
On Thursday 20 December 2012 10:52 PM, Paul Walmsley wrote:
> On Wed, 19 Dec 2012, Jon Hunter wrote:
>
>> My understanding is that for OMAP4 devices, the core power domain may
>> not be active the same time as the MPU power domain. The Cortex-A9 has
>> the ability to access some peripherals (such as timer, McBSP) via a
>> private bus that does not require the core domain to be active. This is
>> a difference from OMAP3 devices, where the core would always be on with
>> the MPU power domain.
>
> You are absolutely right and I will drop that part from this patch.
>
Just to be clear, MPU has direct path to ABE domain peripherals on
OMAP4. As Jon pointed out MCBSP and few timers are put under this
domain can be directly accessed by MPU without L3. ABE also can
be accessed via L3 by MPU. ABE has a dual map with MPU.
Regards
Santosh
WARNING: multiple messages have this Message-ID (diff)
From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 09/12] ARM: OMAP2+: powerdomain: skip register reads for powerdomains known to be on
Date: Fri, 21 Dec 2012 12:03:33 +0530 [thread overview]
Message-ID: <50D402BD.3020402@ti.com> (raw)
In-Reply-To: <alpine.DEB.2.00.1212201722190.3498@utopia.booyaka.com>
On Thursday 20 December 2012 10:52 PM, Paul Walmsley wrote:
> On Wed, 19 Dec 2012, Jon Hunter wrote:
>
>> My understanding is that for OMAP4 devices, the core power domain may
>> not be active the same time as the MPU power domain. The Cortex-A9 has
>> the ability to access some peripherals (such as timer, McBSP) via a
>> private bus that does not require the core domain to be active. This is
>> a difference from OMAP3 devices, where the core would always be on with
>> the MPU power domain.
>
> You are absolutely right and I will drop that part from this patch.
>
Just to be clear, MPU has direct path to ABE domain peripherals on
OMAP4. As Jon pointed out MCBSP and few timers are put under this
domain can be directly accessed by MPU without L3. ABE also can
be accessed via L3 by MPU. ABE has a dual map with MPU.
Regards
Santosh
next prev parent reply other threads:[~2012-12-21 6:32 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-09 20:02 [PATCH 00/12] ARM: OMAP2+: powerdomain updates after the functional power state conversion Paul Walmsley
2012-12-09 20:02 ` Paul Walmsley
2012-12-09 20:02 ` [PATCH 01/12] ARM: OMAP2+: powerdomain: consolidate arch_pwrdm check code Paul Walmsley
2012-12-09 20:02 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 02/12] ARM: OMAP2+: PM/powerdomain: move the power state time tracking into the powerdomain code Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 03/12] ARM: OMAP2+: powerdomain: split pwrdm_state_switch() Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 04/12] ARM: OMAP2+: PM: clean up some debugfs functions Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 05/12] ARM: OMAP2+: powerdomain: remove some redundant checks; add some notes Paul Walmsley
2012-12-09 20:03 ` [PATCH 06/12] ARM: OMAP2+: CM: use the cached copy of the clockdomain's hwsup state Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 07/12] ARM: OMAP2+: powerdomain: cache the powerdomain next power state Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 08/12] ARM: OMAP2+: powerdomain: cache the powerdomain's previous " Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 09/12] ARM: OMAP2+: powerdomain: skip register reads for powerdomains known to be on Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-12 10:22 ` Vaibhav Hiremath
2012-12-12 10:22 ` Vaibhav Hiremath
2012-12-19 21:09 ` Jon Hunter
2012-12-19 21:09 ` Jon Hunter
2012-12-20 17:22 ` Paul Walmsley
2012-12-20 17:22 ` Paul Walmsley
2012-12-21 6:33 ` Santosh Shilimkar [this message]
2012-12-21 6:33 ` Santosh Shilimkar
2012-12-26 6:21 ` Bedia, Vaibhav
2012-12-26 6:21 ` Bedia, Vaibhav
2012-12-26 6:31 ` Bedia, Vaibhav
2012-12-26 6:31 ` Bedia, Vaibhav
2012-12-26 20:49 ` Paul Walmsley
2012-12-26 20:49 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 10/12] ARM: OMAP2+: powerdomain: skip previous-power-state read if next_pwrst is ON Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 11/12] ARM: OMAP2xxx: powerdomain: add previous power state tracking Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2012-12-09 20:03 ` [PATCH 12/12] ARM: OMAP2xxx: PM: add pwrdm_(pre|post)_transition() calls to the 2xxx PM code Paul Walmsley
2012-12-09 20:03 ` Paul Walmsley
2013-01-04 14:26 ` [PATCH 00/12] ARM: OMAP2+: powerdomain updates after the functional power state conversion Tero Kristo
2013-01-04 14:26 ` Tero Kristo
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