Implementing NAND driver on a PrimeCell SMC PL350 series

Implementing NAND driver on a PrimeCell SMC PL350 series

[Daniel Tang]

Hi,

I'm trying to write a NAND driver for the PL350 memory controller. 

The problem is that the memory controller abstracts quite a lot of the processes needed to access the NAND. For example, the controller handles all the hardware controlling (like dealing with the CLE and ALE lines). This makes it difficult to write a driver that integrates cleanly with the current NAND subsystem of the kernel.

The issue specifically is the cmd_ctrl function that my driver needs to provide. When the kernel needs to write a command and address, it calls the function multiple times to write all the information. E.g. set CLE, write command, set ALE, then write one byte of the page address at a time. The controller, on the other hand, needs all that information to be in a single write to the controller. It does this by embedding the command into the address and have the data value be the page address.

There is a flow chart on page 51 of the reference manual if this seems unclear (http://infocenter.arm.com/help/topic/com.arm.doc.ddi0380g/DDI0380G_smc_pl350_series_r2p1_trm.pdf).

Can anyone advise what would be the best way to implement the driver?

Thanks,
Daniel

Re: Implementing NAND driver on a PrimeCell SMC PL350 series

[Ricard Wanderlof]

On Fri, 11 Jan 2013, Daniel Tang wrote:

> I'm trying to write a NAND driver for the PL350 memory controller.
>
> The problem is that the memory controller abstracts quite a lot of the 
> processes needed to access the NAND. For example, the controller handles 
> all the hardware controlling (like dealing with the CLE and ALE lines). 
> This makes it difficult to write a driver that integrates cleanly with 
> the current NAND subsystem of the kernel.
>
> The issue specifically is the cmd_ctrl function that my driver needs to 
> provide. When the kernel needs to write a command and address, it calls 
> the function multiple times to write all the information. E.g. set CLE, 
> write command, set ALE, then write one byte of the page address at a 
> time. The controller, on the other hand, needs all that information to 
> be in a single write to the controller. It does this by embedding the 
> command into the address and have the data value be the page address.

Have you looked among the existing NAND controller drivers in 
drivers/mtd/nand to see if there's another driver which has similar 
requirements which you could use as a starting point? It's not unusual for 
NAND controllers to do some of the operations automatically, and the mtd 
framework supports this by letting you replace higher-level functions with 
functions from the driver, and not just the low-level functions such as 
hwcontrol and read_byte.

/Ricard
-- 
Ricard Wolf Wanderlöf                           ricardw(at)axis.com
Axis Communications AB, Lund, Sweden            www.axis.com
Phone +46 46 272 2016                           Fax +46 46 13 61 30

Re: Implementing NAND driver on a PrimeCell SMC PL350 series

[Daniel Tang]

On 11/01/2013, at 10:02 PM, Ricard Wanderlof <ricard.wanderlof@axis.com> wrote:

> 
> On Fri, 11 Jan 2013, Daniel Tang wrote:
> 
>> I'm trying to write a NAND driver for the PL350 memory controller.
>> 
>> The problem is that the memory controller abstracts quite a lot of the processes needed to access the NAND. For example, the controller handles all the hardware controlling (like dealing with the CLE and ALE lines). This makes it difficult to write a driver that integrates cleanly with the current NAND subsystem of the kernel.
>> 
>> The issue specifically is the cmd_ctrl function that my driver needs to provide. When the kernel needs to write a command and address, it calls the function multiple times to write all the information. E.g. set CLE, write command, set ALE, then write one byte of the page address at a time. The controller, on the other hand, needs all that information to be in a single write to the controller. It does this by embedding the command into the address and have the data value be the page address.
> 
> Have you looked among the existing NAND controller drivers in drivers/mtd/nand to see if there's another driver which has similar requirements which you could use as a starting point? It's not unusual for NAND controllers to do some of the operations automatically, and the mtd framework supports this by letting you replace higher-level functions with functions from the driver, and not just the low-level functions such as hwcontrol and read_byte.
> 
> /Ricard
> -- 
> Ricard Wolf Wanderlöf                           ricardw(at)axis.com
> Axis Communications AB, Lund, Sweden            www.axis.com
> Phone +46 46 272 2016                           Fax +46 46 13 61 30


I didn't know high level functions could be overridden. Most of the drivers I looked through didn't override the 'nand_command' function for example, so I wasn't aware it was possible.

As per your advice, I also read through some of the other NAND drivers. Although they didn't have anything similar to what I need, I have a good idea of where to head. 

Thanks,

Re: Implementing NAND driver on a PrimeCell SMC PL350 series

[Ricard Wanderlof]

On Sat, 12 Jan 2013, Daniel Tang wrote:

> I didn't know high level functions could be overridden. Most of the 
> drivers I looked through didn't override the 'nand_command' function for 
> example, so I wasn't aware it was possible.

A long time ago, the functions in nand_base.c were marked with things like 
"REPLACABLE" or somesuch to show that they could be replaced with 
user-defined functions.

I guess you have to read through things like nand_scan_defaults() e.g.

         /* check, if a user supplied command function given */
         if (chip->cmdfunc == NULL)
                chip->cmdfunc = nand_command;

etc to get an idea of what to replace.

Of course, if the existing driver framwork is not flexible enough for 
your needs, patches are always welcome.

> As per your advice, I also read through some of the other NAND drivers. 
> Although they didn't have anything similar to what I need, I have a good 
> idea of where to head.

Ok, good!

/Ricard
-- 
Ricard Wolf Wanderlöf                           ricardw(at)axis.com
Axis Communications AB, Lund, Sweden            www.axis.com
Phone +46 46 272 2016                           Fax +46 46 13 61 30

Re: Implementing NAND driver on a PrimeCell SMC PL350 series

[alessandro.maro]

Inviato da iPhone

Il giorno 12/gen/2013, alle ore 12:25, "Ricard Wanderlof" <ricard.wanderlof@axis.com> ha scritto:

>
> On Sat, 12 Jan 2013, Daniel Tang wrote:
>
>> I didn't know high level functions could be overridden. Most of the drivers I looked through didn't override the 'nand_command' function for example, so I wasn't aware it was possible.
>
> A long time ago, the functions in nand_base.c were marked with things like "REPLACABLE" or somesuch to show that they could be replaced with user-defined functions.
>
> I guess you have to read through things like nand_scan_defaults() e.g.
>
>        /* check, if a user supplied command function given */
>        if (chip->cmdfunc == NULL)
>               chip->cmdfunc = nand_command;
>
> etc to get an idea of what to replace.
>
> Of course, if the existing driver framwork is not flexible enough for your needs, patches are always welcome.
>
>> As per your advice, I also read through some of the other NAND drivers. Although they didn't have anything similar to what I need, I have a good idea of where to head.
>
> Ok, good!
>
> /Ricard
> --
> Ricard Wolf Wanderlöf                           ricardw(at)axis.com
> Axis Communications AB, Lund, Sweden            www.axis.com
> Phone +46 46 272 2016                           Fax +46 46 13 61 30
>
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Re: Implementing NAND driver on a PrimeCell SMC PL350 series

[Mike Dunn]

On 01/11/2013 03:02 AM, Ricard Wanderlof wrote:
> 
> On Fri, 11 Jan 2013, Daniel Tang wrote:
> 
>> I'm trying to write a NAND driver for the PL350 memory controller.
>>
>> The problem is that the memory controller abstracts quite a lot of the
>> processes needed to access the NAND. For example, the controller handles all
>> the hardware controlling (like dealing with the CLE and ALE lines). This makes
>> it difficult to write a driver that integrates cleanly with the current NAND
>> subsystem of the kernel.
>>
>> The issue specifically is the cmd_ctrl function that my driver needs to
>> provide. When the kernel needs to write a command and address, it calls the
>> function multiple times to write all the information. E.g. set CLE, write
>> command, set ALE, then write one byte of the page address at a time. The
>> controller, on the other hand, needs all that information to be in a single
>> write to the controller. It does this by embedding the command into the
>> address and have the data value be the page address.
> 
> Have you looked among the existing NAND controller drivers in drivers/mtd/nand
> to see if there's another driver which has similar requirements which you could
> use as a starting point? It's not unusual for NAND controllers to do some of the
> operations automatically, and the mtd framework supports this by letting you
> replace higher-level functions with functions from the driver, and not just the
> low-level functions such as hwcontrol and read_byte.


You might find it helpful to take a look at docg4.c in particular.  This device
is a nand wrapped in a proprietary controller, which sounds similiar to your
hardware.  This device does not have control of low-level lines either.

Hope this helps,
Mike