From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <jbeulich@suse.com>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: andrew.cooper3@citrix.com, "Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [PATCH v9 10/10] x86emul: support AVX512-BMM
Date: Fri, 5 Dec 2025 12:33:32 +0000 [thread overview]
Message-ID: <50ff35c6-5da2-4c6f-94b2-025440ee618f@citrix.com> (raw)
In-Reply-To: <732d56d9-d200-410e-8b52-48c5e25bcf5c@suse.com>
On 24/11/2025 3:02 pm, Jan Beulich wrote:
> EVEX.W meaning is unusual for VBMAC{,X}OR16x16x16, but that needs taking
> care of only in the test harness.
>
> Like already proposed in "x86emul: support AVX10.1", use just
> vcpu_must_have(), not host_and_vcpu_must_have().
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> ---
> The Disp8Shift settings are guesswork; the binutils submission bogusly(?)
> suggests no scaling at all.
>
> No idea how to test this without having access to capable hardware. AMD,
> to my knowledge, offers no equivalent to Intel's SDE.
I'm not aware of anything equivalent for AMD.
IIRC, the binutils thread says Zen6 for these instructions? I'm still
trying to get access myself. No ETA yet.
Very tentatively Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Given that .W is wonky for these instructions, I wouldn't quite so
easily rule out other wonkyness.
Would the test harness pick that up? Not AFAICT.
~Andrew
next prev parent reply other threads:[~2025-12-05 12:33 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-24 14:56 [PATCH v9 10/10] x86emul: misc additions Jan Beulich
2025-11-24 14:57 ` [PATCH v9 01/10] x86emul: support LKGS Jan Beulich
2025-11-24 14:58 ` [PATCH v9 02/10] x86emul+VMX: support {RD,WR}MSRLIST Jan Beulich
2025-11-24 14:58 ` [PATCH v9 03/10] x86emul: support USER_MSR instructions Jan Beulich
2025-11-24 14:59 ` [PATCH v9 04/10] x86/cpu-policy: re-arrange no-VMX logic Jan Beulich
2026-04-07 21:58 ` Andrew Cooper
2026-04-08 6:09 ` Jan Beulich
2025-11-24 15:00 ` [PATCH v9 05/10] VMX: support USER-MSR Jan Beulich
2025-11-24 15:00 ` [PATCH v9 06/10] x86emul: support MSR_IMM instructions Jan Beulich
2025-11-24 15:00 ` [PATCH v9 07/10] VMX: support MSR-IMM Jan Beulich
2025-11-26 18:50 ` Andrew Cooper
2025-11-27 8:18 ` Jan Beulich
2025-11-24 15:01 ` [PATCH v9 08/10] x86emul: support non-SIMD MOVRS Jan Beulich
2025-11-24 15:01 ` [PATCH v9 09/10] x86: use / "support" UDB Jan Beulich
2025-12-05 12:01 ` Andrew Cooper
2025-12-05 12:40 ` Andrew Cooper
2025-12-05 13:13 ` Jan Beulich
2025-12-05 13:15 ` Andrew Cooper
2025-12-05 13:15 ` Jan Beulich
2025-12-05 13:35 ` Andrew Cooper
2025-12-05 13:09 ` Jan Beulich
2025-11-24 15:02 ` [PATCH v9 10/10] x86emul: support AVX512-BMM Jan Beulich
2025-12-05 12:33 ` Andrew Cooper [this message]
2025-12-05 12:47 ` Jan Beulich
2026-04-07 15:11 ` Andrew Cooper
2025-11-24 15:03 ` [PATCH v9 00/10] x86emul: misc additions Jan Beulich
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