From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 10/15] ARM: vexpress/dcscb: add CPU use counts to the power up/down API implementation
Date: Fri, 1 Feb 2013 11:23:17 +0530 [thread overview]
Message-ID: <510B584D.9020805@ti.com> (raw)
In-Reply-To: <1359445870-18925-11-git-send-email-nicolas.pitre@linaro.org>
On Tuesday 29 January 2013 01:21 PM, Nicolas Pitre wrote:
> It is possible for a CPU to be told to power up before it managed
> to power itself down. Solve this race with a usage count as mandated
> by the API definition.
>
> Signed-off-by: nicolas Pitre <nico@linaro.org>
> ---
> arch/arm/mach-vexpress/dcscb.c | 77 +++++++++++++++++++++++++++++++++---------
> 1 file changed, 61 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c
> index 677ced9efc..f993608944 100644
> --- a/arch/arm/mach-vexpress/dcscb.c
> +++ b/arch/arm/mach-vexpress/dcscb.c
> @@ -45,6 +45,7 @@
> static arch_spinlock_t dcscb_lock = __ARCH_SPIN_LOCK_UNLOCKED;
>
> static void __iomem *dcscb_base;
> +static int dcscb_use_count[4][2];
>
> static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
> {
> @@ -61,14 +62,27 @@ static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
> local_irq_disable();
> arch_spin_lock(&dcscb_lock);
>
> - rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
> - if (rst_hold & (1 << 8)) {
> - /* remove cluster reset and add individual CPU's reset */
> - rst_hold &= ~(1 << 8);
> - rst_hold |= 0xf;
> + dcscb_use_count[cpu][cluster]++;
> + if (dcscb_use_count[cpu][cluster] == 1) {
> + rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
> + if (rst_hold & (1 << 8)) {
> + /* remove cluster reset and add individual CPU's reset */
> + rst_hold &= ~(1 << 8);
> + rst_hold |= 0xf;
> + }
> + rst_hold &= ~(cpumask | (cpumask << 4));
> + writel(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
> + } else if (dcscb_use_count[cpu][cluster] != 2) {
> + /*
> + * The only possible values are:
> + * 0 = CPU down
> + * 1 = CPU (still) up
> + * 2 = CPU requested to be up before it had a chance
> + * to actually make itself down.
> + * Any other value is a bug.
> + */
> + BUG();
No strong opinion but would switch case be better here ?
> }
> - rst_hold &= ~(cpumask | (cpumask << 4));
> - writel(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
>
> arch_spin_unlock(&dcscb_lock);
> local_irq_enable();
> @@ -78,7 +92,8 @@ static int dcscb_power_up(unsigned int cpu, unsigned int cluster)
>
> static void dcscb_power_down(void)
> {
> - unsigned int mpidr, cpu, cluster, rst_hold, cpumask, last_man;
> + unsigned int mpidr, cpu, cluster, rst_hold, cpumask;
> + bool last_man = false, skip_wfi = false;
>
> mpidr = read_cpuid_mpidr();
> cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
> @@ -89,13 +104,26 @@ static void dcscb_power_down(void)
> BUG_ON(cpu >= 4 || cluster >= 2);
>
> arch_spin_lock(&dcscb_lock);
> - rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
> - rst_hold |= cpumask;
> - if (((rst_hold | (rst_hold >> 4)) & 0xf) == 0xf)
> - rst_hold |= (1 << 8);
> - writel(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
> + dcscb_use_count[cpu][cluster]--;
> + if (dcscb_use_count[cpu][cluster] == 0) {
> + rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
> + rst_hold |= cpumask;
> + if (((rst_hold | (rst_hold >> 4)) & 0xf) == 0xf) {
> + rst_hold |= (1 << 8);
> + last_man = true;
> + }
> + writel(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
> + } else if (dcscb_use_count[cpu][cluster] == 1) {
> + /*
> + * A power_up request went ahead of us.
> + * Even if we do not want to shut this CPU down,
> + * the caller expects a certain state as if the WFI
> + * was aborted. So let's continue with cache cleaning.
> + */
> + skip_wfi = true;
> + } else
> + BUG();
Same comment as above.
Rest looks fine.
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
next prev parent reply other threads:[~2013-02-01 5:53 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-29 7:50 [PATCH v3 00/15] multi-cluster power management Nicolas Pitre
2013-01-29 7:50 ` [PATCH v3 01/15] ARM: multi-cluster PM: secondary kernel entry code Nicolas Pitre
2013-01-31 15:45 ` Santosh Shilimkar
2013-01-29 7:50 ` [PATCH v3 02/15] ARM: mcpm: introduce the CPU/cluster power API Nicolas Pitre
2013-01-31 15:55 ` Santosh Shilimkar
2013-01-29 7:50 ` [PATCH v3 03/15] ARM: mcpm: introduce helpers for platform coherency exit/setup Nicolas Pitre
2013-01-31 16:08 ` Santosh Shilimkar
2013-01-31 17:16 ` Nicolas Pitre
2013-02-01 5:10 ` Santosh Shilimkar
2013-02-01 17:26 ` Nicolas Pitre
2013-01-29 7:50 ` [PATCH v3 04/15] ARM: mcpm: Add baremetal voting mutexes Nicolas Pitre
2013-02-01 5:29 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 05/15] ARM: mcpm_head.S: vlock-based first man election Nicolas Pitre
2013-02-01 5:34 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 06/15] ARM: mcpm: generic SMP secondary bringup and hotplug support Nicolas Pitre
2013-01-29 20:38 ` Rob Herring
2013-02-01 5:38 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 07/15] ARM: vexpress: Select the correct SMP operations at run-time Nicolas Pitre
2013-01-29 15:43 ` Jon Medhurst (Tixy)
2013-01-29 19:26 ` Nicolas Pitre
2013-02-01 5:41 ` Santosh Shilimkar
2013-02-01 17:28 ` Nicolas Pitre
2013-01-29 7:51 ` [PATCH v3 08/15] ARM: introduce common set_auxcr/get_auxcr functions Nicolas Pitre
2013-02-01 5:44 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 09/15] ARM: vexpress: introduce DCSCB support Nicolas Pitre
2013-02-01 5:50 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 10/15] ARM: vexpress/dcscb: add CPU use counts to the power up/down API implementation Nicolas Pitre
2013-02-01 5:53 ` Santosh Shilimkar [this message]
2013-01-29 7:51 ` [PATCH v3 11/15] ARM: vexpress/dcscb: do not hardcode number of CPUs per cluster Nicolas Pitre
2013-02-01 5:57 ` Santosh Shilimkar
2013-02-01 17:24 ` Nicolas Pitre
2013-02-02 6:54 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 12/15] drivers/bus: add ARM CCI support Nicolas Pitre
2013-02-01 6:01 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 13/15] ARM: CCI: ensure powerdown-time data is flushed from cache Nicolas Pitre
2013-02-01 6:13 ` Santosh Shilimkar
2013-02-02 22:23 ` Nicolas Pitre
2013-02-03 10:07 ` Santosh Shilimkar
2013-02-03 18:29 ` Nicolas Pitre
2013-02-04 5:25 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 14/15] ARM: vexpress/dcscb: handle platform coherency exit/setup and CCI Nicolas Pitre
2013-01-29 10:46 ` Lorenzo Pieralisi
2013-01-29 18:42 ` Nicolas Pitre
2013-01-30 17:27 ` Lorenzo Pieralisi
2013-02-01 6:15 ` Santosh Shilimkar
2013-01-29 7:51 ` [PATCH v3 15/15] ARM: vexpress/dcscb: probe via device tree Nicolas Pitre
2013-01-29 21:01 ` Rob Herring
2013-01-29 21:41 ` Nicolas Pitre
2013-01-30 12:22 ` Achin Gupta
2013-01-30 17:43 ` Nicolas Pitre
2013-01-31 10:54 ` Dave Martin
2013-02-04 4:39 ` Nicolas Pitre
2013-02-04 14:24 ` [PATCH v3 00/15] multi-cluster power management Will Deacon
2013-02-04 20:59 ` Nicolas Pitre
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=510B584D.9020805@ti.com \
--to=santosh.shilimkar@ti.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.