All of lore.kernel.org
 help / color / mirror / Atom feed
From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 13/15] ARM: CCI: ensure powerdown-time data is flushed from cache
Date: Sun, 3 Feb 2013 15:37:09 +0530	[thread overview]
Message-ID: <510E36CD.9000005@ti.com> (raw)
In-Reply-To: <alpine.LFD.2.02.1302021708460.6300@xanadu.home>

On Sunday 03 February 2013 03:53 AM, Nicolas Pitre wrote:
> On Fri, 1 Feb 2013, Santosh Shilimkar wrote:
>
>> On Tuesday 29 January 2013 01:21 PM, Nicolas Pitre wrote:
>>> From: Dave Martin <dave.martin@linaro.org>
>>>
>>> Non-local variables used by the CCI management function called after
>>> disabling the cache must be flushed out to main memory in advance,
>>> otherwise incoherency of those values may occur if they are sitting
>>> in the cache of some other CPU when cci_disable() executes.
>>>
>> Any CPU calling cci_disable() would have already cleaned its local
>> cache and the snoop unit should take care of syncing the shared data
>> before hand from other CPU local caches for shared accesses.
>> May be I am unable to visualize the issue here or missing some key
>> point.
>
> Let's suppose CPU0 initializes the CCI.  Without this patch, the CCI
> base address might be sitting in CPU0's cache.
>
> The last CPU in a cluster to shut itself down is responsible for calling
> cci_disable().  And being the last, it is also responsible for flushing
> out its L1 and L2 caches before doing that.  If CPU0 went down before
> that, it did flush its L1 already. So the base address will be flushed
> to RAM in that case.
>
Yes. This is valid case. Thanks for description.

> But if it is a CPU in _another_ cluster which is shutting down and
> becoming the last man _there_.  It will flush its L1 and L2 cache
> before calling cci_disable().  And
> because the cache is disabled at that point, that CPU won't
> send any snoop request across to the other cluster where CPU0 holds the
> base address in its L1 or even L2 cache.
>
> This is why we must push out that value out to RAM before cci_disable()
> is used.
>
>>> This patch adds the appropriate flushing to the CCI driver to ensure
>>> that the relevant data is available in RAM ahead of time.
>>>
>>> Because this creates a dependency on arch-specific cacheflushing
>>> functions, this patch also makes ARM_CCI depend on ARM.
>>>
>> You should do that otherwise to avoid other arch building this
>> driver for random builds and breaking their builds.
>
> Before this patch the driver was buildable on any architecture.  That's
> why this dependency is added only in this patch.
>
I was just trying to counter the reasoning in the changelog which says
dependency is added because of arch specific cache flushing function.
Meaning even without that ARM dependency should be in place to avoid
driver getting build for other archs.

Regards,
Santosh

  reply	other threads:[~2013-02-03 10:07 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-29  7:50 [PATCH v3 00/15] multi-cluster power management Nicolas Pitre
2013-01-29  7:50 ` [PATCH v3 01/15] ARM: multi-cluster PM: secondary kernel entry code Nicolas Pitre
2013-01-31 15:45   ` Santosh Shilimkar
2013-01-29  7:50 ` [PATCH v3 02/15] ARM: mcpm: introduce the CPU/cluster power API Nicolas Pitre
2013-01-31 15:55   ` Santosh Shilimkar
2013-01-29  7:50 ` [PATCH v3 03/15] ARM: mcpm: introduce helpers for platform coherency exit/setup Nicolas Pitre
2013-01-31 16:08   ` Santosh Shilimkar
2013-01-31 17:16     ` Nicolas Pitre
2013-02-01  5:10       ` Santosh Shilimkar
2013-02-01 17:26         ` Nicolas Pitre
2013-01-29  7:50 ` [PATCH v3 04/15] ARM: mcpm: Add baremetal voting mutexes Nicolas Pitre
2013-02-01  5:29   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 05/15] ARM: mcpm_head.S: vlock-based first man election Nicolas Pitre
2013-02-01  5:34   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 06/15] ARM: mcpm: generic SMP secondary bringup and hotplug support Nicolas Pitre
2013-01-29 20:38   ` Rob Herring
2013-02-01  5:38   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 07/15] ARM: vexpress: Select the correct SMP operations at run-time Nicolas Pitre
2013-01-29 15:43   ` Jon Medhurst (Tixy)
2013-01-29 19:26     ` Nicolas Pitre
2013-02-01  5:41   ` Santosh Shilimkar
2013-02-01 17:28     ` Nicolas Pitre
2013-01-29  7:51 ` [PATCH v3 08/15] ARM: introduce common set_auxcr/get_auxcr functions Nicolas Pitre
2013-02-01  5:44   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 09/15] ARM: vexpress: introduce DCSCB support Nicolas Pitre
2013-02-01  5:50   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 10/15] ARM: vexpress/dcscb: add CPU use counts to the power up/down API implementation Nicolas Pitre
2013-02-01  5:53   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 11/15] ARM: vexpress/dcscb: do not hardcode number of CPUs per cluster Nicolas Pitre
2013-02-01  5:57   ` Santosh Shilimkar
2013-02-01 17:24     ` Nicolas Pitre
2013-02-02  6:54       ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 12/15] drivers/bus: add ARM CCI support Nicolas Pitre
2013-02-01  6:01   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 13/15] ARM: CCI: ensure powerdown-time data is flushed from cache Nicolas Pitre
2013-02-01  6:13   ` Santosh Shilimkar
2013-02-02 22:23     ` Nicolas Pitre
2013-02-03 10:07       ` Santosh Shilimkar [this message]
2013-02-03 18:29         ` Nicolas Pitre
2013-02-04  5:25           ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 14/15] ARM: vexpress/dcscb: handle platform coherency exit/setup and CCI Nicolas Pitre
2013-01-29 10:46   ` Lorenzo Pieralisi
2013-01-29 18:42     ` Nicolas Pitre
2013-01-30 17:27       ` Lorenzo Pieralisi
2013-02-01  6:15   ` Santosh Shilimkar
2013-01-29  7:51 ` [PATCH v3 15/15] ARM: vexpress/dcscb: probe via device tree Nicolas Pitre
2013-01-29 21:01   ` Rob Herring
2013-01-29 21:41     ` Nicolas Pitre
2013-01-30 12:22       ` Achin Gupta
2013-01-30 17:43         ` Nicolas Pitre
2013-01-31 10:54           ` Dave Martin
2013-02-04  4:39             ` Nicolas Pitre
2013-02-04 14:24 ` [PATCH v3 00/15] multi-cluster power management Will Deacon
2013-02-04 20:59   ` Nicolas Pitre

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=510E36CD.9000005@ti.com \
    --to=santosh.shilimkar@ti.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.