Bad divider used for sysclk for DSS and ABE (CM_ABE_DSS_SYS_CLKSEL)

Bad divider used for sysclk for DSS and ABE (CM_ABE_DSS_SYS_CLKSEL)

[Tomi Valkeinen]

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Hi Paul,

OMAP4 TRM has a mention in CM_ABE_DSS_SYS_CLKSEL's description:

"Select SYS_CLK divided by 2. Must be used for
SYS_CLK > 26 MHz"

This doesn't seem to be enforced with the current kernel. OMAP4 blaze
has 38.4MHz sys clk, but above mentioned divider is 1.

I made a quick test with omapdss, so that omapdss sets the divider to 2
when initializing. Everything seemed to work fine, although everything
has been working fine with the divider 1 also. But I think it'd be wise
to adhere to the TRM.

Is this something that the bootloader should setup, or should kernel do
it (also)?

 Tomi


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