From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: horms@verge.net.au, linux-renesas-soc@vger.kernel.org,
robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org
Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC v2 9/12] ARM: dts: r8a7743: add IRQC support
Date: Fri, 30 Sep 2016 01:30:34 +0300 [thread overview]
Message-ID: <5117174.mN2ltzAt4c@wasted.cogentembedded.com> (raw)
In-Reply-To: <1987532.PE2ex6PrJ5@wasted.cogentembedded.com>
Describe the IRQC interrupt controller in the R8A7743 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- new patch.
arch/arm/boot/dts/r8a7743.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7743.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7743.dtsi
+++ renesas/arch/arm/boot/dts/r8a7743.dtsi
@@ -72,6 +72,25 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ irqc: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7743", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7743_CLK_IRQC>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC v2 9/12] ARM: dts: r8a7743: add IRQC support
Date: Fri, 30 Sep 2016 01:30:34 +0300 [thread overview]
Message-ID: <5117174.mN2ltzAt4c@wasted.cogentembedded.com> (raw)
In-Reply-To: <1987532.PE2ex6PrJ5@wasted.cogentembedded.com>
Describe the IRQC interrupt controller in the R8A7743 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- new patch.
arch/arm/boot/dts/r8a7743.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7743.dtsi
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7743.dtsi
+++ renesas/arch/arm/boot/dts/r8a7743.dtsi
@@ -72,6 +72,25 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
+ irqc: interrupt-controller at e61c0000 {
+ compatible = "renesas,irqc-r8a7743", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp4_clks R8A7743_CLK_IRQC>;
+ power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
next prev parent reply other threads:[~2016-09-29 22:30 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-29 22:14 [PATCH RFC v2 0/12] Add R8A7743/SK-RZG1M board support Sergei Shtylyov
2016-09-29 22:14 ` Sergei Shtylyov
2016-09-29 22:16 ` [PATCH RFC v2 1/12] ARM: shmobile: r8a7743: add clock index macros Sergei Shtylyov
2016-09-29 22:17 ` [PATCH RFC v2 2/12] ARM: shmobile: r8a7743: add power domain " Sergei Shtylyov
2016-09-29 22:17 ` Sergei Shtylyov
2016-09-29 22:21 ` [PATCH RFC v2 3/12] soc: renesas: rcar-sysc: add R8A7743 support Sergei Shtylyov
2016-09-29 22:21 ` Sergei Shtylyov
2016-09-29 22:23 ` [PATCH RFC v2 4/12] ARM: shmobile: r8a7743: basic SoC support Sergei Shtylyov
2016-09-29 22:23 ` Sergei Shtylyov
2016-10-05 10:32 ` Laurent Pinchart
2016-10-05 10:32 ` Laurent Pinchart
2016-10-05 10:32 ` Laurent Pinchart
2016-09-29 22:25 ` [PATCH RFC v2 5/12] ARM: dts: r8a7743: initial SoC device tree Sergei Shtylyov
2016-09-29 22:25 ` Sergei Shtylyov
2016-09-29 22:26 ` [PATCH RFC v2 6/12] ARM: dts: r8a7743: add SYS-DMAC support Sergei Shtylyov
2016-09-29 22:26 ` Sergei Shtylyov
2016-09-29 22:26 ` Sergei Shtylyov
2016-09-29 22:28 ` [PATCH RFC v2 7/12] ARM: dts: r8a7743: add [H]SCIF[AB] support Sergei Shtylyov
2016-09-29 22:28 ` Sergei Shtylyov
2016-09-29 22:29 ` [PATCH RFC v2 8/12] ARM: dts: r8a7743: add Ether support Sergei Shtylyov
2016-09-29 22:29 ` Sergei Shtylyov
2016-09-29 22:29 ` Sergei Shtylyov
2016-09-29 22:30 ` Sergei Shtylyov [this message]
2016-09-29 22:30 ` [PATCH RFC v2 9/12] ARM: dts: r8a7743: add IRQC support Sergei Shtylyov
2016-09-29 22:32 ` [PATCH RFC v2 10/12] DT: arm: shmobile: document SK-RZG1M board Sergei Shtylyov
2016-09-29 22:32 ` Sergei Shtylyov
2016-09-30 8:32 ` Geert Uytterhoeven
2016-09-29 22:34 ` [PATCH RFC v2 11/12] ARM: dts: sk-rzg1m: initial device tree Sergei Shtylyov
2016-09-29 22:34 ` Sergei Shtylyov
2016-10-05 7:46 ` Geert Uytterhoeven
2016-10-05 7:46 ` Geert Uytterhoeven
2016-10-05 7:46 ` Geert Uytterhoeven
2016-09-29 22:35 ` [PATCH RFC v2 12/12] ARM: dts: sk-rzg1m: add Ether support Sergei Shtylyov
2016-09-29 22:35 ` Sergei Shtylyov
2016-09-29 22:35 ` Sergei Shtylyov
2016-10-01 11:29 ` [PATCH RFC v2 0/12] Add R8A7743/SK-RZG1M board support Geert Uytterhoeven
2016-10-01 11:29 ` Geert Uytterhoeven
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