From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 2/4] ARM: tegra: pmc: add power on function for secondary CPUs
Date: Fri, 22 Feb 2013 11:37:06 -0700 [thread overview]
Message-ID: <5127BAD2.8030904@wwwdotorg.org> (raw)
In-Reply-To: <1361515491-16199-3-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 02/21/2013 11:44 PM, Joseph Lo wrote:
> Adding the power on function for secondary CPUs in PMC driver, this can
> help us to remove legacy powergate driver and add generic power domain
> support later.
> diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
> +static u8 tegra_cpu_domains[] = {
> + 0xFF, /* not available for CPU0 */
> + TEGRA_POWERGATE_CPU1,
> + TEGRA_POWERGATE_CPU2,
> + TEGRA_POWERGATE_CPU3,
> +};
Per Peter's comment, you probably need SoC-specific arrays here, to
support CPU0 having a valid value or not.
> +static int tegra_pmc_get_cpu_powerdomain_id(int cpuid)
> +{
> + if (cpuid <= 0 || cpuid > num_possible_cpus())
cpuid >= num_possible_cpus()?
> +static int tegra_pmc_powergate_set(int id, bool new_state)
> +{
> + bool status;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&tegra_powergate_lock, flags);
> +
> + status = tegra_pmc_readl(PMC_PWRGATE_STATUS) & (1 << id);
I would perform the read and the logical operations separately. Same for
the write below.
Don't you want to and with ~BIT(id) not BIT(id)?
> +static int tegra_pmc_powergate_remove_clamping(int id)
> +{
> + u32 mask;
> +
> + /*
> + * Tegra has a bug where PCIE and VDE clamping masks are
> + * swapped relatively to the partition ids.
> + */
> + if (id == TEGRA_POWERGATE_VDEC)
> + mask = (1 << TEGRA_POWERGATE_PCIE);
> + else if (id == TEGRA_POWERGATE_PCIE)
> + mask = (1 << TEGRA_POWERGATE_VDEC);
> + else
> + mask = (1 << id);
Is this just true for this one register, but not others? If it's true
everywhere, why not just fix the TEGRA_POWERGATE_* definitions?
I asked this downstream, but you didn't answer.
> +bool tegra_pmc_cpu_is_powered(int cpuid)
> +{
> + int id;
> +
> + id = tegra_pmc_get_cpu_powerdomain_id(cpuid);
> + if (IS_ERR_VALUE(id))
> + return false;
As I pointed out downstream, that should be if (id < 0); IS_ERR_VALUE is
intended for use on error-pointers, not on integer error codes.
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/4] ARM: tegra: pmc: add power on function for secondary CPUs
Date: Fri, 22 Feb 2013 11:37:06 -0700 [thread overview]
Message-ID: <5127BAD2.8030904@wwwdotorg.org> (raw)
In-Reply-To: <1361515491-16199-3-git-send-email-josephl@nvidia.com>
On 02/21/2013 11:44 PM, Joseph Lo wrote:
> Adding the power on function for secondary CPUs in PMC driver, this can
> help us to remove legacy powergate driver and add generic power domain
> support later.
> diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
> +static u8 tegra_cpu_domains[] = {
> + 0xFF, /* not available for CPU0 */
> + TEGRA_POWERGATE_CPU1,
> + TEGRA_POWERGATE_CPU2,
> + TEGRA_POWERGATE_CPU3,
> +};
Per Peter's comment, you probably need SoC-specific arrays here, to
support CPU0 having a valid value or not.
> +static int tegra_pmc_get_cpu_powerdomain_id(int cpuid)
> +{
> + if (cpuid <= 0 || cpuid > num_possible_cpus())
cpuid >= num_possible_cpus()?
> +static int tegra_pmc_powergate_set(int id, bool new_state)
> +{
> + bool status;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&tegra_powergate_lock, flags);
> +
> + status = tegra_pmc_readl(PMC_PWRGATE_STATUS) & (1 << id);
I would perform the read and the logical operations separately. Same for
the write below.
Don't you want to and with ~BIT(id) not BIT(id)?
> +static int tegra_pmc_powergate_remove_clamping(int id)
> +{
> + u32 mask;
> +
> + /*
> + * Tegra has a bug where PCIE and VDE clamping masks are
> + * swapped relatively to the partition ids.
> + */
> + if (id == TEGRA_POWERGATE_VDEC)
> + mask = (1 << TEGRA_POWERGATE_PCIE);
> + else if (id == TEGRA_POWERGATE_PCIE)
> + mask = (1 << TEGRA_POWERGATE_VDEC);
> + else
> + mask = (1 << id);
Is this just true for this one register, but not others? If it's true
everywhere, why not just fix the TEGRA_POWERGATE_* definitions?
I asked this downstream, but you didn't answer.
> +bool tegra_pmc_cpu_is_powered(int cpuid)
> +{
> + int id;
> +
> + id = tegra_pmc_get_cpu_powerdomain_id(cpuid);
> + if (IS_ERR_VALUE(id))
> + return false;
As I pointed out downstream, that should be if (id < 0); IS_ERR_VALUE is
intended for use on error-pointers, not on integer error codes.
next prev parent reply other threads:[~2013-02-22 18:37 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-22 6:44 [PATCH 0/4] ARM: tegra114: bring up secondary CPU for SMP Joseph Lo
2013-02-22 6:44 ` Joseph Lo
[not found] ` <1361515491-16199-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-22 6:44 ` [PATCH 1/4] ARM: tegra: pmc: convert PMC driver to support DT only Joseph Lo
2013-02-22 6:44 ` Joseph Lo
[not found] ` <1361515491-16199-2-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-22 13:05 ` Peter De Schrijver
2013-02-22 13:05 ` Peter De Schrijver
[not found] ` <20130222130516.GW23234-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-23 2:03 ` Joseph Lo
2013-02-23 2:03 ` Joseph Lo
[not found] ` <1361585022.1804.11.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-02-23 4:31 ` Stephen Warren
2013-02-23 4:31 ` Stephen Warren
[not found] ` <51284615.6080808-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-25 14:28 ` Peter De Schrijver
2013-02-25 14:28 ` Peter De Schrijver
[not found] ` <20130225142841.GJ23234-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-25 15:43 ` Stephen Warren
2013-02-25 15:43 ` Stephen Warren
[not found] ` <512B8691.5000702-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-26 2:27 ` Joseph Lo
2013-02-26 2:27 ` Joseph Lo
2013-02-22 18:32 ` Stephen Warren
2013-02-22 18:32 ` Stephen Warren
2013-02-22 6:44 ` [PATCH 2/4] ARM: tegra: pmc: add power on function for secondary CPUs Joseph Lo
2013-02-22 6:44 ` Joseph Lo
[not found] ` <1361515491-16199-3-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-22 13:00 ` Peter De Schrijver
2013-02-22 13:00 ` Peter De Schrijver
[not found] ` <20130222130051.GV23234-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-23 2:38 ` Joseph Lo
2013-02-23 2:38 ` Joseph Lo
[not found] ` <1361587135.1804.16.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-02-23 4:32 ` Stephen Warren
2013-02-23 4:32 ` Stephen Warren
[not found] ` <51284660.8060002-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-23 4:59 ` Joseph Lo
2013-02-23 4:59 ` Joseph Lo
[not found] ` <1361595573.1804.46.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-02-23 15:38 ` Peter De Schrijver
2013-02-23 15:38 ` Peter De Schrijver
2013-02-22 18:37 ` Stephen Warren [this message]
2013-02-22 18:37 ` Stephen Warren
[not found] ` <5127BAD2.8030904-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-02-23 7:28 ` Joseph Lo
2013-02-23 7:28 ` Joseph Lo
[not found] ` <1361604480.1804.59.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-02-23 9:39 ` Russell King - ARM Linux
2013-02-23 9:39 ` Russell King - ARM Linux
2013-02-23 23:59 ` Stephen Warren
2013-02-23 23:59 ` Stephen Warren
2013-02-25 8:39 ` Peter De Schrijver
2013-02-25 8:39 ` Peter De Schrijver
2013-02-22 6:44 ` [PATCH 3/4] ARM: tegra30: platsmp: replace the CPU power on function in PMC driver Joseph Lo
2013-02-22 6:44 ` Joseph Lo
2013-02-22 6:44 ` [PATCH 4/4] ARM: tegra114: bring up secondary CPU for SMP Joseph Lo
2013-02-22 6:44 ` Joseph Lo
2013-02-22 12:43 ` [PATCH 0/4] " Peter De Schrijver
2013-02-22 12:43 ` Peter De Schrijver
[not found] ` <20130222124351.GU23234-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-23 1:57 ` Joseph Lo
2013-02-23 1:57 ` Joseph Lo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5127BAD2.8030904@wwwdotorg.org \
--to=swarren-3lzwwm7+weoh9zmkesr00q@public.gmane.org \
--cc=josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org \
--cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.