[PATCH V3] drm/exynos: fimd: calculate the correct address offset

[PATCH V3] drm/exynos: fimd: calculate the correct address offset

[Leela Krishna Amudala]

Calculate the correct address offset values for alpha and color key
control registers based on exynos4 and exynos5 user manuals.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_drm_fimd.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 9537761..f5f2b25 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -38,11 +38,12 @@
 /* position control register for hardware window 0, 2 ~ 4.*/
 #define VIDOSD_A(win)		(VIDOSD_BASE + 0x00 + (win) * 16)
 #define VIDOSD_B(win)		(VIDOSD_BASE + 0x04 + (win) * 16)
-/* size control register for hardware window 0. */
-#define VIDOSD_C_SIZE_W0	(VIDOSD_BASE + 0x08)
-/* alpha control register for hardware window 1 ~ 4. */
-#define VIDOSD_C(win)		(VIDOSD_BASE + 0x18 + (win) * 16)
-/* size control register for hardware window 1 ~ 4. */
+/*
+ * size control register for hardware windows 0 and alpha control register
+ * for hardware windows 1 ~ 4
+ */
+#define VIDOSD_C(win)		(VIDOSD_BASE + 0x08 + (win) * 16)
+/* size control register for hardware windows 1 ~ 2. */
 #define VIDOSD_D(win)		(VIDOSD_BASE + 0x0C + (win) * 16)
 
 #define VIDWx_BUF_START(win, buf)	(VIDW_BUF_START(buf) + (win) * 8)
@@ -50,9 +51,9 @@
 #define VIDWx_BUF_SIZE(win, buf)	(VIDW_BUF_SIZE(buf) + (win) * 4)
 
 /* color key control register for hardware window 1 ~ 4. */
-#define WKEYCON0_BASE(x)		((WKEYCON0 + 0x140) + (x * 8))
+#define WKEYCON0_BASE(x)		((WKEYCON0 + 0x140) + ((x - 1) * 8))
 /* color key value register for hardware window 1 ~ 4. */
-#define WKEYCON1_BASE(x)		((WKEYCON1 + 0x140) + (x * 8))
+#define WKEYCON1_BASE(x)		((WKEYCON1 + 0x140) + ((x - 1) * 8))
 
 /* FIMD has totally five hardware windows. */
 #define WINDOWS_NR	5
@@ -581,7 +582,7 @@ static void fimd_win_commit(struct device *dev, int zpos)
 	if (win != 3 && win != 4) {
 		u32 offset = VIDOSD_D(win);
 		if (win == 0)
-			offset = VIDOSD_C_SIZE_W0;
+			offset = VIDOSD_C(win);
 		val = win_data->ovl_width * win_data->ovl_height;
 		writel(val, ctx->regs + offset);
 
-- 
1.8.0

Re: [PATCH V3] drm/exynos: fimd: calculate the correct address offset

[Joonyoung Shim]

On 03/07/2013 06:42 PM, Leela Krishna Amudala wrote:
> Calculate the correct address offset values for alpha and color key
> control registers based on exynos4 and exynos5 user manuals.

+ remove VIDOSD_C_SIZE_W0 macro and fix comments about registers for
size and alpha.

> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> ---
>   drivers/gpu/drm/exynos/exynos_drm_fimd.c | 17 +++++++++--------
>   1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> index 9537761..f5f2b25 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
> @@ -38,11 +38,12 @@
>   /* position control register for hardware window 0, 2 ~ 4.*/
>   #define VIDOSD_A(win)		(VIDOSD_BASE + 0x00 + (win) * 16)
>   #define VIDOSD_B(win)		(VIDOSD_BASE + 0x04 + (win) * 16)
> -/* size control register for hardware window 0. */
> -#define VIDOSD_C_SIZE_W0	(VIDOSD_BASE + 0x08)
> -/* alpha control register for hardware window 1 ~ 4. */
> -#define VIDOSD_C(win)		(VIDOSD_BASE + 0x18 + (win) * 16)
> -/* size control register for hardware window 1 ~ 4. */
> +/*
> + * size control register for hardware windows 0 and alpha control register
> + * for hardware windows 1 ~ 4
> + */
> +#define VIDOSD_C(win)		(VIDOSD_BASE + 0x08 + (win) * 16)
> +/* size control register for hardware windows 1 ~ 2. */
>   #define VIDOSD_D(win)		(VIDOSD_BASE + 0x0C + (win) * 16)
>   
>   #define VIDWx_BUF_START(win, buf)	(VIDW_BUF_START(buf) + (win) * 8)
> @@ -50,9 +51,9 @@
>   #define VIDWx_BUF_SIZE(win, buf)	(VIDW_BUF_SIZE(buf) + (win) * 4)
>   
>   /* color key control register for hardware window 1 ~ 4. */
> -#define WKEYCON0_BASE(x)		((WKEYCON0 + 0x140) + (x * 8))
> +#define WKEYCON0_BASE(x)		((WKEYCON0 + 0x140) + ((x - 1) * 8))
>   /* color key value register for hardware window 1 ~ 4. */
> -#define WKEYCON1_BASE(x)		((WKEYCON1 + 0x140) + (x * 8))
> +#define WKEYCON1_BASE(x)		((WKEYCON1 + 0x140) + ((x - 1) * 8))
>   
>   /* FIMD has totally five hardware windows. */
>   #define WINDOWS_NR	5
> @@ -581,7 +582,7 @@ static void fimd_win_commit(struct device *dev, int zpos)
>   	if (win != 3 && win != 4) {
>   		u32 offset = VIDOSD_D(win);
>   		if (win == 0)
> -			offset = VIDOSD_C_SIZE_W0;
> +			offset = VIDOSD_C(win);
>   		val = win_data->ovl_width * win_data->ovl_height;
>   		writel(val, ctx->regs + offset);
>   

Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>

Thanks.