From: Paolo Bonzini <pbonzini@redhat.com>
To: liguang <lig.fnst@cn.fujitsu.com>
Cc: qemu-trivial@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-trivial] [PATCH] hw/i386/pc: fix possible segment fault for port92_write
Date: Fri, 22 Mar 2013 12:07:15 +0100 [thread overview]
Message-ID: <514C3B63.8030308@redhat.com> (raw)
In-Reply-To: <1363943551-31150-1-git-send-email-lig.fnst@cn.fujitsu.com>
Il 22/03/2013 10:12, liguang ha scritto:
> e.g.
> $qemu-system-x86_64 -device port92
> will report segment fault,
> for port92_write try a un-allocated
> assignment for a20_out.
> so check before this assignment.
>
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
> hw/i386/pc.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index ed7d9ba..a0e8ee0 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
>
> DPRINTF("port92: write 0x%02x\n", val);
> s->outport = val;
> - qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> + if (s->a20_out)
> + qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> if (val & 1) {
> qemu_system_reset_request();
> }
>
Unfortunately, this is a very common problem. The correct fix is to
change port92 to use the GPIO mechanism instead.
Paolo
WARNING: multiple messages have this Message-ID (diff)
From: Paolo Bonzini <pbonzini@redhat.com>
To: liguang <lig.fnst@cn.fujitsu.com>
Cc: qemu-trivial@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] hw/i386/pc: fix possible segment fault for port92_write
Date: Fri, 22 Mar 2013 12:07:15 +0100 [thread overview]
Message-ID: <514C3B63.8030308@redhat.com> (raw)
In-Reply-To: <1363943551-31150-1-git-send-email-lig.fnst@cn.fujitsu.com>
Il 22/03/2013 10:12, liguang ha scritto:
> e.g.
> $qemu-system-x86_64 -device port92
> will report segment fault,
> for port92_write try a un-allocated
> assignment for a20_out.
> so check before this assignment.
>
> Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
> ---
> hw/i386/pc.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index ed7d9ba..a0e8ee0 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -440,7 +440,8 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
>
> DPRINTF("port92: write 0x%02x\n", val);
> s->outport = val;
> - qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> + if (s->a20_out)
> + qemu_set_irq(*s->a20_out, (val >> 1) & 1);
> if (val & 1) {
> qemu_system_reset_request();
> }
>
Unfortunately, this is a very common problem. The correct fix is to
change port92 to use the GPIO mechanism instead.
Paolo
next prev parent reply other threads:[~2013-03-22 11:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-22 9:12 [Qemu-trivial] [PATCH] hw/i386/pc: fix possible segment fault for port92_write liguang
2013-03-22 9:12 ` [Qemu-devel] " liguang
2013-03-22 11:07 ` Paolo Bonzini [this message]
2013-03-22 11:07 ` Paolo Bonzini
2013-03-26 8:49 ` [Qemu-trivial] " li guang
2013-03-26 8:49 ` [Qemu-devel] " li guang
2013-03-22 11:20 ` [Qemu-trivial] " Andreas Färber
2013-03-22 11:20 ` Andreas Färber
2013-03-26 8:47 ` [Qemu-trivial] " li guang
2013-03-26 8:47 ` li guang
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