* Fwd: Re: bug in commit with Intel Core i3 3220T (Ivy Bridge hd graphics 2500)
[not found] <51546298.2020900@free.fr>
@ 2013-03-28 15:35 ` zaverel
2013-03-28 15:45 ` Chris Wilson
0 siblings, 1 reply; 3+ messages in thread
From: zaverel @ 2013-03-28 15:35 UTC (permalink / raw)
To: intel-gfx
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-------- Message original --------
Sujet: Re: [Intel-gfx] bug in commit with Intel Core i3 3220T (Ivy
Bridge hd graphics 2500)
Date : Thu, 28 Mar 2013 16:32:40 +0100
De : zaverel <zaverel@free.fr>
Pour : Chris Wilson <chris@chris-wilson.co.uk>
Le 28/03/2013 16:10, Chris Wilson a écrit :
> On Thu, Mar 28, 2013 at 04:06:52PM +0100, zaverel wrote:
>> Hello,
>>
>> the commit sna/gen7: Use GT2 values for GT2 variants
>>
>> http://cgit.freedesktop.org/xorg/driver/xf86-video-intel/commit/?id=235a3981ea9759317b392302a2b2b8f4fafab410
>>
>> break sna acceleration.
> Interesting. Can you send me the i915_error_state and the output of
> intel_reg_read 0x20d0 ?
> -Chris
>
Hello,
i attach i915_error_state .zip
intel_reg_read 0x20d0 => 0x20D0 : 0x0
see you
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Fwd: Re: bug in commit with Intel Core i3 3220T (Ivy Bridge hd graphics 2500)
2013-03-28 15:35 ` Fwd: Re: bug in commit with Intel Core i3 3220T (Ivy Bridge hd graphics 2500) zaverel
@ 2013-03-28 15:45 ` Chris Wilson
2013-03-28 15:58 ` zaverel
0 siblings, 1 reply; 3+ messages in thread
From: Chris Wilson @ 2013-03-28 15:45 UTC (permalink / raw)
To: zaverel; +Cc: intel-gfx
On Thu, Mar 28, 2013 at 04:35:15PM +0100, zaverel wrote:
> Hello,
>
> i attach
> i915_error_state
> .zip
>
> intel_reg_read 0x20d0 => 0x20D0 : 0x0
Whoops, thanks very much for the report!
commit 43181692f752f0a552d2e2c76d8379fe16e521cf
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu Mar 28 15:41:38 2013 +0000
sna/gen7: Refine is_gt2() for Haswell versus Ivybridge
The two similar chipsets do not use the same PCI-ID encoding
schema.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Fwd: Re: bug in commit with Intel Core i3 3220T (Ivy Bridge hd graphics 2500)
2013-03-28 15:45 ` Chris Wilson
@ 2013-03-28 15:58 ` zaverel
0 siblings, 0 replies; 3+ messages in thread
From: zaverel @ 2013-03-28 15:58 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Le 28/03/2013 16:45, Chris Wilson a écrit :
> On Thu, Mar 28, 2013 at 04:35:15PM +0100, zaverel wrote:
>> Hello,
>>
>> i attach
>> i915_error_state
>> .zip
>>
>> intel_reg_read 0x20d0 => 0x20D0 : 0x0
> Whoops, thanks very much for the report!
>
> commit 43181692f752f0a552d2e2c76d8379fe16e521cf
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date: Thu Mar 28 15:41:38 2013 +0000
>
> sna/gen7: Refine is_gt2() for Haswell versus Ivybridge
>
> The two similar chipsets do not use the same PCI-ID encoding
> schema.
> -Chris
>
Just try your fix and that work.
Thanks
See you.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2013-03-28 15:35 ` Fwd: Re: bug in commit with Intel Core i3 3220T (Ivy Bridge hd graphics 2500) zaverel
2013-03-28 15:45 ` Chris Wilson
2013-03-28 15:58 ` zaverel
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