From: Fabien Chouteau <chouteau@adacore.com>
To: Alexander Graf <agraf@suse.de>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/2] PPC: fix hreset_vector for 60x, 7x0, 7x5, G2, MPC8xx, MPC5xx, 7400 and 7450
Date: Tue, 02 Apr 2013 09:53:09 +0200 [thread overview]
Message-ID: <515A8E65.3010008@adacore.com> (raw)
In-Reply-To: <CDBC3DB5-6BED-4BBA-A62F-FCB0245CB76F@suse.de>
On 04/02/2013 10:09 AM, Alexander Graf wrote:
>
> On 29.03.2013, at 13:06, Fabien Chouteau wrote:
>
>> According to the different user's manuals, the vector offset for system
>> reset (both /HRESET and /SRESET) is 0x00100.
>>
>> This patch may break support of some executables, as the power-on start
>> address may change. For a specific board, if the power-on start address
>> is different than HRESET vector (i.e. 0x00000100 or 0xfff00100), this
>> should be fixed in board's initialization code.
>>
>> Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
>
> What about the other users of hreset_vector? Can we just remove the variable altogether?
>
For the CPUs that don't implement MSR[IP], the hreset_prefix is always
0x00000000, so hreset_vector will be the reset address (i.e. 0xFFFFFFFC)
I guess all this can be converted to a CPU feature flag, telling if
reset is an exception or not.
--
Fabien Chouteau
next prev parent reply other threads:[~2013-04-02 8:53 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-29 12:06 [Qemu-devel] [PATCH 1/2] PPC: Remvove env->hreset_excp_prefix Fabien Chouteau
2013-03-29 12:06 ` [Qemu-devel] [PATCH 2/2] PPC: fix hreset_vector for 60x, 7x0, 7x5, G2, MPC8xx, MPC5xx, 7400 and 7450 Fabien Chouteau
2013-04-02 8:09 ` Alexander Graf
2013-04-02 7:53 ` Fabien Chouteau [this message]
2013-04-02 8:56 ` Alexander Graf
2013-04-02 8:10 ` Fabien Chouteau
2013-04-02 8:09 ` [Qemu-devel] [PATCH 1/2] PPC: Remvove env->hreset_excp_prefix Alexander Graf
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